JPS6042989U - Circuit board for watches - Google Patents

Circuit board for watches

Info

Publication number
JPS6042989U
JPS6042989U JP13639683U JP13639683U JPS6042989U JP S6042989 U JPS6042989 U JP S6042989U JP 13639683 U JP13639683 U JP 13639683U JP 13639683 U JP13639683 U JP 13639683U JP S6042989 U JPS6042989 U JP S6042989U
Authority
JP
Japan
Prior art keywords
circuit board
watches
conductive pattern
watch
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13639683U
Other languages
Japanese (ja)
Inventor
久嶋 正二
Original Assignee
シチズン時計株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シチズン時計株式会社 filed Critical シチズン時計株式会社
Priority to JP13639683U priority Critical patent/JPS6042989U/en
Publication of JPS6042989U publication Critical patent/JPS6042989U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のワイヤーボンディング実装方式の平面図
であり、第2図は従来のフリップチップボンディング実
装方式の平面図である。また、第3図aは本考案による
共通のプリント基板の平面図、第3図すは本考案の断面
図、第3図Cは本考案の裏側平面図である。さらに、第
4図は本考案−による回路基板を使用したワイヤーボン
ディング実装方式、第5図は本考案によるフリップチッ
プボンディング実装方式を使用し、ICと回路基板とが
実装されている平面図である。 101・・・・・・接続電極、201,401・・・・
・・導通パターン、301・・・・・・導通部材。
FIG. 1 is a plan view of a conventional wire bonding mounting method, and FIG. 2 is a plan view of a conventional flip chip bonding mounting method. 3A is a plan view of a common printed circuit board according to the present invention, FIG. 3 is a sectional view of the present invention, and FIG. 3C is a back side plan view of the present invention. Further, Fig. 4 is a plan view of an IC and a circuit board mounted using a wire bonding mounting method using a circuit board according to the present invention, and Fig. 5 using a flip chip bonding mounting method according to the present invention. . 101... Connection electrode, 201, 401...
...Conduction pattern, 301...Conduction member.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 導通パターンを配設した回路基板にICを投載し、前記
IC上に設けた接続電極と前記導通パターンを接続する
導通部材よりなる時計用回路基板において、前記回路基
板にスルーホールを形、成し、前記回路基板上に配設し
た導通パターンの先端部を前記スルーホールを通して前
記回路基板の裏面まで配設したことを特徴とする時計用
回路基板。
In a watch circuit board, an IC is mounted on a circuit board on which a conductive pattern is arranged, and a through hole is formed in the circuit board, and the circuit board is made of a conductive member that connects a connection electrode provided on the IC and the conductive pattern. A circuit board for a watch, characterized in that a tip end of a conductive pattern disposed on the circuit board is disposed through the through hole to a back surface of the circuit board.
JP13639683U 1983-09-02 1983-09-02 Circuit board for watches Pending JPS6042989U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13639683U JPS6042989U (en) 1983-09-02 1983-09-02 Circuit board for watches

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13639683U JPS6042989U (en) 1983-09-02 1983-09-02 Circuit board for watches

Publications (1)

Publication Number Publication Date
JPS6042989U true JPS6042989U (en) 1985-03-26

Family

ID=30306702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13639683U Pending JPS6042989U (en) 1983-09-02 1983-09-02 Circuit board for watches

Country Status (1)

Country Link
JP (1) JPS6042989U (en)

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