JPS6040101U - DC motor control circuit for alarm clock - Google Patents

DC motor control circuit for alarm clock

Info

Publication number
JPS6040101U
JPS6040101U JP13317483U JP13317483U JPS6040101U JP S6040101 U JPS6040101 U JP S6040101U JP 13317483 U JP13317483 U JP 13317483U JP 13317483 U JP13317483 U JP 13317483U JP S6040101 U JPS6040101 U JP S6040101U
Authority
JP
Japan
Prior art keywords
alarm clock
control circuit
motor control
motor
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13317483U
Other languages
Japanese (ja)
Inventor
洋 青木
Original Assignee
株式会社精工舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社精工舎 filed Critical 株式会社精工舎
Priority to JP13317483U priority Critical patent/JPS6040101U/en
Publication of JPS6040101U publication Critical patent/JPS6040101U/en
Pending legal-status Critical Current

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  • Electromechanical Clocks (AREA)
  • Motor And Converter Starters (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示した電気回路図、第２図
は動作説明のための波形図である。 １・・・・・・直流モータ、２・・・・・・トランジス
タ、３・・・・・・音量調節素子、４・・・・・・容量
素子、５・・・・・・時計回路。FIG. 1 is an electric circuit diagram showing an embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining the operation. 1... DC motor, 2... Transistor, 3... Volume control element, 4... Capacitive element, 5... Clock circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] シュモクを駆動してリンを殴打せしめる直流モータと、
この直流モータを駆動するトランジスタと、このトラン
ジスタのベース入力に接続した抵抗と、この抵抗に並列
に接続した容量素子と、予め設定した時刻に上記容量素
子および上記抵抗からなる並列回路に上記直流モータの
駆動信号を供給する回路とからなるアラーム時計の直流
モータ制御回路。A DC motor that drives Shumoku to beat Rin,
A transistor that drives this DC motor, a resistor connected to the base input of this transistor, a capacitor connected in parallel to this resistor, and a parallel circuit consisting of the capacitor and the resistor connected to the DC motor at a preset time. A DC motor control circuit for an alarm clock, consisting of a circuit that supplies drive signals for the alarm clock.
JP13317483U 1983-08-29 1983-08-29 DC motor control circuit for alarm clock Pending JPS6040101U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13317483U JPS6040101U (en) 1983-08-29 1983-08-29 DC motor control circuit for alarm clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13317483U JPS6040101U (en) 1983-08-29 1983-08-29 DC motor control circuit for alarm clock

Publications (1)

Publication Number Publication Date
JPS6040101U true JPS6040101U (en) 1985-03-20

Family

ID=30300510

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13317483U Pending JPS6040101U (en) 1983-08-29 1983-08-29 DC motor control circuit for alarm clock

Country Status (1)

Country Link
JP (1) JPS6040101U (en)

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