JPS6037751A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent disconnections and short-circuits by realization of the flattening of the surface of an interlayer insulation film by a method wherein the insulation film is put in a multilayer structure by the bias sputtering technique. CONSTITUTION:An oxide film 3a doped with phosphorus and having a sufficiently low viscosity is grown in chemical vapor phase, and next an oxide film 3b is deposited in superposition by the bias sputtering method. Since bias sputtering etches an oxide film being deposited while the film is deposited, selection of a condition of reverse bias enables to deposit substances while the surface is flattened. Otherwise, it is also available that an oxide film 3c of a sufficiently low viscosity is deposited in the atmosphere of phosphorus by sputtering, and that a non-doped oxide film 3d is successively deposited by the sputtering method wherein a reverse bias is applied. This construction enables to obtain the interlayer insulation film whose surface is flattened, causing no disconnections and short-circuits in the wiring formed in the upper layer thereof.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は半導体装置の製造方法、特に半導体装置にお
ける層間絶縁膜の形成方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for forming an interlayer insulating film in a semiconductor device.

〔従来技術〕[Prior art]

従来例での製造方法によって得られる半導体装置の眉間
絶縁膜を含んだ主要部構成を第１図に示す。すなわち、
この第１図従来例方法においては、第１層目の配線材料
層（２）を形成した半導体基板（１）上に層間絶縁膜（
３）を堆積させた構成を有しており、この層間絶縁膜（
３）上にはさらに次の図示しない第２層目の配線材料層
が形成されるのであるが、第１層目の配線材料層（２）
の存在のだめに、層間絶縁膜（３）表面の段差が急峻で
あればあるほど、その上の第２層目の配線Ｉ料層の段差
も急峻になって断線、短路などの不良を発生し易くなる
ものであった。FIG. 1 shows the main structure of a semiconductor device including a glabella insulating film obtained by a conventional manufacturing method. That is,
In the conventional method shown in FIG. 1, an interlayer insulating film (
3) is deposited, and this interlayer insulating film (
3) A second wiring material layer (not shown) is further formed on top of the first wiring material layer (2).
Because of the presence of this, the steeper the step on the surface of the interlayer insulating film (3), the steeper the step in the second wiring I material layer above it, leading to defects such as disconnections and short circuits. It was easier.

従って従来方法では、表面平担化を目的として、粘性の
低い絶縁膜２例えば燐を混入した酸化膜を化学的気相成
長法’により形成させる方法などが用いられているので
あるが、この方法においてすらパターンの微細化に伴な
う段差の大きい部分に′あっては、未だ満足し借るまで
の十分カ平担化を望み得ないという問題があった。Therefore, in conventional methods, for the purpose of flattening the surface, a method is used in which a low-viscosity insulating film 2, for example, an oxide film mixed with phosphorus, is formed by chemical vapor deposition. Even in the conventional method, there is a problem in that it is still not possible to achieve a satisfactory leveling in areas with large step differences due to the miniaturization of patterns.

〔発明の概要〕[Summary of the invention]

この発明は従来方法のこのような欠点に鑑み、バイアス
スパッタ技術によυ層間絶縁膜を多層措造にすることで
、同層間絶縁膜の表面平担化を実現させるようにしたも
のである。In view of these drawbacks of the conventional method, the present invention is designed to realize a flat surface of the interlayer insulating film by forming the υ interlayer insulating film into a multilayer structure using bias sputtering technology.

〔発明の実施例〕[Embodiments of the invention]

以下この発明の各別の実施例につき、第２図および第３
図を参照して詳細に説明する。2 and 3 for each different embodiment of this invention.
This will be explained in detail with reference to the drawings.

第２図は前記第１図に対応して示した第１実施例方法に
よって得られる半導体装置の層間絶縁膜を含む主要部構
成である。これらの各図中同一符号は同一または相当部
分を示しておシ、この第１実施例方法では、第１層目の
層間絶縁膜（３）として、まず十分に粘性の低い絶縁膜
２例えば燐をドープした酸化膜（３ａ）を化学的気相成
長法により形成させ、次にその上にバイアススパッタ法
により絶縁膜２例えば醇化膜（３ｂ）を堆積（デポジッ
ト）させて、層間絶縁膜（３）を多層に形成させること
を特長としている。しかし７てこのバイアススパッタは
、デポジットを行ないながら堆積される絶縁物をエツチ
ングするので、逆バイアスの条件によっては表面の平担
化をなしながら物質を堆積させることができるのである
。FIG. 2 shows the structure of the main part including the interlayer insulating film of a semiconductor device obtained by the method of the first embodiment shown in correspondence with FIG. 1. The same reference numerals in these figures indicate the same or corresponding parts. In the method of this first embodiment, an insulating film 2 having a sufficiently low viscosity, for example, phosphorus, is first formed as the first interlayer insulating film (3). An oxide film (3a) doped with oxide is formed by chemical vapor deposition, and then an insulating film 2, such as a molten oxide film (3b), is deposited thereon by bias sputtering to form an interlayer insulating film (3). ) is formed in multiple layers. However, since this bias sputtering etches the deposited insulator while depositing, it is possible to deposit the material while flattening the surface depending on the reverse bias conditions.

また第３図は第２回実施例方法による同一ヒ主要部構成
であシ、この第２実施例方法では、第１層目の層間絶縁
膜（３）として、まず例えば惧雰囲気でのスパッタ酸化
膜（３ｏ）などの、十分に粘性の低い絶縁膜をスパッタ
法によシ堆積させたのち、続いて逆バイアスをかけたバ
イアススパッタ法により絶縁膜２例えばノンドープの酸
化膜（３ｄ）を堆Ｍ（デポジット）させて、同様に層間
絶縁膜（３）を多層に形成させることを特長としでいる
。すなわち、この場合も前記第１実施例方法と同様にバ
イアススパッタ法での平和化特性を利用するものである
。In addition, FIG. 3 shows the same main part configuration according to the method of the second embodiment. In the method of the second embodiment, the first interlayer insulating film (3) is first oxidized by sputtering in a dangerous atmosphere. After depositing an insulating film with sufficiently low viscosity, such as film (3o), by sputtering, an insulating film 2, such as a non-doped oxide film (3d), is subsequently deposited by bias sputtering with a reverse bias applied. The feature is that the interlayer insulating film (3) can be similarly formed in multiple layers by depositing the interlayer insulating film (3). That is, in this case as well, the pacifying characteristic of the bias sputtering method is utilized, as in the method of the first embodiment.

なお、前記各実施例方法の他にも、多層構成の形成順を
変えてもよいことは勿論である。In addition to the methods of each of the embodiments described above, it is of course possible to change the order of forming the multilayer structure.

〔発明の効果〕〔Effect of the invention〕

以上詳述したように、この発明方法によれば、眉間絶縁
膜をバイアススノくツタ技術の利用による酸化膜、絶縁
膜などの多層描造とすることによって平担化することが
でき、これによってその上層に形成される配線拐料層パ
ターンでの断線、短絡などの障害を容易に阻止できるも
のである。As described in detail above, according to the method of the present invention, the insulating film between the eyebrows can be made flat by forming a multilayer pattern of oxide film, insulating film, etc. by using the bias snow ivy technique. This can easily prevent failures such as disconnections and short circuits in the wiring layer pattern formed in the upper layer.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来例方法によって得られる半導体装置の層間
絶縁膜を含む主要部の概要格ＪｊＫを示す断面図、第２
図および第３図はこの発明の各別の実施例方法によって
得られる同上主要部の概要構成を示すそれぞれ断面図で
ある、 （１）・・・・半導体基板、（２）・・・・第１層目の
配線材料層、Ｃ）・・・・層間絶縁膜、（３ａ）、（３
ｂ）−（３ｃ）、（３ｄ）・・・・多層４行造を形成す
る酸化膜。 第１頁の続き □ ０発　明　者　佐　藤　真　−伊丹市瑞原４丁アイ研究
所内FIG. 1 is a cross-sectional view showing a schematic diagram of the main parts including the interlayer insulating film of a semiconductor device obtained by the conventional method, and FIG.
Figures 3 and 3 are cross-sectional views showing the general configuration of the main parts of the above obtained by different embodiment methods of the present invention, (1)... semiconductor substrate, (2)... First wiring material layer, C)... interlayer insulating film, (3a), (3
b)-(3c), (3d)...Oxide film forming a multilayer 4-row structure. Continued from page 1 □ 0 Inventor: Makoto Sato - Inside the Eye Research Institute, Mizuhara 4-chome, Itami City

Claims (3)

【特許請求の範囲】[Claims] （１）層間絶縁膜を有する半導体装置の製造方法におい
て、前記層間絶縁膜をバイアススパッタ法によシ粘性の
低い絶縁膜の多層構造で形成することを特徴とする半導
体装置の製造方法。(1) A method for manufacturing a semiconductor device having an interlayer insulating film, characterized in that the interlayer insulating film is formed by a bias sputtering method to have a multilayer structure of insulating films with low viscosity. （２）燐をドープした酸化膜などの粘性の低い絶縁膜を
化学的気相成長法によシ形成させたのち、その上に酸化
膜などの絶縁膜をバイアススパッタ法によシ堆積させて
、眉間絶縁膜を多層構造に形成することを特徴とする特
許請求の範囲第１項記載の半導体装置の製造方法。(2) After forming a low-viscosity insulating film such as a phosphorous-doped oxide film by chemical vapor deposition, an insulating film such as an oxide film is deposited on top of it by bias sputtering. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the glabella insulating film is formed in a multilayer structure. （３）燐雰囲気でのスパッタ酸化膜などの粘性の低いｉ
縁膜をスパッタ法によシ堆積させたのち、その上にノン
ドープの酸化膜などの絶縁膜を逆バイアスをかけたバイ
アススパッタ法によシ堆債させて、層間絶縁膜を多層構
造に形成することを特徴とする特許請求の範囲第１項記
載の半導体装置の製造方法。(3) Low viscosity of sputtered oxide films in phosphorous atmosphere
After depositing the edge film by sputtering, an insulating film such as a non-doped oxide film is deposited on top of it by bias sputtering with reverse bias, forming an interlayer insulating film in a multilayer structure. A method for manufacturing a semiconductor device according to claim 1, characterized in that: