JPS6022817A - Agc device - Google Patents

Abstract

PURPOSE:To reduce the cross modulation distortion at the increase in an input level by allowing the 1st level adjusting device inserted to an amplifier in cascade connection to respond linearly to an AGC voltage and providing a region of a prescribed value not responding to the voltage to a part of the 2nd level adjusting device. CONSTITUTION:The level adjusting devices 2, 4 inserted between amplifiers 1 and 3 and between amplifiers 3 and 5 respectively receive an AGC output applied to a control input terminal 7 through drive circuits 6a, 6b respectively and decide the loss through the circuit. The 1st level adjusting device 2 receiving a control voltage via the drive circuit 6a increases linearly the loss through the circuit as the voltage applied to the control input terminal is smaller, and the 2nd level adjusting device 4 receiving the control voltage via the drive circuit 6b makes the loss through the circuit constant when the voltage at the control input terminal is smaller than a certain value and reduces linearly the loss through the circuit when the voltage is the value or over. Since the level is attenuated largely at the level adjusting device 2, the output of the amplifier 3 is not excessive and the cross modulation distortion at the increase in the input level is decreased.

Description

【発明の詳細な説明】 本発明は高周波回路等に用いられるＡＧＣ装置に関する
もので、特に大入力レベルに対する特性の改善を図るこ
とを目的とする。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an AGC device used in high frequency circuits, etc., and particularly aims to improve characteristics for large input levels.

第１図は従来用いられていたレベル調整回路を含むｋ（
，０回路網で、１０１は入力端子はそれぞれ増幅器、２
は第１のレベル調整回路、４は第２のレベル調整回路、
１０２は出力端子６はレベル調整回路２．４の駆動回路
で、後続のＡＣ，Ｃ検波回路（図示せず）からの制御電
圧の入力端子７が設けられている。Figure 1 shows k(
, 0 circuit network, 101 is an amplifier, 2 is an input terminal, respectively.
is a first level adjustment circuit, 4 is a second level adjustment circuit,
Reference numeral 102 designates an output terminal 6 as a drive circuit for the level adjustment circuit 2.4, which is provided with an input terminal 7 for receiving a control voltage from a subsequent AC/C detection circuit (not shown).

同図において左端の入力端子１０１から入った高周波電
圧は、増幅器１により増幅され、次にレベル調整回路２
，４で可変減衰され、右端の出力端子１０２へレベル調
整された高周波電圧が出る。In the figure, the high frequency voltage input from the leftmost input terminal 101 is amplified by the amplifier 1, and then the level adjustment circuit 2
, 4, and a level-adjusted high frequency voltage is output to the rightmost output terminal 102.

まだ制御電圧端子７に入った制御電圧ｔま駆動回路６を
働かせ、この駆動回路６の出力でレベル調整回路２，４
を駆動して出力レベルを目的値に調整する。The control voltage t still input to the control voltage terminal 7 is used to operate the drive circuit 6, and the output of this drive circuit 6 is used to adjust the level adjustment circuits 2 and 4.
drive to adjust the output level to the target value.

第２図はレベル調整回路２，４の制御電圧と通過損失の
関係の一例を示す。同図で直流制御電圧７を上げるとレ
ベル調整回路２，４の通過損失は直線的に減少する。FIG. 2 shows an example of the relationship between the control voltage of the level adjustment circuits 2 and 4 and the passing loss. In the figure, when the DC control voltage 7 is increased, the passing loss of the level adjustment circuits 2 and 4 decreases linearly.

第３図は第１図の高周波回路の各段゛でのレベルダイヤ
グラムを示すものである。同図において折線８は標準入
力レベル時のもの、折線９は標準より入力レベルが低い
場合、また折線１ｏは標準より入力レベルが高い場合で
、各々ＡＧＣ動作によシ出力１０２が一定になっている
場合を示している。従って入力電圧は増幅を３回くり返
すとともに、可変減衰を２回して出力している。上記構
成では増幅器の利得は一定であり、入力レベルの変動に
対しては可変減衰により出力が一定になるようにしてい
る。FIG. 3 shows a level diagram at each stage of the high frequency circuit shown in FIG. In the figure, the broken line 8 is for the standard input level, the broken line 9 is for the case where the input level is lower than the standard, and the broken line 1o is for the case where the input level is higher than the standard, and the output 102 is constant due to AGC operation. Indicates when there is. Therefore, the input voltage is amplified three times and variable attenuated twice before being output. In the above configuration, the gain of the amplifier is constant, and the output is kept constant by variable attenuation in response to fluctuations in the input level.

今、入力レベルが太きいとこのレベルダイヤグラムに示
したように第２段目の増幅器４の出力が過大となり、多
波同時増幅の場合は信号間で混変調積が増大する欠点が
ある。これは前記利得調整回路２，４の利得制御電圧−
損失特性が同傾向の特性であるから入力レベルが増大し
た時に１段目の利得減衰が十分でなく２段目の増幅器出
力レベルが過大になることによるものである。If the input level is high, the output of the second stage amplifier 4 will be excessive as shown in the level diagram, and in the case of simultaneous multi-wave amplification, there is a drawback that the cross-modulation product between signals will increase. This is the gain control voltage of the gain adjustment circuits 2 and 4 -
This is because the loss characteristics tend to be the same, so when the input level increases, the gain attenuation of the first stage is not sufficient and the output level of the second stage amplifier becomes excessive.

本発明はかかる欠点を除去１７、かつレベル調整を可能
としたＡＧＯ装置を提供しようとするものである。第４
図はその一実施例、を示すもので、対応する部分には同
符号を付している。異なるのはレベル調整回路２，４が
それぞれ別々の駆動回路６＆　、６ｂで制御されている
点である。またレベル制御回路２，４はそれぞれ第６図
および第６図に示す制御電圧−損失特性を何ＩＪえてい
る。The present invention aims to eliminate these drawbacks 17 and provide an AGO device that allows level adjustment. Fourth
The figure shows one embodiment, and corresponding parts are given the same reference numerals. The difference is that the level adjustment circuits 2 and 4 are controlled by separate drive circuits 6& and 6b, respectively. Further, the level control circuits 2 and 4 have control voltage-loss characteristics shown in FIGS. 6 and 6, respectively.

１２は定電圧出力回路である。12 is a constant voltage output circuit.

上述した特性をもたせたことにより高周波入力レベルが
増大し・・、ＡＧｃ電圧が低下して出力を規定値にしよ
＼うと働く時、レベル調整回路４はある一定減衰量以上
には減衰１〜なくなり、従ってレベル調整回路２での減
衰量が増大し、増幅器３の出力レベルを規定値に収れん
させることができ、従って安定状態で動作させることが
でき、この時のレベルダイヤの一例を第３図の１１に示
す。つまり前段のレベル調整回路２でより大きくレベル
ダイヤさせるため、逆に２段目の増幅器出力は第３図１
０に示す場合より少く押えられて、それだけ混変調の発
生レベルが低くてすむことになる。By providing the above-mentioned characteristics, when the high frequency input level increases and the AGc voltage decreases to try to bring the output to the specified value, the level adjustment circuit 4 will attenuate 1 to no more than a certain attenuation amount. Therefore, the amount of attenuation in the level adjustment circuit 2 increases, and the output level of the amplifier 3 can be converged to the specified value, so that it can be operated in a stable state. An example of the level diagram at this time is shown in Fig. 3. It is shown in No. 11. In other words, in order to make the level diagram larger in the level adjustment circuit 2 of the previous stage, the output of the second stage amplifier is
It is suppressed less than in the case shown in 0, and the level of cross modulation generated can be reduced accordingly.

なお第６図に示すような特性を実現する方法としては駆
動回路６にオペアンプを用い、その特性をオフセットに
よりある動作点以下で出力が変化しない動作点を設定す
れば良い。あるいは第７図のように駆動回路６ｂの出力
と、他に設けた電圧出力回路１２の出力とを合成し、駆
動回路６ｂの出力レベルがある一定電圧１夕、下に低下
した時はこの定電圧出力回路の出力電圧によりレベル調
整回路４が制御されるようにしても実現できる。Note that a method for realizing the characteristics shown in FIG. 6 is to use an operational amplifier in the drive circuit 6 and set the characteristics to an operating point below a certain operating point at which the output does not change by using an offset. Alternatively, as shown in FIG. 7, the output of the drive circuit 6b and the output of the voltage output circuit 12 provided elsewhere are combined, and when the output level of the drive circuit 6b drops below a certain voltage overnight, This can also be realized by controlling the level adjustment circuit 4 by the output voltage of the voltage output circuit.

この定電圧出力回路１２の一実施例を第８図。FIG. 8 shows an embodiment of this constant voltage output circuit 12.

第９図に示す。第８図は可変抵抗器１３で調節された電
圧をダイオード１４全通して供給するものであり、第９
図はツェナーダイオード１６の出力電圧をダイオード１
４を通して供給するものである。It is shown in FIG. In FIG. 8, the voltage adjusted by the variable resistor 13 is supplied through all the diodes 14, and the 9th
The figure shows the output voltage of Zener diode 16
It is supplied through 4.

以上の説明ではレベル調整器２および４の制御電圧−損
失特性が電圧下降時に損失増大の特性を有する場合につ
いて説明したが、逆に電圧上昇で損失増大の特性にして
も同様に実現できる。才だ」二記実施例ではレベル制御
回路を２段の場合を説明したがさらに多くの段数で構成
しても良く、あるいは増幅器とレベル制御回路の構成は
第１図の組合せに限らない。さらにレベル調整回路はＰ
ＩＮダイオードを用いて構成しても、他の半導体素子を
用いても実現できる。In the above description, a case has been described in which the control voltage-loss characteristics of the level regulators 2 and 4 have a characteristic in which the loss increases when the voltage decreases, but conversely, the same can be realized even if the characteristic increases in loss as the voltage increases. In the second embodiment, the case where the level control circuit has two stages has been described, but it may be configured with a larger number of stages, or the configuration of the amplifier and level control circuit is not limited to the combination shown in FIG. Furthermore, the level adjustment circuit is P
It can be realized by using an IN diode or by using other semiconductor elements.

以上説明したように本発明によればレベル調整回路の制
御電圧−・減衰特性を前段と後段で変化させて構成する
ことにより、高周波入力レベルが増大した時の混変調歪
の増大を少くすることができる。なお通常動作時にはた
とえば第１図の回路において第３図のレベルダイヤで示
す２段目増幅器４の出力を入力増大時も低くおさえよう
とすると、従来の回路方式では標準入力時もレベル調整
回路２の減衰量が大きくなり、ここで雑音指数を大１Ｊ
に劣化させてしまう問題点を生ずるが本発明によればこ
のような不都合は起らない。As explained above, according to the present invention, by configuring the level adjustment circuit so that the control voltage and attenuation characteristics are changed between the front stage and the rear stage, it is possible to reduce the increase in cross-modulation distortion when the high-frequency input level increases. Can be done. Note that during normal operation, for example, in the circuit shown in FIG. 1, if an attempt is made to keep the output of the second stage amplifier 4, shown by the level diagram in FIG. The attenuation becomes large, and the noise figure is increased by 1J.
However, according to the present invention, such inconvenience does not occur.

またこのように本発明を用いると、入力レベル増大時の
混変調歪を少くできるとともに標準入力レベルの時は雑
音指数を少くすることができ、多波同時増幅回路のＡＣ
，、Ｃ回路等に利用すればその実用的価値は大である。Furthermore, by using the present invention as described above, it is possible to reduce cross-modulation distortion when the input level increases, and also to reduce the noise figure when the input level is standard.
, , it has great practical value if used in C circuits, etc.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のＡＧＯ装置のブロック図、第２図はその
特性図、第３図はそのレベル変化を示す図、第４図は本
発明の一実施例によるＡＧＣ装置臆ブロック図、第６図
および第６図はその特性図、第７図〜第９図は要部の具
体構成図である。 １．３．５・・−・増幅器、２，４・・・・・レベル変
調回路。 代理人の氏名　弁理士　中　尾　敏　男　はが１名第１
図 第３図 ４図FIG. 1 is a block diagram of a conventional AGO device, FIG. 2 is a characteristic diagram thereof, FIG. 3 is a diagram showing its level changes, FIG. 4 is a block diagram of an AGC device according to an embodiment of the present invention, and FIG. 6 and 6 are characteristic diagrams thereof, and FIGS. 7 to 9 are concrete configuration diagrams of the main parts. 1.3.5...Amplifier, 2,4...Level modulation circuit. Name of agent: Patent attorney Toshio Nakao (1st person)
Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] ３個あるいはそれ以上の個数の増幅を縦続接続し、その
中間に、レベル変化量がＡＧＯ制御電圧の変化に対し直
線的に変化する第１のレベル調整回路と、レベル変化量
がＡＧＯ制御電圧の変化に対し一定の領域と直線的に変
化する領域の合成で変化する第２のレベル調整回路とを
設けたことを特徴とするＡＧＯ装置。Three or more amplifiers are connected in cascade, and between them there is a first level adjustment circuit whose level change varies linearly with changes in the AGO control voltage; An AGO device comprising a second level adjustment circuit that changes by combining a region that is constant with respect to changes and a region that changes linearly.