JPS60206218A - Initial clearing circuit - Google Patents

Initial clearing circuit

Info

Publication number
JPS60206218A
JPS60206218A JP6064584A JP6064584A JPS60206218A JP S60206218 A JPS60206218 A JP S60206218A JP 6064584 A JP6064584 A JP 6064584A JP 6064584 A JP6064584 A JP 6064584A JP S60206218 A JPS60206218 A JP S60206218A
Authority
JP
Japan
Prior art keywords
circuit
zener diode
vcc
zener
constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6064584A
Other languages
Japanese (ja)
Inventor
Akinobu Okamura
哲信 岡村
Yasunori Tominaga
富永　保則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6064584A priority Critical patent/JPS60206218A/en
Publication of JPS60206218A publication Critical patent/JPS60206218A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied

Landscapes

  • Structure Of Printed Boards (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To easily distribute the pattern of a printed board and to set easily a circuit constant as to the initial clearing circuit composed of a Zener diode ZD2, resistance, capacitor, and transistor (TR) by connecting the cathode side of the Zener diode ZD2 to +Vcc. CONSTITUTION:When the power source is turned on, Vc and +Vcc rises according to constants. When +Vcc rises up to the Zener voltage of the Zener diode ZD2, a current begins to flow through the Zener diode ZD2, and the potential at a point A' rises according to the constant of CR. When the potential at the point A' exceeds the threshold voltage of a TR1, the TR1 turns on and a constant- period reset signal is generated as an output. Thus, the circuit is constituted with one power source of +Vcc and a selection of the ratio of the Zener voltage of the Zener diode ZD2 is made relatively easily and the circuit constant is also set easily; and a Vc power source is not necessary, so the pattern setting of printed board is facilitated.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、イニシャルクリア回路の改良により、回路定
数の設定が容易になり、またプリント基板の設計上パタ
ーンの引回しが容易になる等の特徴をもつ、イニシャル
クリア回路である。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention has features such as improved initial clear circuits, which make it easier to set circuit constants, and make it easier to route patterns in the design of printed circuit boards. This is an initial clear circuit with

〔発明の背景〕[Background of the invention]

従来のイニシャルクリア回路は、第１図に示すように、
ツェナーダイヤードＺｉ）ｚのカソード側がＶＣ側に接
続されていたために、イニ／ヤルクリア回路の電源とし
てはＶｃと＋Ｖｃｃの２戒源が必要となり、プリント基
板のパターン設計時も電源２本を引回してこなければな
らｒ１パター／設計が複雑になるという欠点があった。The conventional initial clear circuit, as shown in Figure 1,
Since the cathode side of the Zener diamond Zi)z was connected to the VC side, two power sources, Vc and +Vcc, were required as the power supply for the initial clear circuit, and two power sources were routed when designing the printed circuit board pattern. The disadvantage was that the r1 putter/design was complicated.

また、４源投入時の回路の動作を説明すると、ＺＤｌと
ほぼ等しい電圧をもったツェナーダイオードを介し、次
に几Ｃの時定数回路を通してトランジスタをＩＫ動ｒる
ことにより、一定期間リセットｒｉ号を発生させること
ができる。以上のことを、第６図に示すタイムチャート
により説明すると、ＶＣの電位がツェナーダイオードＺ
Ｄ２のツェナー成田に達すると、ツェナーダイオードＺ
Ｄ２に４流が流ればじめ、０点の電位はＣルの時定数回
路により上昇しはじめ、トランジスタ１のスレツシコヤ
ド・ノベルを越えたところでトランジスタ１がオンし、
出力としては、第６図に示すように一定期間リセット信
号を発生させることができる。しかし、ツェナーダイオ
ードＺＤｚのツェナー成田は、ＶＣと＋Ｖｃｃの上昇の
時定ａＶｃよし、設定する必要があり、また、ＲＣの時
定数もツェナー成田に関係してくる等、回路定数の設定
がかなり複雑であった。Also, to explain the operation of the circuit when four sources are turned on, the reset signal is reset for a certain period of time by driving the transistor through a Zener diode with a voltage almost equal to ZDl, and then through a time constant circuit of 几C. can be generated. To explain the above using the time chart shown in FIG.
When the Zener Narita of D2 is reached, the Zener diode Z
4 currents begin to flow through D2, the potential at the 0 point begins to rise due to the time constant circuit of C, and when it crosses the threshold of transistor 1, transistor 1 turns on.
As an output, a reset signal can be generated for a certain period of time as shown in FIG. However, the Zener Narita of the Zener diode ZDz requires setting the time constant aVc for the rise of VC and +Vcc, and the RC time constant is also related to the Zener Narita, so setting the circuit constants is quite complicated. Met.

〔発明の目的Ｊ そこで本発明の目的は、ブリット基板のパターンの引回しが容易になり、また、回路定数の設定も容易なイニシャルクリア回路を提供することにあるつ 〔発明の概要〕[Object of the invention J SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an initial clear circuit that makes it easy to route a pattern on a bullet board and also allows easy setting of circuit constants. [Summary of the invention]

従来のイニシャルクリア回路は電源としてＶｃと＋Ｖｃ
ｃの２１を源が必要であった。このことが、ブリット基
板のパターン引回しの複雑化および回路定数設定の複雑
さに起因していることを発見し、電源を＋Ｖｃｃの１つ
にすることにより、上記問題点の解決しようとするのが
本発明である。The conventional initial clear circuit uses Vc and +Vc as power supplies.
A source of 21 c was required. They discovered that this was due to the complexity of the pattern routing and circuit constant settings for the bullet board, and tried to solve the above problem by changing the power supply to +Vcc. is the present invention.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例全第２．４図によシ、説明する
。Hereinafter, one embodiment of the present invention will be explained with reference to FIG. 2.4.

第２図は、本発明のイニ／ヤルクリア回路である。ツェ
ナーダイオードＺＤ２のツェナー電圧はツェナーダイオ
ードＺｌｈより少し低く設定する。また、ツェナーダイ
オードＺＤ２のカソード−は＋Ｖｃｃに１妾続しである
。第４因は、第２図の回路のタイムチャートである。以
下、本回路の動作説明を行う。電源投入時、ＶＣと＋Ｖ
ｃｃは第４図のように時定数をもって上昇してくる。＋
ＶｃｃがツェナーダイオードＺＤ２のツェナー電圧に達
するとツェナーダイオードＺＤ２に４流が流れはじめ、
Ｃルの時定紋により、０７点の電位は図のように上昇し
てくる。FIG. 2 shows the initial clear circuit of the present invention. The Zener voltage of the Zener diode ZD2 is set to be slightly lower than that of the Zener diode Zlh. Further, the cathode of the Zener diode ZD2 is connected to +Vcc. The fourth factor is the time chart of the circuit in FIG. The operation of this circuit will be explained below. When power is turned on, VC and +V
cc increases with a time constant as shown in FIG. +
When Vcc reaches the Zener voltage of Zener diode ZD2, four currents begin to flow through Zener diode ZD2,
Due to the time pattern of C, the potential at point 07 rises as shown in the figure.

０７点の電位がトランジスタ１のスレソショルト威圧を
越えるとトランジスタ１はオンし、出力としては図のよ
うに、一定期間のリセット信号を発生させることができ
る。以上のように、第１図に示す従来のイニシャルクリ
ア回路と同様なリセット信号が得られている。本実施例
によれば、電源は＋Ｖｃｃの１４源で回路構成が可能と
なり、ツェナーダイオードＺＤｚのツェナー電圧の選定
はツェナーダイオードＺｌｈのツエ大−亀圧より少し低
くければ良いので比較的容易に選定でき、Ｃルの時定数
は、トランジスタ１のシレツショルド電圧より、容易に
設定できるので、回路定数の設定が容易となる利点があ
る。また、従来に比べｖＣ亀源が不要となったので、プ
リント基板のパターン設定も容易になる。When the potential at point 07 exceeds the threshold of transistor 1, transistor 1 is turned on, and as an output, a reset signal for a certain period of time can be generated as shown in the figure. As described above, a reset signal similar to that of the conventional initial clear circuit shown in FIG. 1 is obtained. According to this embodiment, it is possible to configure a circuit with 14 +Vcc power sources, and the Zener voltage of the Zener diode ZDz can be selected relatively easily since it only needs to be a little lower than the Zener voltage of the Zener diode Zlh. Since the time constant of C can be set more easily than the threshold voltage of transistor 1, there is an advantage that the circuit constant can be set easily. Furthermore, since a vC source is no longer required compared to the conventional method, pattern setting of the printed circuit board becomes easier.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、従来のイニシャルクリア回路に比べ、
電源が＋Ｖｃｃの１成源でできるので、プリント基板の
パターン設計が容易になり、回路定数の設定も容易にな
るという効果がある。According to the present invention, compared to the conventional initial clear circuit,
Since the power source can be generated from a single source of +Vcc, the pattern design of the printed circuit board is facilitated, and the setting of circuit constants is also facilitated.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のイニシャルクリア回路、第２図は本発明
のイニシャルクリア回路、第３図は第１図の回路のタイ
ムチャート、第４図は第２図の回路のタイムチャートで
ある。 １・・・トランジスタ、２・・・電源、６・・・電源ト
ランス。 代理人弁理士　高　橋　明　夫 早１図 ＄２０ ４ニラマ）し７′ノア（５）ν１1 is a conventional initial clear circuit, FIG. 2 is an initial clear circuit of the present invention, FIG. 3 is a time chart of the circuit of FIG. 1, and FIG. 4 is a time chart of the circuit of FIG. 2. 1...Transistor, 2...Power supply, 6...Power transformer. Agent Patent Attorney Akira Takahashi 1 Figure $20 4 Nirama) 7' Noah (5) ν1

Claims (1)

【特許請求の範囲】[Claims] ツェナーダイオードＺＤ２と抵抗とコンデンサとトラン
ジスタよ＃）成るイニシャルクリア回路において、ツェ
ナーダイオードＺＤｚのカソード側を、−）−Ｖｃｃ　
Ｋｄ続したことを特徴とするイニシャルクリア回路。In an initial clear circuit consisting of a Zener diode ZD2, a resistor, a capacitor, and a transistor, the cathode side of the Zener diode ZDz is connected to -) -Vcc.
An initial clear circuit characterized by Kd continuity.
JP6064584A 1984-03-30 1984-03-30 Initial clearing circuit Pending JPS60206218A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6064584A JPS60206218A (en) 1984-03-30 1984-03-30 Initial clearing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6064584A JPS60206218A (en) 1984-03-30 1984-03-30 Initial clearing circuit

Publications (1)

Publication Number Publication Date
JPS60206218A true JPS60206218A (en) 1985-10-17

Family

ID=13148267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6064584A Pending JPS60206218A (en) 1984-03-30 1984-03-30 Initial clearing circuit

Country Status (1)

Country Link
JP (1) JPS60206218A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0300440A2 (en) * 1987-07-22 1989-01-25 Honeywell Ag Reset circuit for microprocessors and counters

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0300440A2 (en) * 1987-07-22 1989-01-25 Honeywell Ag Reset circuit for microprocessors and counters

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