JPS60200175A - Multi-phase electronic type electric watthour meter - Google Patents
Multi-phase electronic type electric watthour meterInfo
- Publication number
- JPS60200175A JPS60200175A JP59056147A JP5614784A JPS60200175A JP S60200175 A JPS60200175 A JP S60200175A JP 59056147 A JP59056147 A JP 59056147A JP 5614784 A JP5614784 A JP 5614784A JP S60200175 A JPS60200175 A JP S60200175A
- Authority
- JP
- Japan
- Prior art keywords
- current
- multiplier
- resistor
- output voltage
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【発明の詳細な説明】
本発明は、相別に測定した複数の電力から、多相電力量
を計量する多相電子式電力量計の改良に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a multiphase electronic watthour meter that measures multiphase power from a plurality of powers measured for each phase.
相別の電力から多相電力量を計量する多相電子式電力量
計においては、相別に計器用変圧器、変流器を設けるの
は勿論であるが、理論的には各相の共用とすることので
きる乗算器も、相別に設けるのが普通である。これは、
特に最近の集積回路等を用いた乗算器においては、各チ
ップに前回の結果が残存してしまうため、各相の共用と
すると、各相の結果が他相に影響を及ぼしあって、誤差
が生じてしまうためである。In a multi-phase electronic watt-hour meter that measures multi-phase electric energy from the electric power of each phase, it goes without saying that a voltage transformer and a current transformer are installed for each phase, but theoretically each phase can be shared. Multipliers that can do this are also usually provided separately. this is,
In particular, in multipliers using recent integrated circuits, the previous results remain in each chip, so if each phase is shared, the results of each phase will influence each other and errors will occur. This is because it will occur.
このように、相別に乗算器を設けた従来の三相電子式電
力量計を第1図に示す。1,2.3は配電線、PT+
、PT2は計器用変圧器、 C’T、 。FIG. 1 shows a conventional three-phase electronic watt-hour meter in which multipliers are provided for each phase. 1, 2.3 are power distribution lines, PT+
, PT2 is a potential transformer, C'T, .
CT’2は変流器、4.5は乗算器であり1乗算器4に
は、計器用変圧器PT、により配電線1.2間の電圧に
比例して降圧された電圧evlと、変流器CTIにより
配電線1に流れる電流に比例して降流された電流を、変
流器負担抵抗RLIにより受けることによって発生する
電圧e1mとが入力され。CT'2 is a current transformer; 4.5 is a multiplier; A voltage e1m generated by receiving a current proportional to the current flowing through the distribution line 1 by the current transformer CTI and receiving it by the current transformer burden resistor RLI is input.
乗算器4は瞬時電力に比例1−た電圧ePlを出力する
。同様に乗算器5には、計器用変圧器PT2により配電
線2.3間の電圧に比例して降圧された電圧eV2と、
変流器CT2により配電線3に流れる電流に比例して降
流された電流を、変流器負用抵抗RL2により受けるこ
とによって発生する電圧e12とが入力され1乗算器5
は瞬時電力に比例した電圧eP2を出力する。電圧ep
l+ eptはそれぞれ抵抗R,、R,を経て電流周波
数変換回路6に入力され、電流周波数変換回路6内に設
けられた仮想接地点にて電流合成され、合成電流Ipt
に比例したパルス列f。が電流周波数変換回路6から出
力される。この時、合成電流■1.は次の式で示される
。The multiplier 4 outputs a voltage ePl proportional to the instantaneous power. Similarly, the multiplier 5 receives a voltage eV2 which is stepped down in proportion to the voltage between the distribution lines 2 and 3 by the potential transformer PT2,
A voltage e12 generated by receiving a current lowered by the current transformer CT2 in proportion to the current flowing through the distribution line 3 by the current transformer negative resistor RL2 is inputted to the multiplier 5.
outputs a voltage eP2 proportional to the instantaneous power. voltage ep
l+ept are input to the current frequency conversion circuit 6 through resistors R, , R, respectively, and the currents are combined at a virtual ground point provided in the current frequency conversion circuit 6, resulting in a combined current Ipt.
A pulse train proportional to f. is output from the current frequency conversion circuit 6. At this time, the composite current ■1. is expressed by the following formula.
この時、二つの電力相互間のバランス誤差ε、が生じる
。このバランス誤差6つは、電圧ep) + ep2が
正確でs ep+ =ep2= epとすると1次の式
で示される。At this time, a balance error ε between the two powers occurs. These six balance errors are expressed by the following linear equation, assuming that the voltage ep) + ep2 is accurate and s ep+ =ep2=ep.
apl ep2
R,Rt
讐
このように、従来の多相電子式電力量計においては1乗
算器4.5により電力に正確に比例した電圧ep+ *
eptが得られても1本来等しい値に設定された抵抗
R,、R,の相対誤差により電力相互間のバランス誤差
εイを生じてしまう。すなわち、実際には平衡負荷であ
るにもかかわらず、不平衡負荷として誤って計量してし
まうわけでカ
ある。したがって、このままでは電it計として使用で
きないため、従来では、可変抵抗等の調整手段を設けて
抵抗値を調整して抵抗Et、 、 R。apl ep2 R, Rt In this way, in the conventional multiphase electronic watt-hour meter, the 1 multiplier 4.5 generates a voltage ep+ * that is exactly proportional to the power.
Even if ept is obtained, a relative error in the resistances R, , R, which are originally set to the same value causes a balance error εa between the powers. In other words, even though the load is actually a balanced load, it may be mistakenly measured as an unbalanced load. Therefore, since it cannot be used as an electric IT meter as it is, conventionally, an adjusting means such as a variable resistor is provided to adjust the resistance value, and the resistance Et, , R is adjusted.
の相対誤差をなくシ、正確にバランスさせて使用してい
る。ところが、この種の調整は、経験が必要とされ、操
作的にも煩わしいものであった。It eliminates relative errors and is used in an accurately balanced manner. However, this type of adjustment requires experience and is troublesome to operate.
本発明の目的は、上述した問題点を解決し。The object of the present invention is to solve the above-mentioned problems.
相別の乗算器の出力電圧を1℃流に変換する各抵抗の間
に相対誤差があっても、調整を必要とせずに、電力相互
間のバランス誤差をなくすことができる多相電子式電力
量計を提供することである。Multi-phase electronic power converts the output voltage of each phase multiplier into a 1°C current.Even if there is a relative error between each resistor, the balance error between power sources can be eliminated without the need for adjustment. The purpose is to provide a meter.
この目的を達成するために1本発明は、相別の乗算器の
出力電圧を電流に変換する各抵抗と乗算器との接続関係
を、一定期間毎に入れ換え、該入れ換えを繰り返す切換
手段を設け、以て。In order to achieve this object, the present invention provides a switching means that switches the connection relationship between the multiplier and each resistor that converts the output voltage of the multiplier for each phase into a current at regular intervals, and repeats the switching. , here.
電流周波数変換回路の仮想接地点に流れ込む相別の電流
値を、相別の乗算器の出力電圧を前記抵抗により順次変
換した電流の平均値としたことを特徴とする。The current value for each phase flowing into the virtual ground point of the current frequency conversion circuit is set to the average value of the currents obtained by sequentially converting the output voltage of the multiplier for each phase using the resistor.
以下、本発明を図示の実施例に基いて詳細に説明する。Hereinafter, the present invention will be explained in detail based on illustrated embodiments.
第2図は、3相式である本発明の一実施例を示す。第1
図と同一の部分は同一符号にて示す。FIG. 2 shows an embodiment of the invention that is three-phase. 1st
Parts that are the same as those in the figures are designated by the same reference numerals.
第2図において、7はコンパレータ、R,、R4は帰還
抵抗、8はT型7リツプフロツプ、9,10.11.1
2はアナログスイッチであり1以上が本発明の切換手段
に相当している。コンパレータ7と帰還抵抗R,、R,
とは、ゼロクロスコンパレータを構成し、コンパレータ
7の反転入力端には計器用変圧器PT、の出力電圧ev
1が入力しているため、コンパレータ7の出力は電圧e
v1が07以上の時ローレベル、0■以下のときハイレ
ベルとなって、この信号がT型フリップ70ツブ8に入
力する。電圧evlは50 Hzないし60Hzの交流
電圧であるから、T型りリップ70ツブ8の出力は、2
5Hzないし30H2のマークスペース1対10周期で
極性を反転する。In Figure 2, 7 is a comparator, R, , R4 is a feedback resistor, 8 is a T-type 7 lip-flop, 9, 10.11.1
2 is an analog switch, and 1 or more correspond to the switching means of the present invention. Comparator 7 and feedback resistor R, , R,
constitutes a zero-cross comparator, and the inverting input terminal of comparator 7 is connected to the output voltage ev of the potential transformer PT.
1 is input, the output of comparator 7 is the voltage e
When v1 is 07 or more, it is a low level, and when it is 0■ or less, it is a high level, and this signal is input to the T-type flip 70 tube 8. Since the voltage evl is an AC voltage of 50 Hz to 60 Hz, the output of the T-shaped lip 70 and the knob 8 is 2
The polarity is reversed every 1 to 10 periods for a mark space of 5 Hz to 30 H2.
°r型ラフリップフロップ8出力Qがノ\イレベル、出
力会がローレベルの一定期間、アナログスイッチ9,1
2がオン、アナログスイッチ10.11がオフとなるた
め1乗算回路4の出力電圧epHは抵抗R2に、また乗
算回路5の出力電圧e7は抵抗R,にそれぞれ印加され
、電流に変換されて電流周波数変換回路6の仮想接地点
にて電流合成される。また、T型フリップフロップ8の
出力Qがローレベル、出力Qがノ・イレベルの一定期間
、アナログスイッチ10.11がオン。°R type rough flip-flop 8 output Q is at noise level, output level is low level for a certain period, analog switch 9, 1
2 is on and the analog switch 10.11 is off, the output voltage epH of the multiplier circuit 4 is applied to the resistor R2, and the output voltage e7 of the multiplier circuit 5 is applied to the resistor R, and is converted into a current. The currents are combined at the virtual ground point of the frequency conversion circuit 6. Further, the output Q of the T-type flip-flop 8 is at a low level, and the analog switches 10 and 11 are turned on for a certain period when the output Q is at a no-no level.
アナログスイッチ9,12がオフとなるため。This is because analog switches 9 and 12 are turned off.
乗算回路4の出力電圧貼は抵抗R2に、また乗算回路5
の出力電圧ep2は抵抗R1にそれぞれ印加され、′1
1L流に変換されて、電流周波数変換回路6の仮想接地
点にて電流合成される。The output voltage of the multiplier circuit 4 is connected to the resistor R2, and the output voltage of the multiplier circuit 5 is connected to the resistor R2.
The output voltage ep2 of is applied to the resistor R1, respectively, and '1
The current is converted into a 1L flow, and the current is combined at the virtual ground point of the current frequency conversion circuit 6.
このように1乗算器4.5に接続される抵抗R,とR6
とが一定期間毎に入れ換わり、該入れ換えが繰り返され
るから、乗算器4の出力電圧aplが抵抗R,、It2
により順次変換され、電流周波数変換回路6に入力する
電流と1乗算器5の出力電圧ep2が抵抗It、 、
it、により順次変換され、電流周波数変換回路6に入
力する電流との合成電流■itは、ある期間積算すると
。In this way, the resistors R and R6 connected to the 1 multiplier 4.5
are exchanged at regular intervals, and this exchange is repeated, so that the output voltage apl of the multiplier 4 becomes equal to the resistance R, , It2
The current input to the current frequency conversion circuit 6 and the output voltage ep2 of the 1 multiplier 5 are sequentially converted by the resistors It, ,
The composite current ■it, which is sequentially converted by the current input to the current frequency conversion circuit 6, is accumulated over a certain period of time.
となり、この時のバランス誤差ε:、は、電圧e、1゜
ep2が正確で、ePt =ep2 ”’ epとする
と1次の式で表される。At this time, the balance error ε: is expressed by the following linear equation, assuming that the voltage e, 1°ep2 is accurate, and ePt =ep2''ep.
= Of4)
このように1本発明によれば、抵抗R1とR7の間に相
対誤差があっても、電力相互間のバランス誤差を0とす
ることができる。= Of4) As described above, according to the present invention, even if there is a relative error between the resistors R1 and R7, the balance error between the electric powers can be made zero.
以上、三相電子式電力量針の3線式の場合について説明
したが、第3図に、4線式の場合の。The case of the three-wire type three-phase electronic power amount needle has been described above, but FIG. 3 shows the case of the four-wire type.
本発明の別の実施例を示す。第2図と同一の部分は同一
符号にて示す。また、第4図は、第3図の回路の各部分
における信号状態を表したタイムチャートである。第3
図において、13は配電線の中性線、14は乗算器、1
5.16はJK型スフリップフロップ17はアンドゲー
ト。Another embodiment of the invention is shown. The same parts as in FIG. 2 are designated by the same reference numerals. Moreover, FIG. 4 is a time chart showing signal states in each part of the circuit of FIG. 3. Third
In the figure, 13 is the neutral wire of the distribution line, 14 is the multiplier, 1
5.16 is a JK type flip-flop 17 is an AND gate.
18〜26はアナログスイッチ、PT、は計器用変圧器
、CTsは変流器、R1は抵抗、 ]R1,*は変流器
負担抵抗% ■onは電源電圧である。第3図のうち、
コンパレータ7、抵抗R3,R,、JK型フリッズフロ
ップ15.16.アンドゲート17.アナログスイッチ
18〜26が本発明の切換手段に相当している。この切
換手段内の各部の信号状態は第4図に示した通りであり
、J K型フリップフロップ15のQ出力である信号T
1と、JKKフリップフロップ16のQ出力である信号
T2と、アンドゲート17の出力である信号T3とは。18 to 26 are analog switches, PT is a voltage transformer, CTs is a current transformer, R1 is a resistor, ]R1, * is the current transformer burden resistance %, and 1 is the power supply voltage. In Figure 3,
Comparator 7, resistor R3, R,, JK type flip-flop 15.16. And gate 17. The analog switches 18 to 26 correspond to the switching means of the present invention. The signal states of each part in this switching means are as shown in FIG.
1, the signal T2 which is the Q output of the JKK flip-flop 16, and the signal T3 which is the output of the AND gate 17.
互いに位相かに周期ずつずれたマークスペース1対2の
信号となる。(i号T、がハイレベル、信号T2とT、
がローレベルの時は、アナログスイッチ1B、22.2
6がオン、他がオフとなり。The signals are a one-to-two mark space signal that is shifted in phase or period from each other. (No. i T, high level, signals T2 and T,
When is low level, analog switch 1B, 22.2
6 is on and the others are off.
乗算器4,5.14の出力電圧epl+ ep> +
epsはそれぞれ抵抗R,、11,2,B、に印加され
る。信号T2がハイレベル、信号TsとTIカローレベ
ルの時ハ。Output voltage of multipliers 4, 5.14 epl+ ep> +
eps are applied to resistors R, 11, 2, and B, respectively. C when the signal T2 is at high level and the signal Ts and TI are at low level.
アナログスイッチ19.23.24がオン、他がオフと
1gす、電圧eM + ePt * epsはそれぞれ
抵抗R2,R,、、R,に印加される。信号T3がハイ
レベル。When the analog switches 19, 23, and 24 are on and the others are off, a voltage eM + ePt * eps is applied to the resistors R2, R, , , R, respectively. Signal T3 is high level.
信号T、とT、がローレベルの時は、アナログスイッチ
20.21.25がオン、他がオフとなり、電圧eP1
+ ept + ep3はそれぞれ抵抗R,、R,、R
,に印加される。When the signals T and T are at low level, the analog switches 20, 21, and 25 are on, the others are off, and the voltage eP1
+ ept + ep3 are the resistances R,, R,, R, respectively
, is applied to .
このように、乗算器4.5.14に接続される抵抗R2
とR7とR6とが信号T1〜T、のマーク期間に相当す
る一定期間毎に入れ換わり、該入れ換えが繰り返される
から、3m式の場合と同様。Thus, the resistor R2 connected to the multiplier 4.5.14
, R7 and R6 are exchanged every fixed period corresponding to the mark period of the signals T1 to T, and this exchange is repeated, similar to the case of the 3m type.
電流周波数変換回路6の仮想接地点に流れ込む相別の電
流値は、相別の乗算器4.5.14の出力電圧epl
1ept + e++3の各々を抵抗R,,B、、 I
t、により順次変換した三つの電流値の平均値となり。The current value for each phase flowing into the virtual ground point of the current frequency conversion circuit 6 is the output voltage epl of the multiplier 4.5.14 for each phase.
1ept + e++3 each with a resistor R,,B,,I
This is the average value of the three current values sequentially converted by t.
この時バランス誤差は電圧e+++ + epz *
epsが正確ならば、0となる。At this time, the balance error is the voltage e+++ + epz *
If eps is accurate, it will be 0.
なお1以上説明した3線式、4線式の二つの実施例とも
に、コンパレータ7の反転入力端に入力する信号は、変
圧器PT、の出力evlを用いたが、他の周波数の信号
を用いることも勿論可能である。Note that in both the three-wire and four-wire embodiments described above, the signal input to the inverting input terminal of the comparator 7 is the output evl of the transformer PT, but it is also possible to use a signal of another frequency. Of course, this is also possible.
以上説明したよ5に1本発明によれば、相別の乗算器の
出力電圧を電流に変換する各抵抗と乗算器との接続関係
を、一定期間毎に入れ換え。As explained above, according to the present invention, the connection relationship between the multiplier and each resistor that converts the output voltage of the multiplier for each phase into a current is changed at regular intervals.
該入れ換えを繰り返す切換手段を設け、以て、電流周波
数変換回路の仮想接地点に流れ込む相別の電流値を、相
別の乗算器の出力電圧を前記抵抗により順次変換した電
流の平均値としたから、相別の乗算器の出力電圧を電流
に変換する各抵抗の間に相対誤差があっても5調整を必
要とせずに、電力相互間のバランス誤差をなくすことが
できる。A switching means is provided that repeats the switching, so that the current value for each phase flowing into the virtual ground point of the current frequency conversion circuit is made the average value of the current obtained by sequentially converting the output voltage of the multiplier for each phase using the resistor. Therefore, even if there is a relative error between the resistors that convert the output voltage of the multiplier for each phase into a current, the balance error between the power sources can be eliminated without requiring adjustment.
第1図は従来の三相3線式電子式屯力量計のブロック図
、第2図は本発明の一実施例である三相3線式電子式電
力量計のブロック図、第3図は本発明の別の実施例であ
る三相4m式電子式電力量計のブロック図、第4図は第
3図の実施例の各部分における信号状態を示したタイム
チャートである。
4.5.14・・・乗算器、6・・・電流周波数変換回
路、7・・・コンパレータ、8・・・T型フリップフロ
ップ、9〜12.18〜26・・・アナログスイッチ、
15.16・・・JK型スフリップフロップ 17・
・・アンドゲート、 R,、R,。
R,1,、抵抗、R,、R,…帰還抵抗+ epl −
eP2 * eP9・・・各乗算器の出力電圧、fo・
・・パルス列。
特許出願人 東京電力株式会社 外1名代理人 中 村
稔
第1図
第2図Fig. 1 is a block diagram of a conventional three-phase three-wire electronic power meter, Fig. 2 is a block diagram of a three-phase three-wire electronic watt-hour meter that is an embodiment of the present invention, and Fig. 3 is a block diagram of a conventional three-phase three-wire electronic power meter. FIG. 4 is a block diagram of a three-phase 4m electronic watt-hour meter which is another embodiment of the present invention, and is a time chart showing signal states in each part of the embodiment of FIG. 4.5.14... Multiplier, 6... Current frequency conversion circuit, 7... Comparator, 8... T-type flip-flop, 9-12. 18-26... Analog switch,
15.16...JK type flip-flop 17.
...andgate, R,,R,. R, 1,, resistance, R,, R,...feedback resistance + epl -
eP2 * eP9...Output voltage of each multiplier, fo.
...Pulse train. Patent applicant: Tokyo Electric Power Company, Inc. (1 person) Minoru Nakamura Figure 1 Figure 2
Claims (1)
。相別に設けられた乗算器と、各乗算器の出力電圧を電
流に変換する抵抗と、内部に仮想接地点を有し、該仮想
接地点にて前記電流を合成して1合成電流に比例したパ
ルス列を出力する電流周波数変換回路とを備えた多相電
子式電力量計において、前記抵抗と乗算器との接続関係
を、一定期間毎に入れ換え、該入れ換えを繰り返す切換
手段を設けたことを特徴とする多相電子式電力量計。1. Outputs a voltage proportional to the load voltage and load current. It has a multiplier provided for each phase, a resistor that converts the output voltage of each multiplier into a current, and a virtual ground point inside, and the currents are combined at the virtual ground point and proportional to one composite current. A polyphase electronic watt-hour meter equipped with a current frequency conversion circuit that outputs a pulse train, characterized in that a switching means is provided that switches the connection relationship between the resistor and the multiplier every fixed period and repeats the switching. A multi-phase electronic watt-hour meter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59056147A JPS60200175A (en) | 1984-03-26 | 1984-03-26 | Multi-phase electronic type electric watthour meter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59056147A JPS60200175A (en) | 1984-03-26 | 1984-03-26 | Multi-phase electronic type electric watthour meter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60200175A true JPS60200175A (en) | 1985-10-09 |
JPH028661B2 JPH028661B2 (en) | 1990-02-26 |
Family
ID=13018968
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59056147A Granted JPS60200175A (en) | 1984-03-26 | 1984-03-26 | Multi-phase electronic type electric watthour meter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60200175A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5793263A (en) * | 1980-11-29 | 1982-06-10 | Toshiba Corp | Watt-hour meter employing hall element |
JPS57111454A (en) * | 1980-11-17 | 1982-07-10 | Siemens Ag | Electronic type 3-phase watthour meter |
-
1984
- 1984-03-26 JP JP59056147A patent/JPS60200175A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57111454A (en) * | 1980-11-17 | 1982-07-10 | Siemens Ag | Electronic type 3-phase watthour meter |
JPS5793263A (en) * | 1980-11-29 | 1982-06-10 | Toshiba Corp | Watt-hour meter employing hall element |
Also Published As
Publication number | Publication date |
---|---|
JPH028661B2 (en) | 1990-02-26 |
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