JPS6019866B2 - Automatic power on/off circuit - Google Patents
Automatic power on/off circuitInfo
- Publication number
- JPS6019866B2 JPS6019866B2 JP52118462A JP11846277A JPS6019866B2 JP S6019866 B2 JPS6019866 B2 JP S6019866B2 JP 52118462 A JP52118462 A JP 52118462A JP 11846277 A JP11846277 A JP 11846277A JP S6019866 B2 JPS6019866 B2 JP S6019866B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- power
- transmission data
- terminal device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems
- H04M11/06—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Communication Control (AREA)
Description
【発明の詳細な説明】
本発明は、端末機器の電話交換網での通信時における電
源投入をセンターからの信号により自動的にＯＮ−ＯＦ
Ｆする制御に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention automatically turns on and off the power of a terminal device during communication in a telephone exchange network by a signal from a center.
Regarding control of F.
本発明の目的は露電話交換網の伝送を行う場合、被呼側
端末装置にオペレータが不在であっても被呼側端末装置
の電源を自動的に投入し受信を可能とさせ、端末装置が
正常に動作したときには端末装置の受信終了後自動的に
電源を切断するとともに、端末装置からの送信データを
監視して端末装置が正常に動作していないと判断したと
きにも端末装置の電源を切断することができる回路を提
供することにある。An object of the present invention is to automatically turn on the power to the called terminal device and enable reception even when an operator is not present at the called terminal device when transmitting data over the Russian telephone exchange network. When the terminal device is operating normally, the power is automatically turned off after reception is completed, and the power to the terminal device is also turned off when it is determined that the terminal device is not operating normally by monitoring the transmitted data from the terminal device. The purpose is to provide a circuit that can be disconnected.
本発明によればモデムを介して通信回線に接続された被
呼側端末装置の電源投入および切断を制御する回路にお
いて、前記モデムからの呼出し表示信号を検出する手段
と、前記呼出し表示信号が検出された時に前記端末装置
への電源を投入する懐点回路と、前言己端末装置から前
記通信回線に送信される送信データの有無を監視し前記
送信データの非送信時間が予め定められた時間になった
ことを検出する時計手段と、前記端末装鷹から前記モデ
ムに送信されるデータ端末レディ信号のオフ状態への変
化を検出する手段と、前記計時手段または前記データ端
末レディ信号検出手段からの検出出力によって前記接点
回路の前記端末装置への電源供給を切断させる手段とを
有することを特徴とする自動電源投入切断回路が得られ
る。According to the present invention, in a circuit for controlling power-on and power-off of a called side terminal device connected to a communication line via a modem, means for detecting a ringing indication signal from the modem; a power supply circuit that turns on the power to the terminal device when the terminal device is connected to the communication line; and a power supply circuit that monitors the presence or absence of transmission data transmitted from the terminal device to the communication line, and monitors the presence or absence of transmission data transmitted from the terminal device to the communication line and waits for a predetermined time when the transmission data is not transmitted. clock means for detecting a change in the data terminal ready signal transmitted from the terminal equipment to the modem, and a clock means for detecting a change in the data terminal ready signal transmitted from the terminal equipment to the modem; There is obtained an automatic power on/off circuit characterized in that it has means for cutting off the power supply of the contact circuit to the terminal device based on the detection output.
次に本発明の実施例について図面を参照して説明する。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の第１の実施例を示す。本発明の第１の
実施例は呼出し表示およびデータ端末レディ検出回路１
７、送信データ検出回路２０および送信データ監視タイ
マー回路３０より構成されている。呼出し表示およびデ
ータ端末レディ検出回路１０‘ま、フリツプフロップ１
１、ＡＮＤ回路１３、ＮＡＮＤ回路１６、ＩＮＶ回路１
４、およびＩＮＶ回路１５より構成され、モデムから
の呼出し表示信号を検出して被呼側装置の電源を投入す
るための接点回路４０をＯＮにする。FIG. 1 shows a first embodiment of the invention. A first embodiment of the invention is a call indication and data terminal ready detection circuit 1.
7. Consists of a transmission data detection circuit 20 and a transmission data monitoring timer circuit 30. Call indication and data terminal ready detection circuit 10', flip-flop 1
1, AND circuit 13, NAND circuit 16, INV circuit 1
4, and an INV circuit 15, which detects a call indication signal from the modem and turns on a contact circuit 40 for turning on the power of the called device.
そして被呼側装置の受信動作終了後、発呼側装置から送
られてくる受信データの終了を示す信号によってオフ状
態となる被呼側装置のデータ端末レディ信号を検出して
接点回路４０をオフにする。さらに、電源を投入した被
呼側装置から発呼側装置へ送られるべき送信データの有
無を検出し、この送信データ信号が一定時間送られて来
なかった場合にも、送信データ監視タイマー回路３０か
らのその情報を受け前記接点回路４０をＯＦＦにする回
路である。After the receiving operation of the called device is completed, the contact circuit 40 is turned off by detecting the data terminal ready signal of the called device which is turned off by a signal sent from the calling device indicating the end of the received data. Make it. Furthermore, the transmission data monitoring timer circuit 30 detects the presence or absence of transmission data to be sent from the powered-on called device to the calling device, and even if this transmission data signal is not sent for a certain period of time, the transmission data monitoring timer circuit 30 This circuit receives the information from the contact point circuit 40 and turns off the contact circuit 40.
即ちＮＡＮＤ回路１６はデータ端末レディ信号と呼出し
表示信号のオア回路であり、呼出し表示がＯＮ‘こなる
と、フリップフロツプ１１のリセットを解除し被呼側装
置の電源を投入する。その後呼出し表示信号ＯＮ、デー
タ端末レディ信号ＯＮの期間を経てデータ端末レディ信
号がＯＦＦになるとフリップフロツプ１ １をリセット
する。また送信データ信号が一定時間送られて来なかっ
たことを示す送信データ監視タイマー回路３０からの信
号ＫがＬＯＷになるとフｌｊツプフロップ１１はＯＦＦ
となり被呼側装置の電源をＯＦＦにする。送信データ検
出回路２０はモデムからの呼出し表示信号検出後、送信
データ信号を監視する回路であり、フリツプフロツプ１
９，２１、ＮＡＮＤ回路１７、ＮＡＮＤ回路１８から構
成される。That is, the NAND circuit 16 is an OR circuit of the data terminal ready signal and the paging indication signal, and when the paging indication turns ON', the reset of the flip-flop 11 is canceled and the power of the called side device is turned on. Thereafter, after a period in which the call indication signal is ON and the data terminal ready signal is ON, when the data terminal ready signal turns OFF, the flip-flop 11 is reset. Further, when the signal K from the transmission data monitoring timer circuit 30 indicating that no transmission data signal has been sent for a certain period of time becomes LOW, the flip-flop 11 turns OFF.
Then, the power of the called device is turned off. The transmission data detection circuit 20 is a circuit that monitors the transmission data signal after detecting the call indication signal from the modem.
9, 21, a NAND circuit 17, and a NAND circuit 18.
送信データ信号をＩＮＶ回路２３を介してフリツプフロ
ップ１９，２１で受け、クロック１で切直し、フリツブ
フロツプ１９および２１の１クロツク分の遅れを利用し
て立上り微分信号Ｆと立下り微分信号Ｅとを作り送信デ
ータ監視タイマー回路３０をリセットする。送信データ
監視タイマー回路３０はタイマー３１とＡＮＤ回路１２
、ＷＶ回路２２とから成り送信データ信号が変化しない
場合にはタイマー３１を動作状態にしておき一定時間送
信データが変化しない場合は、送信データ監視タイマー
回路３川まタイムアウトとなりｍＶ回路２２を介した信
号ＫがＬＯＷになるのでフリツプフロツプ１ １がＯＦ
Ｆになり、被呼側装置の電源をＯＦＦにする。The transmission data signal is received by the flip-flops 19 and 21 via the INV circuit 23, and switched at clock 1, and a rising differential signal F and a falling differential signal E are generated using the one-clock delay of the flip-flops 19 and 21. The transmission data monitoring timer circuit 30 is reset. The transmission data monitoring timer circuit 30 includes a timer 31 and an AND circuit 12.
, and a WV circuit 22. If the transmission data signal does not change, the timer 31 is kept in operation. If the transmission data does not change for a certain period of time, the transmission data monitoring timer circuit 3 times out and the signal is transmitted via the mV circuit 22. Since the signal K becomes LOW, flip-flop 11 is turned off.
F and turns off the power of the called device.
続いてタイムチャートを参照して第１図に示された第１
の実施例の動作を説明する。まず第３図のタイムチャー
は、電線が投入された被呼側端末装置が正常に動作し、
発呼側装置からモデムを介して送られてくる種々の制御
信号および受信データ（図示せず）に応答して被呼側装
道から送出される送信データ信号２が正常に送られて来
た場合のものである。Next, referring to the time chart, the first
The operation of the embodiment will be explained. First, the time chart in Figure 3 shows that the called terminal equipment to which the wire is connected is operating normally.
The transmission data signal 2 sent from the called device in response to various control signals and received data (not shown) sent from the calling device via the modem has been successfully sent. It is a matter of the case.
フリツプフロツプ１１のリセットＲには呼出し表示信号
３とデータ端末レディ信号４のオア信号日が、クロツク
ＣＰ‘こはクロツク信号１が入力されている。The reset signal R of the flip-flop 11 receives the OR signal of the call indication signal 3 and the data terminal ready signal 4, and the clock signal 1 of the clock CP'.
呼出し表示信号３が“１”になると、、フリップフロツ
プ１１のリセットが解除され、クロック信号１により出
力Ｑが“１”となり接点回路４０が閉じて被呼側装置電
源がＯＮとなる。When the call display signal 3 becomes "1", the reset of the flip-flop 11 is released, the output Q becomes "1" due to the clock signal 1, the contact circuit 40 is closed, and the power source of the called side device is turned on.
電源が投入された被呼側装置は、呼出し表示信号３の受
信によって動作準備ができた時点でデータ端末レディ信
号４をＯＮとし、発呼側装置から送られてくる種々のデ
ータによって動作制御される。このとき被呼側装置は発
呼側への応答および要求されたデータ等を含む送信デー
タ２を送出する。一方、電源投入切断制御回路への被呼
側装置からの送信データ信号２は正常に送られて来てい
るので、信号Ｊは送信データ監視タイマー回路３１のリ
セットをつねにリセットしているので信号Ｋはつねに“
１”である。この間データ端末レディ信号４は“１”で
なるので、フリツプフロツプ１１は、データ端末レディ
信号４が“０”となるまでＯＮの状態である。発呼側装
置からのデータ送出がすべて終了すると、被呼側装置は
その受信データの最後に付加されるＥＯＴ信号を検出し
てデータ端末レディ信号４をオフ状態にする。この信号
４は本電源制御回路に供給され、ィンバータ５、ナンド
回路１６、およびアンド回路１３を介してフリップフロ
ッブ１１をＯＦＦする。これにより接点回路４０は被呼
側装置への電源を切断する。次に送信データ信号が変化
しない場合、すなわち被呼側装置に電源が供給されてい
るにもかかわらず、被呼側装置が正常に動作しない場合
のタイムチャ−トである第４図について説明する。呼出
し信号３が“１”になった時の動作は前記と同じである
。The called device that has been powered on turns on the data terminal ready signal 4 when it is ready for operation by receiving the paging indication signal 3, and its operation is controlled by various data sent from the calling device. Ru. At this time, the called device sends transmission data 2 including a response to the calling party, requested data, and the like. On the other hand, since the transmission data signal 2 from the called device to the power on/off control circuit is being sent normally, the signal J always resets the transmission data monitoring timer circuit 31, so the signal K Always “
During this time, the data terminal ready signal 4 becomes "1", so the flip-flop 11 remains in the ON state until the data terminal ready signal 4 becomes "0". When all is completed, the called device detects the EOT signal added to the end of the received data and turns off the data terminal ready signal 4. This signal 4 is supplied to the main power supply control circuit, and the inverter 5, The flip-flop 11 is turned off via the NAND circuit 16 and the AND circuit 13.This causes the contact circuit 40 to cut off the power to the called device.Next, if the transmitted data signal does not change, that is, the called device 4, which is a time chart when the called device does not operate normally even though power is supplied to the device.The operation when the calling signal 3 becomes "1" is as described above. is the same as
被呼側装置から発呼側装置への応答信号である送信デー
タ信号２が変化しなかった場合信号Ｊは送信データ監視
タイマー回路３１のリセツトＲをリセットから解除し、
一定時間送信データ信号２が変化しない場合送信データ
監視タイマー回路３１は、タイムアウトとなり信号Ｋは
“０”となる。If the transmission data signal 2, which is a response signal from the called device to the calling device, does not change, the signal J releases the reset R of the transmission data monitoring timer circuit 31 from the reset state.
If the transmission data signal 2 does not change for a certain period of time, the transmission data monitoring timer circuit 31 times out and the signal K becomes "0".
よってフリツプフロツプ１１の出力Ｑは“０”となり接
点回路４０がオープンとなり被呼側装置の電源をＯＦＦ
にする。第２図は本発明の第２の実施例である。Therefore, the output Q of the flip-flop 11 becomes "0", the contact circuit 40 becomes open, and the power to the called device is turned off.
Make it. FIG. 2 shows a second embodiment of the invention.
の第２の実施例は送信データ信号２につながる回路をｍ
Ｖ回路２４、遅延回路２５、ＮＡＮＤ回路２６、ＮＡＮ
Ｄ回路２７で構成（送信データ検出回路）以外は第１実
施例と同じである。特に具体的な説明を省略する。本発
明は以上説明したように、モデムからの呼出し表示信号
、モデムへの送信データ信号、データ端末レディ信号を
使って自動電源投入回路を構成することにより、電話交
換網の受信側を自動的に電源を投入又は切ることが出来
、もう一つの効果として自動的に電源を投入後、受信装
置側に異常が生じた場合それを探知し電源を切ることが
出釆る。In the second embodiment, the circuit connected to the transmitted data signal 2 is m
V circuit 24, delay circuit 25, NAND circuit 26, NAN
The configuration is the same as the first embodiment except for the configuration of the D circuit 27 (transmission data detection circuit). Particularly specific explanation will be omitted. As explained above, the present invention automatically turns on the receiving side of a telephone exchange network by configuring an automatic power-on circuit using a call indication signal from a modem, a transmission data signal to the modem, and a data terminal ready signal. The power can be turned on or off, and another effect is that if an abnormality occurs on the receiving device side after the power is turned on automatically, it can be detected and the power is turned off.
第１図は、本発明の実施例を示す図、第２図は本発明の
第２の実施例を示す図、第３図は第１図のタイムチャー
トであり、送信データ信号が正常な場合のタイムチャー
トを示す図、第４図は送信データ信号が変化しなかった
場合のタイムチャートを示す図である。
１１，１９，２１……フリツプフロツブ「３１……タイ
マー、１４，１５，２２，２３……インバータ（瓜Ｖ）
回路、１６，１７，１８・・・・・・ナンド（ＮＡＮＤ
）回路、１ ２，１ ３・・・・・・アンド（ＡＮＤ）
回路、２５…・・・遅延回路、１０・・・・・・呼出し
表示およびデータ端末レディ検出回路、３０・・・・・
・送信データ監視タイマー回路、２０・・・・・・送信
データ検出回路、４０・・・・・・接点回路。
猪′図図
〜
聡
袴Ｊ図
驚く図Fig. 1 is a diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing a second embodiment of the invention, and Fig. 3 is a time chart of Fig. 1, when the transmitted data signal is normal. FIG. 4 is a diagram showing a time chart when the transmission data signal does not change. 11, 19, 21...Flip flop "31...Timer, 14, 15, 22, 23...Inverter (Melon V)
Circuit, 16, 17, 18...NAND
) circuit, 1 2, 1 3...and (AND)
Circuit, 25...Delay circuit, 10...Call indication and data terminal ready detection circuit, 30...
- Transmission data monitoring timer circuit, 20... Transmission data detection circuit, 40... Contact circuit. Boar diagram ~ Satoshi Hakama J diagram surprising diagram
Claims (1)
置の電源投入および切断を制御する回路において、前記
モデムからの呼出し表示信号を検出する手段と、前記呼
出し表示信号が検出された時に前記端末装置への電源を
投入する接点回路と、前記端末装置から前記通信回線に
送信される送信データの有無を監視し前記送信データの
非送信時間が予め定められた時間になつたことを検出す
る計時手段と、前記端末装置から前記モデムに送信され
るデータ端末レデイ信号のオフ状態への変化を検出する
手段と、前記計時手段または前記データ端末レデイ信号
検出手段からの検出出力によつて前記接点回路の前記端
末装置への電源供給を切断させる手段とを有することを
特徴とする自動電源投入切断回路。1. In a circuit for controlling power-on and power-off of a called terminal device connected to a communication line via a modem, means for detecting a paging indication signal from the modem, and means for detecting the paging indication signal from the modem when the paging indication signal is detected. A contact circuit turns on power to the terminal device, and monitors the presence or absence of transmission data transmitted from the terminal device to the communication line, and detects that the non-transmission time of the transmission data has reached a predetermined time. a timer; a means for detecting a change in the data terminal ready signal transmitted from the terminal device to the modem; and a detection output from the timer or the data terminal ready signal detecting means, An automatic power on/off circuit comprising means for cutting off power supply to the terminal device of the circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52118462A JPS6019866B2 (en) | 1977-09-30 | 1977-09-30 | Automatic power on/off circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52118462A JPS6019866B2 (en) | 1977-09-30 | 1977-09-30 | Automatic power on/off circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5451702A JPS5451702A (en) | 1979-04-23 |
| JPS6019866B2 true JPS6019866B2 (en) | 1985-05-18 |
Family
ID=14737245
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52118462A Expired JPS6019866B2 (en) | 1977-09-30 | 1977-09-30 | Automatic power on/off circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6019866B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4484028A (en) * | 1982-11-01 | 1984-11-20 | Motorola, Inc. | Digital loop transceiver having a power up/down circuit |
| JPS5995750A (en) * | 1982-11-25 | 1984-06-01 | Matsushita Electric Ind Co Ltd | Home control system |
| KR900005796B1 (en) * | 1986-12-02 | 1990-08-11 | 삼성전자 주식회사 | Method for controlling the power supply of modem |
-
1977
- 1977-09-30 JP JP52118462A patent/JPS6019866B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5451702A (en) | 1979-04-23 |
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