JPS60194550A - Hybrid ic - Google Patents

Hybrid ic

Info

Publication number
JPS60194550A
JPS60194550A JP5053884A JP5053884A JPS60194550A JP S60194550 A JPS60194550 A JP S60194550A JP 5053884 A JP5053884 A JP 5053884A JP 5053884 A JP5053884 A JP 5053884A JP S60194550 A JPS60194550 A JP S60194550A
Authority
JP
Japan
Prior art keywords
resin
hybrid integrated
creeping
integrated circuit
hybrid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5053884A
Other languages
Japanese (ja)
Inventor
Hideo Miyauchi
宮内　秀男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5053884A priority Critical patent/JPS60194550A/en
Publication of JPS60194550A publication Critical patent/JPS60194550A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3405—Edge mounted components, e.g. terminals

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent direct contact of loaded components with a printed board by outer coating of resin over a hybrid IC by a method wherein the creeping of the resin is prevented by forming bends which block its creeping in a part of ways to the electric connection. CONSTITUTION:This is an application to the hybrid IC where bear chips 2a as active elements have been mounted to the front 1a of an insulation substrate and bonded, and active element 2a such as a mold IC, a mold transistor, and diode and a passive element 2b such as capacitor have been loaded by soldering. Outer terminals 3 of the hybrid IC are bent in U-shape at their bases, thus forming loading parts 3b to be inserted to the substrate 1; besides, bends 3c which block the creeping of resin are formed by bending a part of ways of the electric connections 3a in U-shape, with these left at terminals.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、外部端子の部分を残して外表面に樹脂を塗布
し外装コーティングを施す混成集積回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field to which the Invention Pertains] The present invention relates to a hybrid integrated circuit in which an outer coating is applied by applying a resin to the outer surface of the circuit, leaving only the external terminal portions.

〔従来技術〕[Prior art]

混成集積回路は、第１図〜第３図に示すように導体膜、
抵抗膜々どを形成した絶縁基板１上に集積回路素子やト
ランジスタ、ダイオードなどの能動素子２ａおよびコイ
ル、コンデンサ、抵抗素子などの受動素子２ｂを搭載し
、種々な性能をもたせたものであり、通信装置、コンビ
ーータ用中央処理装置などの産業分野、家電製品などの
民生分野など数多くの分野で利用され、装置の小型化に
寄与している。As shown in FIGS. 1 to 3, a hybrid integrated circuit consists of a conductor film,
Active elements 2a such as integrated circuit elements, transistors, and diodes, and passive elements 2b such as coils, capacitors, and resistive elements are mounted on an insulating substrate 1 on which resistive films are formed, and various performances are provided. It is used in many fields, including industrial fields such as communication equipment and central processing units for converters, and consumer fields such as home appliances, and contributes to the miniaturization of devices.

また、将来においても、混成集積回路も現在より、更に
小型化を要求されるが、その対応策として、搭載する部
品を絶縁基板の表裏両面に搭載するか、あるいは片面に
部品をそれぞれ搭載した、異なる回路機能をもつ２枚の
絶縁基板を、部品が搭載されていない面同士を突き合せ
てはり合わせることが行なわれておシ、この場合に混成
集積回路は多機能をもつことになるために、外部端子が
多くなり、ＳＩＰ型の外部端子では不足となり、　ＤＩ
Ｐ型の外部端子３．・・・が必要となる。In addition, in the future, hybrid integrated circuits will also be required to be even more compact than they currently are, and as a countermeasure, it is possible to mount components on both the front and back sides of an insulating substrate, or to mount components on one side. Two insulating substrates with different circuit functions are bonded together with their non-component surfaces facing each other, and in this case, the hybrid integrated circuit has multiple functions. , the number of external terminals increases, and SIP type external terminals are insufficient, so DI
P-type external terminal 3. ···Is required.

ところで、ＤＩＰ型端子を装備した混成集積回路の外装
コーティングは、従来、ケース封止、あるいは混成集積
回路全体をモールド化することにより施していた。Incidentally, the exterior coating of a hybrid integrated circuit equipped with DIP type terminals has conventionally been applied by sealing the case or molding the entire hybrid integrated circuit.

しかしながら、上記の方法のうち、第１図に示すケース
封止は混成集積回路の形状全体が犬きくなシ、小型化に
相反し、また、ケース４．の費用がかかるとともにケー
ス封止の加工費がかかる分、単価が高くなる。また、基
板１、ケース４・、封止剤５の伸縮率がそれぞれ異なり
、そのためクランクが入るｉｊＪ能性があり、信頼性に
欠けるものであった。However, among the above methods, the case sealing shown in FIG. This increases the unit price due to the additional costs involved in sealing the case. Further, the expansion/contraction ratios of the substrate 1, the case 4, and the sealant 5 are different from each other, and therefore there is a possibility that a crank may be inserted, resulting in a lack of reliability.

また、第２図に示す混成集積回路全体をモールド化６す
る方法は、多種類のモールド金型を必要どし、設Ｗｉｔ
費がかかシ、大量生産にならないと採算がとれず、混成
集積回路特有の少量多品種のものには不向きであり、非
常に単価が高くなるという欠点があった。Furthermore, the method of molding the entire hybrid integrated circuit shown in FIG.
It is expensive, cannot be profitable unless mass produced, is unsuitable for small-volume, high-mix production, which is typical of hybrid integrated circuits, and has the drawback of being extremely expensive.

」二記の方法に対し、第８図に示すようにフェノ−／Ｌ
／樹脂、シリコーン樹脂７を塗布する方法がある。樹脂
を塗布するには混成集積回路を１つ毎に作業を行い、か
つ両面を塗布する必要があるため、加工時間が非常に長
く、加工費が高くなり、単価が高くなる。そこで、量産
に対応する方法として、複敬個の混成集積回路を同時に
ツー。メール樹脂あるいはシリコーン樹脂に浸す方法が
ある。」二記方法は裏面に外装樹脂をまわシ込吐せなけ
ればならず、その際外部端子の一部も樹脂中に浸漬する
ことになる。ところで、混成集積回路をプリント基板に
装着するにあたっては、外部端子３の末端３ａをソケッ
トに差し込む型式と、第２図に示すように端子３の末端
３ａを折り曲げて北部を電気的接続部とし半田付けする
型式とが採られている。一般に第１図〜第３図に示すよ
うに基板１の両側に装着された外部端子３は細径のもの
であり、かつ基板１に対し直角方向に突出しだ構造であ
るだめに、外部端子の一部が樹脂中に浸漬すると、樹脂
が端子を伝わって這い上シ、端子が樹脂でコーティング
されてし１い、その結果電気的接続に支障が生じるため
、実用化されていないのが現状である。”2, as shown in Figure 8, phenol/L
/Resin, there is a method of applying silicone resin 7. In order to apply the resin, it is necessary to work on each hybrid integrated circuit one by one and to apply the coating on both sides, so the processing time is very long, the processing cost is high, and the unit price is high. Therefore, as a method for mass production, multiple hybrid integrated circuits were manufactured simultaneously. There is a method of soaking it in mail resin or silicone resin. In method 2, it is necessary to inject and discharge the exterior resin onto the back surface, and in this case, part of the external terminal is also immersed in the resin. By the way, when mounting a hybrid integrated circuit on a printed circuit board, there are two methods: one is to insert the end 3a of the external terminal 3 into a socket, and the other is to bend the end 3a of the terminal 3 and use the northern part as the electrical connection part, as shown in Figure 2, by soldering. The attached model is adopted. Generally, as shown in FIGS. 1 to 3, the external terminals 3 attached to both sides of the board 1 have a small diameter and protrude perpendicularly to the board 1. If a part is immersed in resin, the resin will creep up the terminal, coating the terminal with resin, and as a result, electrical connection will be impaired, so it is currently not in practical use. be.

壕だ、樹脂封止することによる問題点を解消するために
外装コーティングを省略して混成集積回路をプリント基
板に装着した場合には、裏面に搭載した部品が、直接、
混成集積回路を搭載するプリント板等に接触し、事故や
誤動作等が起きる危険性があり、実用的でなく、外装コ
ーティングは混成集積回路にとって必要なものである。In order to eliminate the problems caused by resin sealing, when a hybrid integrated circuit is mounted on a printed circuit board without the outer coating, the components mounted on the back side can be directly mounted on the printed circuit board.
Exterior coating is necessary for hybrid integrated circuits because it is impractical because there is a risk of accidents or malfunctions due to contact with printed circuit boards etc. on which hybrid integrated circuits are mounted.

〔発明の目的〕[Purpose of the invention]

本発明の目的は従来の欠点を取シ除き、端子への這い上
りを防いで混成集積回路に樹脂を塗布して外装コーティ
ングを施すことにより、混成集積回路を搭載するプリン
ト板に直接搭載部品が触れない１７４造をもつ混成集積
回路を供するものである。The purpose of the present invention is to eliminate the drawbacks of the conventional technology and apply resin to the hybrid integrated circuit to prevent it from creeping up onto the terminals and provide an exterior coating so that components can be directly mounted on the printed circuit board on which the hybrid integrated circuit is mounted. This provides a hybrid integrated circuit with 174 structures that cannot be touched.

〔発明の構成〕[Structure of the invention]

本発明は外部端子部分を残して外表面を樹脂にて被覆す
ることにより外装コーティングが施こされた混成集積回
路において、該回路に装備した外部端子の末端の電気的
接続部につづく途中部分の一部に樹脂の這い」二りを阻
止する屈曲部を形成したことを％徴とする混成集積回路
である。The present invention relates to a hybrid integrated circuit in which the outer surface is coated with resin except for the external terminal portion, and the intermediate portion of the external terminal connected to the electrical connection portion at the end of the external terminal provided in the circuit is provided. It is a hybrid integrated circuit characterized by the fact that a bent part is formed in a part to prevent the resin from creeping.

〔実施例〕〔Example〕

以下に、本発明の一実施例を図により説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第４図Ｇ）は能動素子としてのベアチップ２ａを絶縁基
板ｌの表面１ａにマウント、ポンディングし、その裏面
１ｂにモールドＩＣ，モールドトランジスタ、ダイオー
ド等の能動素子２ａ及びコンデンサー等の受動素子２ｂ
を半Ｂコ付けで搭載した混成集積回路に本発明を適用し
た実施例を示す図である。また第４図（ロ）は搭載部品
２ａ　、　２ｂを片面に搭載した２枚の絶縁基板１．１
を、部品が搭載されていない面同士を突き合せてはり合
せた混成集積回路に本発明を適用した場合の実施例を示
す図である。In Fig. 4G), a bare chip 2a as an active element is mounted and bonded on the front surface 1a of an insulating substrate 1, and on the back side 1b, active elements 2a such as molded ICs, molded transistors, and diodes, and passive elements 2b such as capacitors are mounted.
1 is a diagram showing an embodiment in which the present invention is applied to a hybrid integrated circuit equipped with a half-B circuit. Moreover, FIG. 4(b) shows two insulating substrates 1.1 on which mounted components 2a and 2b are mounted on one side.
FIG. 3 is a diagram showing an embodiment in which the present invention is applied to a hybrid integrated circuit in which the surfaces on which no components are mounted are butted together.

第４図（イ）、（ロ）、第５図において、本発明におけ
る混成集積回路の外部端子３はその基端をコ型に屈曲し
て基板ｌにはさみ込む装着部３ｂを形成し、かつ末端に
電気的接続部３ａを残してその途中の一部を口型に屈曲
して樹脂の這い上りを阻止する屈曲部３Ｃを形成したも
のである。4(a), (b), and FIG. 5, the external terminal 3 of the hybrid integrated circuit according to the present invention has its base end bent in a U-shape to form a mounting portion 3b to be inserted into the substrate l, and An electrical connection part 3a is left at the end, and a part of it is bent into a mouth shape to form a bent part 3C that prevents the resin from creeping up.

外装コーティングを施すには外部端子３を上に向けて混
成集積回路をツーノール樹脂酸いはシリコーン樹月旨の
槽に浸し、これを弓１き」二げて乾燥させ、混成集積回
路の外装コーティングを施して完成する。樹脂を塗布す
る場合、外部端子３を伝って樹脂が這い上ろうとするが
、本発明によれば、端子の一部が屈曲しているため、樹
脂は横方向に迂回させられ、這い」二ろうとする力に樹
脂の自重による下向きの力が作用することになるから、
樹脂の這い上がりが阻止される。したがって、樹脂の這
い上り現象により外部端子がコーディングされるという
事故を防止することができる。To apply the exterior coating, immerse the hybrid integrated circuit with the external terminals 3 facing up in a bath of Tunor resin acid or silicone, dry it with a bow, and apply the exterior coating of the hybrid integrated circuit. Complete the process. When applying resin, the resin tends to creep up along the external terminal 3, but according to the present invention, since a part of the terminal is bent, the resin is detoured laterally, preventing the resin from creeping up. Because the downward force due to the resin's own weight will act on the force,
Resin creeping up is prevented. Therefore, it is possible to prevent an accident in which the external terminal is coded due to the resin creeping up phenomenon.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は樹脂を塗布する際に外部
端子に樹脂が這い上るのを阻止するようにしたため、樹
脂による外部端子のコーティングを防止することができ
、したがって、混成集積回路特有の少量多品種用外装コ
ーティングとして樹ＪＩＢの塗布による方法を実用化す
ることができ、混成集積回路の品質を高品位に維持して
短時間で安価に外装コーティングを施すことができる効
果を有するものである。As explained above, the present invention prevents the resin from creeping up onto the external terminals when applying the resin, making it possible to prevent the external terminals from being coated with the resin. The method of applying JIB can be put to practical use as an exterior coating for a wide variety of products in small quantities, and has the effect of maintaining high quality of hybrid integrated circuits and applying exterior coatings in a short time and at low cost. be.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図〜第３図は混成集積回路に施す外装コーティング
を説明する断面図、第４、図（イ）、（ロ）は本発明に
係る混成集積回路を示す断面図、第５図は本発明におけ
る外部端子を示す斜視図である。 ３・・・外部端子、３Ｃ−樹脂の這い上り廿士を阻止す
る屈曲部。 特許出願人　日本電気株式会社 、・１、ズ、〜 代理人　弁理士　菅　野　中、−，） ２ 第１図 第２図 第３図 第４図 （イ）　（ロ） 第す図Figures 1 to 3 are cross-sectional views illustrating the exterior coating applied to the hybrid integrated circuit, Figures 4, (a) and (b) are cross-sectional views showing the hybrid integrated circuit according to the present invention, and Figure 5 is the main FIG. 3 is a perspective view showing an external terminal in the invention. 3...External terminal, 3C-Bent part to prevent resin from creeping up. Patent applicant: NEC Corporation, ・1, z, ~ Agent: Patent attorney Naka Kanno, -,) 2 Figure 1 Figure 2 Figure 3 Figure 4 (A) (B) Figure S

Claims (1)

【特許請求の範囲】[Claims] （１）外部端子部分を残してその外表面を樹脂にて被覆
することにより外装コーティングが施こされた混成集積
回路において、該回路に装備した外部端子の末端の電気
的接続部につづく途中部分の一部に、樹脂の這い上りを
阻止する屈曲部を形成したことを特徴上する混成集積回
路。(1) In a hybrid integrated circuit whose outer surface is coated with resin while leaving the external terminal portion, the intermediate portion following the electrical connection at the end of the external terminal installed in the circuit A hybrid integrated circuit characterized in that a bent part is formed in a part of the circuit to prevent resin from creeping up.
JP5053884A 1984-03-16 1984-03-16 Hybrid ic Pending JPS60194550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5053884A JPS60194550A (en) 1984-03-16 1984-03-16 Hybrid ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5053884A JPS60194550A (en) 1984-03-16 1984-03-16 Hybrid ic

Publications (1)

Publication Number Publication Date
JPS60194550A true JPS60194550A (en) 1985-10-03

Family

ID=12861780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5053884A Pending JPS60194550A (en) 1984-03-16 1984-03-16 Hybrid ic

Country Status (1)

Country Link
JP (1) JPS60194550A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6411353A (en) * 1987-07-06 1989-01-13 Matsushita Electric Ind Co Ltd Electronic circuit device
JPH01125571U (en) * 1988-02-19 1989-08-28
JPH02207559A (en) * 1989-02-07 1990-08-17 Fujitsu Ltd Two row parallel multi-terminal terminal hybrid integrated circuit device
JPH02265266A (en) * 1989-04-05 1990-10-30 Hitachi Ltd Semiconductor device and memory module device
US5557116A (en) * 1992-12-24 1996-09-17 Sharp Kabushiki Kaisha Semiconductor laser device and resin layer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6411353A (en) * 1987-07-06 1989-01-13 Matsushita Electric Ind Co Ltd Electronic circuit device
JPH01125571U (en) * 1988-02-19 1989-08-28
JPH02207559A (en) * 1989-02-07 1990-08-17 Fujitsu Ltd Two row parallel multi-terminal terminal hybrid integrated circuit device
JPH0695561B2 (en) * 1989-02-07 1994-11-24 富士通株式会社 Two-row parallel multi-terminal hybrid integrated circuit device
JPH02265266A (en) * 1989-04-05 1990-10-30 Hitachi Ltd Semiconductor device and memory module device
US5557116A (en) * 1992-12-24 1996-09-17 Sharp Kabushiki Kaisha Semiconductor laser device and resin layer

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