JPS60173872A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPS60173872A JPS60173872A JP2196284A JP2196284A JPS60173872A JP S60173872 A JPS60173872 A JP S60173872A JP 2196284 A JP2196284 A JP 2196284A JP 2196284 A JP2196284 A JP 2196284A JP S60173872 A JPS60173872 A JP S60173872A
- Authority
- JP
- Japan
- Prior art keywords
- nitrogen
- silicide
- electrode
- tungsten silicide
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 48
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 25
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 25
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 20
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 19
- 150000001875 compounds Chemical class 0.000 claims abstract description 18
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910001873 dinitrogen Inorganic materials 0.000 claims abstract description 10
- 239000007789 gas Substances 0.000 claims abstract description 8
- 229910052786 argon Inorganic materials 0.000 claims abstract description 7
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 14
- 229910052785 arsenic Inorganic materials 0.000 claims description 14
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 14
- 229910052733 gallium Inorganic materials 0.000 claims description 14
- 238000004544 sputter deposition Methods 0.000 claims description 6
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 abstract description 28
- 229910021342 tungsten silicide Inorganic materials 0.000 abstract description 28
- 238000010438 heat treatment Methods 0.000 abstract description 17
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 8
- 239000000463 material Substances 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 7
- 239000000758 substrate Substances 0.000 abstract description 5
- 229910052715 tantalum Inorganic materials 0.000 abstract description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 abstract description 3
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 abstract description 2
- 229910021344 molybdenum silicide Inorganic materials 0.000 abstract description 2
- 229910052758 niobium Inorganic materials 0.000 abstract description 2
- 239000010955 niobium Substances 0.000 abstract description 2
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 abstract description 2
- 238000000059 patterning Methods 0.000 abstract description 2
- 238000005546 reactive sputtering Methods 0.000 abstract description 2
- 238000000151 deposition Methods 0.000 abstract 1
- 238000001020 plasma etching Methods 0.000 abstract 1
- 230000004888 barrier function Effects 0.000 description 9
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 239000010937 tungsten Substances 0.000 description 3
- 239000007772 electrode material Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 241000232971 Passer domesticus Species 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000002360 explosive Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000001988 toxicity Effects 0.000 description 1
- 231100000419 toxicity Toxicity 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/47—Schottky barrier electrodes
- H01L29/475—Schottky barrier electrodes on AIII-BV compounds
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は、ガリウムと砒素とを含む化合物半導体を有
する半導体装置及びその製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device having a compound semiconductor containing gallium and arsenic, and a method for manufacturing the same.
従来、砒化ガリウム（ＧａＡａ ）のようなガリウムと
砒素とを含む化合物半導体を基体とする半導体装置の該
化合物半導体と接する電極や配線には、単体金属又はタ
ングステン硅化物のような金属硅化物が使われている。Conventionally, elemental metals or metal silicides such as tungsten silicide have been used for electrodes and wiring in contact with the compound semiconductor of semiconductor devices based on compound semiconductors containing gallium and arsenic such as gallium arsenide (GaAa). It is being said.
特に、ショットキダイオードの電極などにおいては、ダ
イオードの評価パラメータとしてのｎ値が小さいアルミ
ニウムなどの単体金属が好ましい。In particular, for the electrode of a Schottky diode, a single metal such as aluminum, which has a small n value as a diode evaluation parameter, is preferable.
しかし、単体金属を半導体表面に直接接触させる構造の
電極の場合、高温においてもガリウムと砒素とを含む化
合物半導体と反応しない電極を形成することが困難でお
るため、高温処理をする必要があるときはｎ値が急激に
増大してしまう。このため、高温での熱処理を要するＧ
ａＡｓ％積回路等の半導体装置の製造においては、高温
でも安定な金属を含む化合物を電極材料として用いる必
要がある。このような観点から、ガリウムと砒素とを含
む化合物半導体と高温で比較的反応しにくい電極材料と
して、これまでタングステン硅化物等の金属硅化物が広
く用いられてきた。また、配線材料においても高温で安
定な材料が好ましいことから、同様に金属硅化物が利用
されてきた。However, in the case of electrodes in which a single metal is in direct contact with the semiconductor surface, it is difficult to form an electrode that does not react with a compound semiconductor containing gallium and arsenic even at high temperatures, so high-temperature treatment is necessary. In this case, the n value increases rapidly. For this reason, G requires heat treatment at high temperatures.
In the manufacture of semiconductor devices such as aAs% product circuits, it is necessary to use compounds containing metals that are stable even at high temperatures as electrode materials. From this point of view, metal silicides such as tungsten silicide have been widely used as electrode materials that are relatively difficult to react with compound semiconductors containing gallium and arsenic at high temperatures. Further, since it is preferable to use a material that is stable at high temperatures as a wiring material, metal silicides have been similarly used.
しかし、これらの金属硅化物を電極又は配線の材料とし
て用いたとしても、８００℃以上になると、ガリウムと
砒素とを含む化合物半導体との反応を避けることはでき
ない。そのだめ、８００℃以上で高温熱処理を行なう場
合には、製造条件のわずかな相違が、熱処理後の電極又
は配線の特性の大きな変化となって現われてしまい、特
性の良好な半導体装置を安定に製造することが困難であ
った。However, even if these metal silicides are used as materials for electrodes or wiring, it is impossible to avoid reactions with compound semiconductors containing gallium and arsenic at temperatures above 800°C. However, when performing high-temperature heat treatment at temperatures above 800°C, slight differences in manufacturing conditions will result in large changes in the characteristics of electrodes or wiring after heat treatment, making it difficult to produce semiconductor devices with good characteristics stably. It was difficult to manufacture.
さらに、金属単体や従来の金属硅化物は酸化しやすいた
め、高温熱処理は還元雰囲気中で行なう必要があシ、通
常、水素またはアルシス雰囲気中で打力うので、その毒
性や爆発性のために作業上きわめて危険を伴うものでめ
った。Furthermore, metals and conventional metal silicides are easily oxidized, so high-temperature heat treatment must be carried out in a reducing atmosphere, and they are usually treated in a hydrogen or ALS atmosphere, due to their toxicity and explosive properties. The work was extremely dangerous and it happened very rarely.
本発明は、このような問題点に鑑みてなされたものであ
り、その目的は、ガリウムと砒素とを含む化合物半導体
と直接接触する電極又は配線の特性が熱処理に対しても
安定した半導体装置を得ること及びその製造方法を得る
ことにある。The present invention has been made in view of these problems, and its purpose is to provide a semiconductor device in which the characteristics of electrodes or wiring that are in direct contact with a compound semiconductor containing gallium and arsenic are stable even when subjected to heat treatment. The objective is to obtain a method for producing the same.
かかる目的を達成するために、本発明は、電極又は配線
材料として窒素を添加した金属硅化物を用いたものであ
る。また、この窒素を添加した金属硅化物から成る電極
又は配線を形成するために、金属硅化物をターゲットと
し、窒素ガスを含むアルゴンガス中でスパッタリングを
行うものである。In order to achieve this object, the present invention uses a nitrogen-doped metal silicide as an electrode or wiring material. Further, in order to form electrodes or wiring made of the metal silicide added with nitrogen, sputtering is performed using the metal silicide as a target in argon gas containing nitrogen gas.
以下、本発明を実施例とともに詳細に説明する。 Hereinafter, the present invention will be explained in detail together with examples.
第１図は、本発明に係る半導体装置の第１実施例である
ショットキダイオード１０を示す断面図である。ガリウ
ムと砒素とを含む化合物半導体であるｎ形ＧａＡｓ基板
１２の上には、窒素を添加したタングステン硅化物層に
よるショットキ電極１４及びオーミック電極１６が直接
接触して形成されている。FIG. 1 is a sectional view showing a Schottky diode 10 which is a first embodiment of a semiconductor device according to the present invention. On an n-type GaAs substrate 12 which is a compound semiconductor containing gallium and arsenic, a Schottky electrode 14 and an ohmic electrode 16 made of a tungsten silicide layer doped with nitrogen are formed in direct contact with each other.
このショットキ電極１４は次のようなスパッタリング法
によシ形成する。すなわち、ターゲットにタングステン
硅化物を用い、アルゴンガス中に窒素ガスを混合して、
反応性スパック法によシ、ｎ形ＧａＡｓ基板上に窒素を
添加したタングステン硅化物を堆積させる。その後、〔
ｃＦ４＋０２〕 プラズマ・エンチングにょ）、電極パ
ターニングを行なう。This Schottky electrode 14 is formed by the following sputtering method. That is, using tungsten silicide as a target and mixing nitrogen gas with argon gas,
Nitrogen-doped tungsten silicide is deposited on an n-type GaAs substrate by a reactive spuck method. after that,〔
cF4+02] Perform plasma enching) and electrode patterning.
第２図は、本発明に係る半導体装置の第２実施例である
ショットキダイオード２０の断面図である。この図にお
いて、第１図と同一の部分には同一の符号を付しである
。ｎ形ＧａＡｓ基板１２の上ニ、ショットキ電極２２と
オーミック電極１６とが形成されている。ショットキ電
極２２は２層構造となっておシ、基板１２に接する第１
層２４は窒素を添加したタングステン硅化物から成シ、
その層の厚さは２００ Ｋである。第２層２６はタング
ステン硅化物層であシ、その層の厚さは１８００ Ｘで
ある。FIG. 2 is a sectional view of a Schottky diode 20 which is a second embodiment of the semiconductor device according to the present invention. In this figure, the same parts as in FIG. 1 are given the same reference numerals. A Schottky electrode 22 and an ohmic electrode 16 are formed on the n-type GaAs substrate 12 . The Schottky electrode 22 has a two-layer structure.
Layer 24 is made of tungsten silicide doped with nitrogen;
The thickness of the layer is 200K. The second layer 26 is a tungsten silicide layer with a thickness of 1800×.
本実施例では、窒素を添加したタングステン硅化物を第
１層とし、その上に電気抵抗が小さく、かつ、高温熱処
理時にＱ ａＡ ｓ基板１２及び第１層２４と反応しに
くい材料としてタングステン硅化物を堆積し、２層構造
としているので、対熱性を高く維持しつつ電極の電気抵
抗を低くすることができるものである。In this embodiment, tungsten silicide added with nitrogen is used as the first layer, and tungsten silicide is layered on top of this as a material that has low electrical resistance and does not easily react with the Q aA s substrate 12 and the first layer 24 during high-temperature heat treatment. Since it has a two-layer structure, the electrical resistance of the electrode can be lowered while maintaining high heat resistance.
第３図及び第４図は、本実施例のショットキダイオード
のｎ値及びショットキバリア高さについての熱処理温度
に対する関係を示したものである。3 and 4 show the relationship between the n value and the Schottky barrier height of the Schottky diode of this example and the heat treatment temperature.
両図において、破線は、スパッツラグターゲットにタン
グステン硅化物を用い、アルゴンガス圧５ｍＴｏｒｒ、
放電電力１００Ｗの条件でスパッタ法によシ製作したタ
ングステン硅化物をショットキ電極としたショットキダ
イオードとしての従来装置の場合を示したものであシ、
実線は、本実施例すなわち第２図に示すショットキダイ
オード２０の場合を示したものでちる。なお、ここにお
けるショットキダイオード２０の第１層２４は全ガス圧
を一定（５ｍＴｏｒｒ ）にして３％の窒素ガスを混合
し、タングステン硅化物をターゲットとして反応性スパ
ッタ法によシ製作したものである。In both figures, the broken line indicates that tungsten silicide is used as the spatz lag target, argon gas pressure is 5 mTorr,
This shows the case of a conventional device as a Schottky diode using a Schottky electrode made of tungsten silide manufactured by sputtering under the condition of a discharge power of 100 W.
The solid line indicates the case of this embodiment, that is, the Schottky diode 20 shown in FIG. The first layer 24 of the Schottky diode 20 here is manufactured by reactive sputtering using tungsten silicide as a target, mixing 3% nitrogen gas with the total gas pressure constant (5 mTorr). .
第３図に示すように、従来装置（破線）の場合は、８０
０℃を越えたところから急激にｎ値が増加しているのに
対し、本実施例装置（実＃）では、その傾斜はｔｌとん
ど変化せず、４５０℃におけるｎ値との差はわずかであ
る。このことから、８００℃以上においても、窒素を添
加したタングステン硅化物は、ガリウムと砒素とを含む
化合物半導体と反応しないことがわかる。As shown in Figure 3, in the case of the conventional device (dashed line), 80
While the n value increases rapidly after exceeding 0°C, in the device of this embodiment (actual #), the slope hardly changes at tl, and the difference from the n value at 450°C is Very little. This shows that even at temperatures above 800° C., tungsten silicide added with nitrogen does not react with a compound semiconductor containing gallium and arsenic.
ｉた、本実施例装置は、従来装置に比べてｎ値の値が４
５０℃あたシの低温時においても低く、その点でもすぐ
れていることがわかる（ｎ値が１に近いほど優れている
）。In addition, the device of this embodiment has an n value of 4 compared to the conventional device.
It can be seen that it is low even at a low temperature of 50° C. and is excellent in that respect (the closer the n value is to 1, the better).
第４図からは、本実施例装置（実線）のショットキバリ
ア高さも熱処理温度の影響を受けにくいことがわかる。From FIG. 4, it can be seen that the Schottky barrier height of the apparatus of this embodiment (solid line) is also not easily affected by the heat treatment temperature.
しかも、従来装置（破線）に比べてショットキバリア高
さが高く、例えば、装置を論理回路に適用する際には論
理振幅を広く採れるのでＳ／Ｎの点で優れｆｃ素子を得
ることができる。Furthermore, the Schottky barrier height is higher than that of the conventional device (broken line), and when the device is applied to a logic circuit, for example, a wide logic amplitude can be obtained, making it possible to obtain an fc element with excellent S/N ratio.
第３図及び第４図から共通に言えることは、本実施例装
置は従来装置に比べて素子製造工程において温度の許容
範囲が太きいということが明らかである。What can be said in common from FIGS. 3 and 4 is that the apparatus of this embodiment has a wider allowable temperature range in the element manufacturing process than the conventional apparatus.
なお、本実施例装置の製作にあたシ、窒素ガスの混合比
を３％としたが、これを１０％として第１層２４の中へ
の窒素の添加量を変えた場合でも、第３図及び第４図に
示したと同様の特性を得ることができた。Although the mixing ratio of nitrogen gas was set to 3% in manufacturing the device of this embodiment, even if this was set to 10% and the amount of nitrogen added into the first layer 24 was changed, the third layer It was possible to obtain characteristics similar to those shown in FIGS.
また、第１層２４の窒素を添加したタングステン硅化物
層の厚さを２０ＯＡとしたが、これを２０００又とした
場合でも８５０℃、２０分の熱処理団し安定でおること
を確認した。なお、窒素を添加したタングステン硅化物
層が薄い場合は、その分だけ反応を阻止する効果が弱ま
ると考えられるが、基本的にはタングステン硅化物層の
みの場合よシ安定な電極が実現できる。さらに第２層２
６をタングステン硅化物としたが、これをタングステン
とした場合でも高温熱処理に対して安定であった。Furthermore, although the thickness of the nitrogen-added tungsten silicide layer of the first layer 24 was set to 20 OA, it was confirmed that even when the thickness was set to 2000 OA, it remained stable after heat treatment at 850° C. for 20 minutes. Note that if the tungsten silicide layer to which nitrogen is added is thin, the effect of inhibiting the reaction is thought to be weakened accordingly, but basically a more stable electrode can be realized with only the tungsten silicide layer. Furthermore, the second layer 2
6 was made of tungsten silicide, but even when tungsten was used, it was stable against high-temperature heat treatment.
第５図は、本発明の第３実施例の断面図を示すものであ
シ、窒素を添加したタングステン硅化物を、ＧａＡｓ中
に埋め込んだ構造を有する。なお、（ａ）は正面図であ
ｊ）、（ｂ）は側面図である。図において、５０．５８
はオーミック電極、５２はガリウムと砒素とを含む化合
物半導体としてのｎ 腕ａＡｓ層、５４は窒素を添加し
たタングステン硅化物埋込電極、５６ｔｉｎ −ＧＢＡ
ｓ層である。FIG. 5 shows a cross-sectional view of a third embodiment of the present invention, which has a structure in which tungsten silicide doped with nitrogen is embedded in GaAs. Note that (a) is a front view, and (b) is a side view. In the figure, 50.58
is an ohmic electrode, 52 is an n-arm aAs layer as a compound semiconductor containing gallium and arsenic, 54 is a nitrogen-doped tungsten silide embedded electrode, 56tin-GBA
It is the s layer.
この実施例では、ＧａＡ、層５２を途中までエピタキシ
ャル成長させたところで、前述の実施例と同様の方法す
なわちスパッタ法により電極５４を形成し、再びＧＢＡ
ｓ層エピタキシャル成長させて埋込電極とするものであ
る。エピタキシャル成長における成長温度は６５０℃程
度であるが、第１及び第２実施例と同様にこの温度では
、窒素を添加したタングステン硅化物はＧ ａＡ ｓと
反応せず、安定したｎ値及びショットキバリア高さをも
つ良好な素子を得ることができる。In this example, after the GaA layer 52 has been epitaxially grown halfway, an electrode 54 is formed by the same method as in the previous example, that is, a sputtering method, and the GBA layer 52 is grown halfway.
The s-layer is grown epitaxially to form a buried electrode. The growth temperature during epitaxial growth is about 650°C, but at this temperature, nitrogen-added tungsten silicide does not react with GaAs, resulting in stable n value and Schottky barrier height. It is possible to obtain a good element with high properties.
第６図は、本発明の第４実施例の断面図を示す。FIG. 6 shows a cross-sectional view of a fourth embodiment of the invention.
本実施例では、窒素を添加したタングステン硅化物を電
極としてではなく、配線として用いたものである。図に
おいて、６０はｎ−ＧＢＡｓ層、６２は半絶縁性Ｇ ａ
Ａ ｓ層、６４は窒素を添加したタングステン硅化物
から成る埋込配線層、６６はｎ−ＧａＡ３エピタキシャ
ル成長層である。埋込配線層６４本実施例のように、窒
素を添加したタングステン硅化物層６４の周囲に、半絶
縁性Ｇ Ｂ Ａ ８層６２を成長させる場合も、第３実
施例の場合と同様、６５０℃程度では、ＧＢＡｓとの反
応が生じないため、良好な素子となシ、さらに、高性能
なパーミアブル・ベース・トランジスタや３次元Ｇａ
Ａ ｓ Ｉ Ｃ等の製作が可能である。In this example, tungsten silicide doped with nitrogen is used not as an electrode but as a wiring. In the figure, 60 is an n-GBAs layer, 62 is a semi-insulating Ga
The As layer 64 is a buried wiring layer made of tungsten silicide added with nitrogen, and 66 is an n-GaA3 epitaxial growth layer. Buried wiring layer 64 When growing the semi-insulating G B A 8 layer 62 around the nitrogen-doped tungsten silicide layer 64 as in this embodiment, the 650 Since no reaction occurs with GBAs at temperatures around
It is possible to manufacture A S I C etc.
なお、以上の第１ないし第４の実施例では金属硅化物を
タングステン硅化物としたが、これをタンタル硅化物、
モリブデン硅化物、ニオブ硅化物とした場合でも、各金
属硅化物に窒素を添加することによシ、耐熱性を約５０
℃程度向上させることが実験により確認された。In addition, in the above first to fourth embodiments, tungsten silicide was used as the metal silicide, but tantalum silicide, tantalum silicide,
Even in the case of molybdenum silicide and niobium silicide, the heat resistance can be increased by about 50% by adding nitrogen to each metal silicide.
It has been confirmed through experiments that the temperature can be improved by approximately ℃.
さらに、ガリウムと砒素とを含む化合物半導体がＧ ａ
Ａ ｓの場合について述べたが、ＡＬＧａＡＳ系である
場合でも、電極系における反応は、ガリウムと砒素の外
方向拡散によって支配されるので、本発明は有効である
。Furthermore, a compound semiconductor containing gallium and arsenic is Ga
Although the case of As has been described, the present invention is effective even in the case of an ALGaAS system because the reaction in the electrode system is dominated by outward diffusion of gallium and arsenic.
（：Ｉ ｌ−１１ｊＢ８１−＋ ｒらｆ、水全明の半道
体装置は、ガリウムと砒素とを含む化合物半導体に接す
る電極又は配線材料として窒素を添加した金属硅化物を
用いているので、化合物半導体と電極又は配線とが高温
においても反応せず、製造条件のきびしい制約を負荷し
なくとも特性の安定した半導体装置とすることができる
。また、取扱上安全なアルゴンガス雰囲気中で高温熱処
理を施すことが可能となる。(: I l-11jB81-+ r et al., Mizuzenmei's half-domain device uses a metal silicide doped with nitrogen as the electrode or wiring material in contact with a compound semiconductor containing gallium and arsenic. The compound semiconductor and electrodes or wiring do not react even at high temperatures, making it possible to create a semiconductor device with stable characteristics without imposing severe restrictions on manufacturing conditions.In addition, high-temperature heat treatment in an argon gas atmosphere that is safe for handling is possible. It becomes possible to perform
かかる効果を有することから、高温での熱処理を要する
プロセスを用いて、高速動作を行なう半導体装置を製造
することが可能となる。具体的には、例えば、ＧａＡＢ
集積回路のショットキ・ゲート電極に本発明を応用した
場合、ゲート電極をマスクとしたイオン注入の後、不純
物活性化のための８００℃、２０分の熱処理を施すセル
ファライン・プロセスによって、集積度が高く、高速で
動作する素子を実現することができる。Because of this effect, it becomes possible to manufacture a semiconductor device that operates at high speed using a process that requires heat treatment at high temperatures. Specifically, for example, GaAB
When the present invention is applied to the Schottky gate electrode of an integrated circuit, the degree of integration is increased by the self-line process, which involves ion implantation using the gate electrode as a mask, followed by heat treatment at 800°C for 20 minutes to activate the impurities. It is possible to realize an element that operates at high speed and high speed.
また、本発明を応用した半導体装置は、高温での安定性
に優れているため、高信頼性を有するという利点も兼ね
備えている。したがって、製造プロセスは比較的低温で
おっても、衛星通信用半導体装置等に本発明を応用した
場合、高速動作と同時に高信頼性が実現できる。Further, since the semiconductor device to which the present invention is applied has excellent stability at high temperatures, it also has the advantage of having high reliability. Therefore, even if the manufacturing process is performed at a relatively low temperature, when the present invention is applied to a semiconductor device for satellite communication, etc., high-speed operation and high reliability can be achieved.
また、本発明の製造方法は、金属硅化物をターゲットと
し、窒素ガスを含むアルゴンガス中でスパッタリングを
行なうので、窒素を添加した金属硅化物から成る電極又
は配線を形成できるだけでなく窒素ガスの濃度を変える
ことによって金属硅化物中の窒素の割合を素子の目的に
応じて容易に変えることができる。In addition, since the manufacturing method of the present invention uses metal silicide as a target and performs sputtering in argon gas containing nitrogen gas, it is possible not only to form electrodes or wiring made of nitrogen-doped metal silicide, but also to increase the concentration of nitrogen gas. By changing the ratio of nitrogen in the metal silicide, the proportion of nitrogen in the metal silicide can be easily changed depending on the purpose of the device.
第１図は本発明の第１実施例であるショットキダイオー
ドの断面図、第２図は第２実施例であるショットキダイ
オードの断面図、第３図は熱処理温度とｎ値の関係を示
すグラフ、第４図は熱処理温度とショットキバリア高さ
との関係を示すグラフ、第５図は第３実施例である埋込
電極を有する半導体装置の断面図、第６図は第４実施例
である埋込配線を有する半導体装置の断面図である。
１２．５２１１・・−ｎ−ＧａＡｓ層、１４ 、２４
。
５４ φ優・・窒素を添加したタングステン硅化物から
成る電極層、６２・・・・半絶縁体Ｇ ＪＩＬ Ａ ｓ
層、６４拳・・・窒素を添加したタングステン硅化物か
ら成る配線層。
特許出願人 日本電信電話公社
代理人山 川 政 樹
第 １ 図
第２図
手続補正書（睦）
特許庁長官殿 ゛“０′ 弓部、５．η５ 。
１、事件の表示
昭和５９年 特 許 願第２１９６２ 号２、発明の名
称
半導体装置及びその製造方法
３、補正をする者
事件との関係 特 許 出願人
名称（氏名） （４２２） 日本電信電話公社５、補正
の対象
（１） 明細書の発明の詳細な説明の欄（２）明細書の
図面の簡単な説明の欄
（３）図 面
６、補正の内容
［１１明細書の第８頁第４行の「できた。」の後に［第
５図は、本実施例装置を８００℃、２０分の熱処理工程
を経て製作した場合のショソ１−）−バリア高さの窒素
ガス流量比に対する関係を示したものである。同図から
判るように、窒素添加量の増加に伴ってンヨソトキバリ
ア高さは増加する。これをＩＣのショットキゲート電極
等に応用した場合には、ドレイン電流の変化量を大きく
とることができ、次段の電流駆動能力が向上し、特性の
優れた素子が得られる。」を加入する。
（２）同書同頁第１５行の「第５図」を「第６図」に補
正する。
（３）同書第９頁第１３行の「第６図」を「第７図」に
補正する。
（４）同書第１２頁第１６行〜第１７行の「グラフ、」
の後に「第５図はショットキバリア高さの窒素ガス流量
比に対する関係を示したグラフ、」を加入する。
（５）同書同頁第１７行の「第５図ｊを「第６図」に補
正する。
（６）同書同頁第１８行の「第６図」を「第７図」に補
正する。
（７）図面の第５図及び第６図をそれぞれ第６図及び第
７図とする。
（８）図面に、第５図を別紙の通り追加する。
以 上
第５図
０ １０ ２０
叡素がス〕泥を九（’／、）FIG. 1 is a cross-sectional view of a Schottky diode according to a first embodiment of the present invention, FIG. 2 is a cross-sectional view of a Schottky diode according to a second embodiment, and FIG. 3 is a graph showing the relationship between heat treatment temperature and n value. FIG. 4 is a graph showing the relationship between heat treatment temperature and Schottky barrier height, FIG. 5 is a cross-sectional view of a semiconductor device having a buried electrode according to the third embodiment, and FIG. 6 is a graph showing the relationship between the buried electrode and the Schottky barrier height according to the fourth embodiment. FIG. 1 is a cross-sectional view of a semiconductor device having wiring. 12.5211...-n-GaAs layer, 14, 24
. 54 φexcellent... Electrode layer made of tungsten silicide added with nitrogen, 62... Semi-insulator G JIL A s
Layer, 64 layers...Wiring layer made of tungsten silicide added with nitrogen. Patent Applicant: Nippon Telegraph and Telephone Public Corporation Agent Masaki Yamakawa No. 1 Figure 2 Procedural Amendment (Mutsu) Dear Commissioner of the Japan Patent Office ゛“0′ Yumibe, 5.η5. 1. Indication of the case 1982 Patent Application No. 21962 2, Name of the invention Semiconductor device and its manufacturing method 3, Relationship with the case of the person making the amendment Patent Name of applicant (name) (422) Nippon Telegraph and Telephone Public Corporation 5, Subject of amendment (1) Description Column for detailed explanation of the invention (2) Column for brief explanation of drawings in the specification (3) Drawing 6, contents of amendment [11 After “Done” on page 8, line 4 of the specification [FIG. 5 shows the relationship between the barrier height and the nitrogen gas flow rate ratio when the device of this embodiment was manufactured through a heat treatment process at 800° C. for 20 minutes. As can be seen from the figure, the height of the barrier increases as the amount of nitrogen added increases. When this is applied to the Schottky gate electrode of an IC, the amount of change in drain current can be increased, the current driving ability of the next stage is improved, and an element with excellent characteristics can be obtained. ” to join. (2) "Figure 5" in line 15 of the same page of the same book is corrected to "Figure 6." (3) "Figure 6" on page 9, line 13 of the same book is corrected to "Figure 7." (4) "Graph," in the same book, page 12, lines 16-17.
``Figure 5 is a graph showing the relationship between Schottky barrier height and nitrogen gas flow rate ratio.'' is added after. (5) In the same book, page 17, ``Figure 5 j is corrected to ``Figure 6''. (6) "Figure 6" in line 18 of the same page of the same book is corrected to "Figure 7." (7) Figures 5 and 6 of the drawings are referred to as Figures 6 and 7, respectively. (8) Add Figure 5 to the drawings as shown in the attached sheet. That's all for Figure 5 0 10 20 Silicon is 9 ('/,)
Claims (2)
体を有する半導体装置において、前記化合物半導体に接
する電極又は配線層として窒素を添加した金属硅化物層
を用いることを特徴とする半導体装置。(1) A semiconductor device having a compound semiconductor containing at least gallium and arsenic, characterized in that a metal silicide layer doped with nitrogen is used as an electrode or wiring layer in contact with the compound semiconductor.
の上に、金属硅化物をターゲットとし、窒素ガスを混合
したアルゴンガス雰囲気において電極又は配線層をスパ
ッタ法によ多形成することを特徴とする半導体装置の製
造方法。(2) A semiconductor characterized in that an electrode or wiring layer is formed by sputtering on a compound semiconductor containing at least gallium and arsenic in an argon gas atmosphere mixed with nitrogen gas using a metal silicide as a target. Method of manufacturing the device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2196284A JPS60173872A (en) | 1984-02-10 | 1984-02-10 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2196284A JPS60173872A (en) | 1984-02-10 | 1984-02-10 | Semiconductor device and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60173872A true JPS60173872A (en) | 1985-09-07 |
| JPH036669B2 JPH036669B2 (en) | 1991-01-30 |
Family
ID=12069688
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2196284A Granted JPS60173872A (en) | 1984-02-10 | 1984-02-10 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60173872A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62131452U (en) * | 1986-02-13 | 1987-08-19 | ||
| EP0304073A2 (en) * | 1987-08-21 | 1989-02-22 | Kabushiki Kaisha Toshiba | Method for manufacturing semiconductor device with schottky electrodes |
| US5449631A (en) * | 1994-07-29 | 1995-09-12 | International Business Machines Corporation | Prevention of agglomeration and inversion in a semiconductor salicide process |
| US5518958A (en) * | 1994-07-29 | 1996-05-21 | International Business Machines Corporation | Prevention of agglomeration and inversion in a semiconductor polycide process |
-
1984
- 1984-02-10 JP JP2196284A patent/JPS60173872A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62131452U (en) * | 1986-02-13 | 1987-08-19 | ||
| EP0304073A2 (en) * | 1987-08-21 | 1989-02-22 | Kabushiki Kaisha Toshiba | Method for manufacturing semiconductor device with schottky electrodes |
| US5449631A (en) * | 1994-07-29 | 1995-09-12 | International Business Machines Corporation | Prevention of agglomeration and inversion in a semiconductor salicide process |
| US5518958A (en) * | 1994-07-29 | 1996-05-21 | International Business Machines Corporation | Prevention of agglomeration and inversion in a semiconductor polycide process |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH036669B2 (en) | 1991-01-30 |
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