JPS60168060A - Board tester - Google Patents

Board tester

Info

Publication number
JPS60168060A
JPS60168060A JP2344284A JP2344284A JPS60168060A JP S60168060 A JPS60168060 A JP S60168060A JP 2344284 A JP2344284 A JP 2344284A JP 2344284 A JP2344284 A JP 2344284A JP S60168060 A JPS60168060 A JP S60168060A
Authority
JP
Japan
Prior art keywords
board
circuit
test
outputs
resistance meter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2344284A
Other languages
Japanese (ja)
Inventor
Yoshifumi Tatebayashi
舘林 美史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2344284A priority Critical patent/JPS60168060A/en
Publication of JPS60168060A publication Critical patent/JPS60168060A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To shorten a testing time by the titled tester, and also to simplify its constitution by detecting a conducting state between terminals by using an oscillating signal without using a resistance meter. CONSTITUTION:Different frequency outputs from oscillators 13-16 are supplied to each test terminal of a printed circuit board 1. As a result, the level of an oscillation frequency passing through BPFs 17-26 contained in the outputs from test terminals 6-9 and the component of said frequency is whether a prescribed level or not is detected by level detectors 27-36, even only one of outputs of the detectors 27-36, an output decided as the abnormal is generated by a deciding circuit 37 such as an AND circuit, etc., the conduction of a board 1 is decided to be a failure. Accordingly, it is unnecessary to switch each test terminal and to connect it to a resistance meter, each inter-terminal is tested simultaneously by simple constitution which does not require a controlling circuit and a resistance meter, and a board conduction testing time is shortened.

Description

【発明の詳細な説明】 〔技術分野〕 不発明は、特にプリント配線基板などの半田付接続状態
の良否lc@定するボードテスタに関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The invention particularly relates to a board tester that determines the quality of soldered connections of printed wiring boards and the like.

〔発明の背ぷ) 電子部品を多数搭載して構成されるプリント配線基板の
製造に6たっては、プリント基板の穴に電子部品のリー
ドを挿入した体、半田付を付い。
[Background of the invention] After six years of manufacturing a printed wiring board that is made up of a large number of electronic components, the leads of the electronic components are inserted into the holes of the printed circuit board and soldered.

電子部品とプリント基板の金属箔とを電気的に接続して
いる。このようにして製造されたプリント配線基板は目
的の機能、特性が得られているかを判定するために特性
試験が竹なわれるが、紋近ではプリント配線基板の機能
が複雑化しておシ、電気的特性の全てを樋密に試験する
ことは多大の工数?委するようになっている。また、よ
り1つの1.81パツケージ化されるようになっている
The electronic component and the metal foil of the printed circuit board are electrically connected. Printed wiring boards manufactured in this way are often subjected to characteristic tests to determine whether they have the desired functions and characteristics. Does it take a lot of man-hours to thoroughly test all of the physical characteristics? It is now up to you. Also, it is becoming more and more of a single 1.81 package.

すなわち、プリント配?MIh板の試験に2いては。In other words, print distribution? 2 for the MIh board exam.

回路機能や電気的特性の#A、験はプリント配線基板の
製造前にLSI単体で専用又は汎用のり、SIテスタで
済ませ、プリント配線基板の試験としては試11It済
のLSIと外付回路部品や外部リード線などとの相互の
半田付接続状態の良否判定tボードテスタを用いて行う
ような1″錦略化の1頃向におる。
#A testing of circuit functions and electrical characteristics is carried out on a single LSI before manufacturing a printed wiring board using a dedicated or general-purpose glue or an SI tester. It is about time to make a 1" brocade test using a t-board tester to determine the quality of the mutual solder connection with external lead wires.

つま9%半出付のオープンや7ヨート、電子部品の誤挿
入などを試験する訳である。
Tests include opening the toe 9% and half out, 7 yaws, and incorrectly inserting electronic parts.

fA1図は前述したプリント配線画板の試験を行うボー
ドテスタの従来例を示すブロック図である。
FIG. fA1 is a block diagram showing a conventional example of a board tester for testing the aforementioned printed wiring board.

第1図において、シリンド自己?IM示根lに設けられ
たテスト端子2乃至9τスイッチ回路10.11を用い
て適宜組合せて相互間の抵抗愼を抵抗計12で温蔵する
ようになっている。
In Figure 1, the cylinder self? The test terminals 2 through 9τ switch circuits 10.11 provided at the IM indicator 1 are appropriately combined to measure the resistance between them using the resistance meter 12.

しかしながら、第1図の従来のボードテスタに2いては
、全てのテスト端子2乃至9の良否を判定丁/)、fで
Vこは、スイッチ回路10.ll’i多くの回数切換え
る必要があシ、また、そのS度抵抗1(t12を用いて
抵抗ufi、の測定?I:有う必要があり、結局全ての
試験τ終了するまでには多くのl#l1jI金必要とし
℃いた。また、スイッチ回路10.11を順仄足められ
たり換を何うために制御回路が必要となっていた。
However, the conventional board tester shown in FIG. I'll need to switch many times, and also measure the resistance ufi using the S degree resistance 1 (t12). In addition, a control circuit was required to supplement or replace the switch circuits 10 and 11.

〔発明の目的〕 本発明の目的は、試綬峙曲の短縮したボードテスタを提
供することにおる。
[Object of the Invention] An object of the present invention is to provide a board tester with a shortened test lead time.

〔発明の構成〕[Structure of the invention]

本発明は、従来の抵抗計の代わυに発振1g号τ用いて
端子間の導通状態を検査することを特依とし、以下に図
面を用いて本発明の実施例會計述フる。
The present invention specifically relies on testing the conduction state between terminals by using an oscillating signal τ of 1 g instead of a conventional resistance meter, and embodiments of the present invention will be described below with reference to the drawings.

〔実施例〕〔Example〕

第2図に本発明のボードテスタのブロック図tボ丁。第
2図において、プリント配線画板lのテスト端子の−i
2,3,4.5にはそ7tぞれ周波数が異なる発振器1
3.14,15.16の出力信号で人力し、テスト端子
の他の一部6.7,8゜9に出て米ゐ1g号の周波数成
分を発掘器13.14゜15、i6のいずれかの発振周
波数と同じ同調周波数τ府つバンドパスフィルタ17乃
至26とかカルバンドパスフィルタ17乃至26の出力
レベルを検出する検出回路27乃至36とを組合せて両
足シ、バンドパスフィルタ17乃至26の全部もしくは
一部の出力レベルがあらかじめ設定した範囲内でるるこ
とを判定回路37で判定するようになっている。
FIG. 2 is a block diagram of the board tester of the present invention. In Figure 2, -i of the test terminal of the printed wiring board l
2, 3, and 4.5 each have an oscillator 1 with a different frequency.
Using the output signals of 3.14 and 15.16, the other parts of the test terminals 6.7 and 8°9 are used to extract the frequency components of US 1g from the excavator 13.14°15 and i6. By combining band pass filters 17 to 26 with the same tuning frequency τ as the oscillation frequency and detection circuits 27 to 36 for detecting the output levels of the Cull band pass filters 17 to 26, both legs of the band pass filters 17 to 26 are combined. A determination circuit 37 determines whether all or part of the output level is within a preset range.

例えば、プリント配線画板lのテスト端子2に接続さル
た発振器13の信号をかかる発振器ljの周波数と同じ
同調周波数を持つバンドパスフィルタ17を弁して検出
回路27が検出した場合には、バンドパスフィルタ17
がテス) Q−4子6と接続されているのでテスト端子
2とテスト端子6との間は導通があることになる。この
場合、テスト端子6に出て来る出力レベルの大きさを検
出回路27で検出して定めLl)fした範囲内で必ゐか
全判断できるようにしてPけば、テスト端子2と6との
+1JJのどこかが短絡している工うな不良の場合には
テスト端子6に出て来る祐振器13の周波数成分の出力
レベルが大さくなるので除去可能でめり、また、テスト
端子2と6との間のどこかがオーブン又は接触不良の場
合Vこは逆に前8じ出力レベルが小さくなり同様に味去
可能でるる。さらに電子部品の誤仲人があった場合にも
テスト端子2と6の曲のインピーダンスが変化してl1
iI記出力レベルが礪F<’V、−tバので詮去可台旨
であ入〜テスト端子間の特性を全テスト端子間で回路に
試験するために、テスト端子の−[2,3,4゜5にそ
n(′れ周波数の異なる発振器13.i4゜ls、ia
i接続しており、テスト端子5.6゜7.8に出て来る
出力信号中に含まれる発振器33゜14.15.16の
そnぞれの周波数成分tバンドパスフィルタ17乃至2
60同調周波数で発掘器13,14.15.16のどれ
かに合せるようにして取り出してその出力レベルを検出
回路27乃至36で足りられた範囲内であるか否か全判
断ずゐ。判定回路37は検出回路27乃至36が全て又
は一部が艮と判断した場合に良品と判定するように構成
でき、すなわちアンド回路で構成できる。涌出回路27
乃至36のうらボめらnた検出口μのどれか一つでも不
良と判断した場合には判定回路Jlよ不良品と判定する
ようになっている。
For example, if the detection circuit 27 detects the signal from the oscillator 13 connected to the test terminal 2 of the printed wiring board l by passing through the bandpass filter 17 having the same tuning frequency as the frequency of the oscillator lj, Pass filter 17
Since the test terminal 2 and the test terminal 6 are connected to the Q-4 terminal 6, there is continuity between the test terminal 2 and the test terminal 6. In this case, if the magnitude of the output level appearing at test terminal 6 is detected and determined by the detection circuit 27, it can be determined whether it is necessary or not within the range specified by Ll)f, then test terminals 2 and 6 can be If +1JJ is short-circuited somewhere, the output level of the frequency component of the oscillator 13 that comes out to the test terminal 6 will increase, so it can be removed. If somewhere between 6 and 6 is in the oven or there is a poor connection, the output level will be lower than before, and the output level will be reduced in the same way. Furthermore, if there is an incorrect match between electronic components, the impedance of the song at test terminals 2 and 6 will change and l1
In order to test the characteristics between the input and test terminals on the circuit between all test terminals, the -[2,3 , 4゜5 and n(' oscillators with different frequencies 13.i4゜ls, ia
The frequency components of the oscillators 33, 14, 15, and 16 included in the output signal appearing at the test terminals 5.6, 7.8, and bandpass filters 17 to 2 are connected to each other.
60 tuning frequency to match any of the excavators 13, 14, 15, and 16, and the detection circuits 27 to 36 judge whether the output level is within a sufficient range or not. The determination circuit 37 can be configured to determine that the product is non-defective when all or some of the detection circuits 27 to 36 determine that the product is defective, that is, it can be configured as an AND circuit. Output circuit 27
If any one of the 36 backward facing detection ports μ is determined to be defective, the determination circuit Jl determines that the product is defective.

以上、説明し1こようにX発明によるボードテスタにお
いては、全テスト端子τ同時IC試験できるため試験で
要する時間は短時間で済み、試験コストの低減が可能で
める。また、従来のボードテスタが必鷺としてAた制御
回路が不要となり%構造を囲単にできるものである。
As explained above, in the board tester according to the X invention, since all the test terminals τ can be simultaneously tested on the IC, the time required for the test can be shortened, and the test cost can be reduced. Further, the control circuit required in conventional board testers is not required, and the structure can be easily enclosed.

本究明の説明は第2図を用いてブロック図で行ったが2
本発明を構成する各ブロックはいずrLも広く公知の内
容で必シ、容易に実現可能なもので必ゐ。
This research was explained using a block diagram using Figure 2.
Each block constituting the present invention must be widely known and easily realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のボードテスタを示すブロック図、第2図
は本発明によるボードテスタを示すブロック図Cある。 l・・・・・・プリント配線基4μ、2乃至9・・・・
・・テスト端子、10.11・・・・・・スイッチ回路
、12・・・・・・抵抗計、13乃至16・・・・・・
発振器、17乃主26・・・・・・バンドパスフィルタ
、27乃至36・・・・・・mtB回路、37・・・・
・・判定回路。
FIG. 1 is a block diagram showing a conventional board tester, and FIG. 2 is a block diagram C showing a board tester according to the present invention. l...Printed wiring board 4μ, 2 to 9...
...Test terminal, 10.11... Switch circuit, 12... Resistance meter, 13 to 16...
Oscillator, 17 to main 26...Band pass filter, 27 to 36...mtB circuit, 37...
...Judgment circuit.

Claims (1)

【特許請求の範囲】[Claims] プリント配線基板のテスト端子の一部にそ匹ぞn周波数
が異なる発振器の出力信号を人力し、前置テスト端子の
他の一部に出て来る1ぎ号の周波数成分を前d己元振器
のいずnかの発撮周V数と同じ同調周波u k Wtつ
バンドパスフィルタとかかるバンドパスフィルタの出力
レベルを検出する検出回路とを組合せて測定しに前記バ
ンドパスフィルタの全部もしくは一部の出力レベルがあ
らかじめ設定し′fc範囲内であることを判定回路で判
定することtt#徴とするボードテスタ。
The output signals of oscillators with different frequencies are applied to some of the test terminals of the printed wiring board, and the 1st frequency component appearing at the other part of the pre-test terminals is oscillated by the original source. All or all of the band-pass filters or A board tester in which a determination circuit determines that a part of the output level is within a preset 'fc range.
JP2344284A 1984-02-10 1984-02-10 Board tester Pending JPS60168060A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2344284A JPS60168060A (en) 1984-02-10 1984-02-10 Board tester

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2344284A JPS60168060A (en) 1984-02-10 1984-02-10 Board tester

Publications (1)

Publication Number Publication Date
JPS60168060A true JPS60168060A (en) 1985-08-31

Family

ID=12110614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2344284A Pending JPS60168060A (en) 1984-02-10 1984-02-10 Board tester

Country Status (1)

Country Link
JP (1) JPS60168060A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0906886A1 (en) * 1997-09-26 1999-04-07 Thyssen De Reus B.V. Control circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0906886A1 (en) * 1997-09-26 1999-04-07 Thyssen De Reus B.V. Control circuit
NL1007129C2 (en) * 1997-09-26 1999-05-04 Thyssen De Reus Bv Control circuit.
US6075296A (en) * 1997-09-26 2000-06-13 Thyssen De Reus B.V. Control circuit

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