JPS60110124A - Processing method of fine pattern - Google Patents
Processing method of fine patternInfo
- Publication number
- JPS60110124A JPS60110124A JP21826783A JP21826783A JPS60110124A JP S60110124 A JPS60110124 A JP S60110124A JP 21826783 A JP21826783 A JP 21826783A JP 21826783 A JP21826783 A JP 21826783A JP S60110124 A JPS60110124 A JP S60110124A
- Authority
- JP
- Japan
- Prior art keywords
- resist pattern
- substrate
- heat treatment
- dry etching
- far ultraviolet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003672 processing method Methods 0.000 title claims description 4
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 15
- 238000001312 dry etching Methods 0.000 claims abstract description 14
- 238000001020 plasma etching Methods 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 230000001678 irradiating effect Effects 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 5
- 239000010408 film Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は微Ａｉｌしくターン加工方法、とくに、レジス
トパターンをマスクとする基板のドライエツチング方法
に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for finely turning a pattern, particularly to a method for dry etching a substrate using a resist pattern as a mask.
従来例の構成とその問題点
半導体素子の微細化に伴いドライエ・ノチング技術の利
Ｌｌ］がすすんでいる。Conventional Structures and Problems With the miniaturization of semiconductor devices, the benefits of dry notching technology are increasing.
第１図にホトレジストをマスクとした、基板面上薄膜の
ドライエツチング工程を示す。第１図ａで示されるよう
な半導体基板１上の薄膜２を、レジストパターン３をマ
スクとしたものを、ドライエンチングする場合、第１図
すに示すように、工、ノチング媒体に接するレジストパ
ターン３の形状自身がくずれるために、薄膜２に所望の
パターンを形成することが困難であった。FIG. 1 shows the process of dry etching a thin film on a substrate surface using a photoresist as a mask. When dry etching a thin film 2 on a semiconductor substrate 1 as shown in FIG. 1a using a resist pattern 3 as a mask, as shown in FIG. Since the shape of the pattern 3 itself was distorted, it was difficult to form a desired pattern on the thin film 2.
発明の目的
本発明は上記の問題を解決し、ドライエツチングにおい
てレジストパターン形状くずれを起こさず、良好なパタ
ーン形成を行うことの出来る微細パターン加工方法を提
供することを目的としている。OBJECTS OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems and to provide a fine pattern processing method that can form a good pattern without causing deformation of the resist pattern shape during dry etching.
発明の構成
本発明は、基板上に形成された所定形状のレジストパタ
ーンに、波長３００ ｎ ｍ以下の遠紫外光を照射し、
２００℃以上の熱処理を行った後、前記レジストパター
ンをマスクとしてドライエツチングにより前記基板を精
度良く加工するもので、本発明を用いることにより、高
精度なドライエツチングが容易にできる。Structure of the Invention The present invention irradiates a resist pattern of a predetermined shape formed on a substrate with deep ultraviolet light having a wavelength of 300 nm or less,
After heat treatment at 200° C. or higher, the substrate is processed with high accuracy by dry etching using the resist pattern as a mask. By using the present invention, highly accurate dry etching can be easily performed.
実施例の説明
本発明の実施例を第２図に示す。Ｓｉ基板１上に厚さ０
．６μｍの８１０２膜２を形成した後、東京応化製ホト
レジスト０ＦＰＲ８００を用いてレジストパターン３を
形成する（第２図ａ）。Ｘ ｅ −Ｈｇランプを用いて
、ピーク波長が３０Ｑｎｍ以下の遠紫外光４を、２０ｍ
Ｗ／ｄの強さで３分間照射する（第２図ｂ）。さらに、
Ｎ２雰囲気中で２７０℃。DESCRIPTION OF THE EMBODIMENTS An embodiment of the present invention is shown in FIG. 0 thickness on Si substrate 1
．． After forming the 8102 film 2 of 6 μm, a resist pattern 3 is formed using photoresist 0FPR800 manufactured by Tokyo Ohka Co., Ltd. (FIG. 2a). Using an X e -Hg lamp, far ultraviolet light 4 with a peak wavelength of 30 Qnm or less was emitted at a distance of 20 m.
Irradiate for 3 minutes at an intensity of W/d (Figure 2b). moreover,
270°C in N2 atmosphere.
３０分の熱処理を行った後、０３Ｆ８ガスを用いて反応
性イオンエツチングを行うことにより、ＳｉＯ膜２のパ
ターニングを行う（第２図Ｃ）。After 30 minutes of heat treatment, the SiO film 2 is patterned by reactive ion etching using 03F8 gas (FIG. 2C).
エツチング条件は、ＲＦ出力０ 、２ ｓＷ／ｃｄ 、
Ｃ３Ｆ ８ガス流１ｉ２０ｓｃｃｍ 、圧力ａＰａで
委る。その結果、レジストパターン３の形状は、ドライ
エ、ランプにより変化せず、これにより、Ｓｉ○２膜２
にχ・１しても、寸法精度の良いノ（ターンを得ること
力ぶできる。The etching conditions were RF output 0, 2 sW/cd,
A C3F8 gas flow of 1i20 sccm and a pressure of aPa are applied. As a result, the shape of the resist pattern 3 does not change due to the dryer and lamp, and as a result, the shape of the resist pattern 3 does not change due to the dryer and lamp.
Even if it is χ・1, it is possible to obtain a turn with good dimensional accuracy.
なお、遠紫外光照射後、熱処理をしないか、あるいは熱
処理が２００℃未満の低い温度の場合には、第１図に示
したレジスト形状のくずれが生じる。Note that if heat treatment is not performed after irradiation with deep ultraviolet light, or if heat treatment is performed at a low temperature of less than 200° C., the resist shape shown in FIG. 1 will be distorted.
レジスト形状を変えないためには、２００℃以」二の熱
処理が必要である。第３図に熱処理温度とレジストパタ
ーン変形との関係をグラフに示す。熱処理温度が高くな
るほど、長時間エツチングしてもレジスト形状は変化し
ない。In order not to change the resist shape, heat treatment at 200° C. or higher is necessary. FIG. 3 shows a graph of the relationship between heat treatment temperature and resist pattern deformation. The higher the heat treatment temperature is, the more the resist shape does not change even if etched for a long time.
第４図に、高温熱処理により、レジストパターンが変形
するのを防止するために必要な遠紫外光照射時間を示す
。照射時間が長いほど、パターン変形がおきる熱処理温
度は高い。すなわち、照射時間を長くするほど、高温熱
処理が可能となり、長時間のドライエツチングに対して
レジストの変形を防止することができる。FIG. 4 shows the far-ultraviolet light irradiation time required to prevent the resist pattern from deforming due to high-temperature heat treatment. The longer the irradiation time, the higher the heat treatment temperature at which pattern deformation occurs. That is, the longer the irradiation time is, the more high-temperature heat treatment becomes possible, and the deformation of the resist can be prevented during long-term dry etching.
発明の効果
μ上に詳述したように、本発明は、基板上に形成された
所定形状のレジストパターンに、波長３００ｎｍ以下の
遠紫外光を照射し、２００’Ｃ以上の熱処理を行った後
、前記レジストパターンをマスクとしてドライエンチン
グにより前記基板を加工する工程をそなえた微細パター
ン加工方法であって、本発明を用いることにより、ドラ
イエ、ランプの際に生じるレジストの変形を防止し、高
精細度に基板を加工することができる。Effects of the Invention μAs detailed above, the present invention provides a resist pattern having a predetermined shape formed on a substrate, which is irradiated with deep ultraviolet light having a wavelength of 300 nm or less, and then heat-treated at 200'C or more. , a fine pattern processing method comprising a step of processing the substrate by dry etching using the resist pattern as a mask, by using the present invention, deformation of the resist that occurs during dry etching and lamp processing can be prevented, and high Substrates can be processed with high precision.
第１図ａ、ｂは従来例の微細加工方法を示す断面図、第
２図ａ −Ｃは本発明による微細加工方法を示す断面図
、第３図は熱処理温度とドライエツチングによるレジス
トの変形との関係を示す特性１２Ｊ、第４図は遠紫外光
照射時間と熱処理温度、レジストの変形との関係を示す
特性図である。
１・・・・Ｓｉ基板、２・・・・・Ｓ ｚ Ｏ２膜、３
・・・・・０ＦＰＲ８００パターン、４−・・・・遠紫
外光。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第２
図
３図
ドライエツチング藺ｑ司（りう
第 ４ 図
逮栗外光照躬１１間（全Figures 1a and b are cross-sectional views showing the conventional microfabrication method, Figures 2a-c are cross-sectional views showing the microfabrication method according to the present invention, and Figure 3 shows resist deformation due to heat treatment temperature and dry etching. FIG. 4 is a characteristic diagram showing the relationship between far ultraviolet light irradiation time, heat treatment temperature, and resist deformation. 1...Si substrate, 2...SzO2 film, 3
...0FPR800 pattern, 4-...Deep ultraviolet light. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure 3 Dry etching
Claims (1)
波長３００ ｎ ｍ以下の遠紫外光を照射し、２００℃
以」二の熱処理を行った後、前記レジスレ（ターンをマ
スクとしてドライエ、ノチングにより前記基板を加工す
ることを特徴とする微細〕くターン加工方法。A resist pattern of a predetermined shape formed on a substrate (in a turn,
Irradiate with far ultraviolet light with a wavelength of 300 nm or less and heat at 200°C.
A fine turn processing method, characterized in that, after performing the second heat treatment, the substrate is processed by dry etching and notching using the turn as a mask.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21826783A JPS60110124A (en) | 1983-11-18 | 1983-11-18 | Processing method of fine pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21826783A JPS60110124A (en) | 1983-11-18 | 1983-11-18 | Processing method of fine pattern |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60110124A true JPS60110124A (en) | 1985-06-15 |
Family
ID=16717190
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21826783A Pending JPS60110124A (en) | 1983-11-18 | 1983-11-18 | Processing method of fine pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60110124A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6255937A (en) * | 1985-09-05 | 1987-03-11 | Matsushita Electronics Corp | Forming method for metal pattern |
| KR20010064971A (en) * | 1999-12-20 | 2001-07-11 | 윤종용 | Method for forming pattern in semiconductor processing |
| KR20110027597A (en) | 2009-09-08 | 2011-03-16 | 도쿄엘렉트론가부시키가이샤 | Method for processing a target object and computer readable storage medium |
-
1983
- 1983-11-18 JP JP21826783A patent/JPS60110124A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6255937A (en) * | 1985-09-05 | 1987-03-11 | Matsushita Electronics Corp | Forming method for metal pattern |
| KR20010064971A (en) * | 1999-12-20 | 2001-07-11 | 윤종용 | Method for forming pattern in semiconductor processing |
| KR20110027597A (en) | 2009-09-08 | 2011-03-16 | 도쿄엘렉트론가부시키가이샤 | Method for processing a target object and computer readable storage medium |
| US8759227B2 (en) | 2009-09-08 | 2014-06-24 | Tokyo Electron Limited | Method for processing a target object |
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