JPS5972997A - Erroneous operation detector circuit for stepping motor - Google Patents
Erroneous operation detector circuit for stepping motorInfo
- Publication number
- JPS5972997A JPS5972997A JP18198282A JP18198282A JPS5972997A JP S5972997 A JPS5972997 A JP S5972997A JP 18198282 A JP18198282 A JP 18198282A JP 18198282 A JP18198282 A JP 18198282A JP S5972997 A JPS5972997 A JP S5972997A
- Authority
- JP
- Japan
- Prior art keywords
- terminals
- circuit
- detector circuit
- stepping motor
- resistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims abstract description 29
- 230000007257 malfunction Effects 0.000 claims abstract description 22
- 230000002159 abnormal effect Effects 0.000 abstract description 6
- 101100138677 Arabidopsis thaliana NPF8.1 gene Proteins 0.000 abstract description 3
- 101150059273 PTR1 gene Proteins 0.000 abstract description 3
- 101100262635 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) UBR1 gene Proteins 0.000 abstract description 3
- 101100031674 Arabidopsis thaliana NPF8.3 gene Proteins 0.000 abstract description 2
- 101100235787 Schizosaccharomyces pombe (strain 972 / ATCC 24843) pim1 gene Proteins 0.000 abstract description 2
- 101150114015 ptr-2 gene Proteins 0.000 abstract description 2
- 230000007547 defect Effects 0.000 abstract 1
- 230000005856 abnormality Effects 0.000 description 4
- 238000003745 diagnosis Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000005284 excitation Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P8/00—Arrangements for controlling dynamo-electric motors rotating step by step
- H02P8/36—Protection against faults, e.g. against overheating or step-out; Indicating faults
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Stepping Motors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はステッピングモータの誤動作検知回路に関する
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a stepping motor malfunction detection circuit.
従来から流量や位置などを連続的に制御するために、第
１図に示すようにたとえば４相のステッピングモータが
用いられている。ところで、このようなステッピングモ
ータでは、１相でも断線や短絡などの異常が生じると、
乱調や脱調などの予測不能な動作を生じる。そこで、従
来では各相の異常を検出するために、各相に対応して設
けられた駆動回路１ａ＊１ｂｐｌｃ、、Ｉｄに、誤動作
検知回路２ａ、２ｂ、２ｃ、２ｄをそれぞれ個別に接続
していた。なお、第１図において参照符ＶＢは電源電圧
を示し、ｖＣＣは一定の電源供給電圧を示す。また駆動
回路１ｂ、ｌｃ、ｌｄは駆動回路１ａと同様に構成され
ておシ、誤動作検知回路２ｂｔ２ｃｔ２ｄは誤動作検知
回路２ａと同様に構成されている。Conventionally, a four-phase stepping motor, for example, as shown in FIG. 1, has been used to continuously control flow rate, position, etc. By the way, in such a stepping motor, if an abnormality such as disconnection or short circuit occurs even in one phase,
This causes unpredictable behavior such as out-of-step or out-of-step. Therefore, conventionally, in order to detect abnormalities in each phase, malfunction detection circuits 2a, 2b, 2c, and 2d are individually connected to the drive circuits 1a*1bplc, , Id provided corresponding to each phase. Ta. In FIG. 1, reference symbol VB indicates a power supply voltage, and vCC indicates a constant power supply voltage. Further, the drive circuits 1b, lc, and ld are configured similarly to the drive circuit 1a, and the malfunction detection circuit 2bt2ct2d is configured similarly to the malfunction detection circuit 2a.
このような従来技術において、各駆動回路１ａ〜１ｄに
おけるトランジスタＴＲＩが遮断しているときに、正常
な動作時には各誤動作検知回路２ａ〜２ｄにおけるトラ
ンジスタＴＲ，２は導通しており、各出力端子３ａ、３
ｂ、３ｃ、３ｄの出力はローレベルである。ところが負
荷線４ａ、４ｂ。In such conventional technology, when the transistor TRI in each drive circuit 1a to 1d is cut off, the transistor TR, 2 in each malfunction detection circuit 2a to 2d is conductive during normal operation, and each output terminal 3a is turned off. ,3
The outputs of b, 3c, and 3d are low level. However, the load lines 4a and 4b.
４ｃ、４ｄが断線するとトランジスタＴＲ２は遮断し、
前記各出力は／Ｓイレベルとなる。それによっていずれ
かの負荷線４＆〜４ｄの断線が検知される。また、アー
ス短絡の場合にも上述と同様にして各出力端子３ａ〜３
ｄの出力がローレベルからハイレベルに変化する。さら
に、各駆動回路１ａ〜１ｄにおけるトランジスタＴＲＩ
のコレクタ・エミッタ間が開放すると、トランジスタＴ
ＲＩが導通しているときに正常な動作であれは各誤動作
検知回路２８〜２ｄのトランジスタＴ Ｒ２が遮断して
いるため導通してしまう。したがって正常時には各出力
端子３ａ〜３ｄの出力が７１イレベルであるはずなのに
ローレベルとなってしまう。このようにして、異常状態
が各相銀に検知される。When 4c and 4d are disconnected, transistor TR2 is cut off,
Each of the outputs is at the /S level. Thereby, a disconnection of any of the load lines 4&~4d is detected. Also, in the case of a ground short circuit, each output terminal 3a to 3
The output of d changes from low level to high level. Furthermore, the transistor TRI in each drive circuit 1a to 1d
When the collector-emitter of is opened, the transistor T
When RI is conductive, if the operation is normal, the transistor TR2 of each malfunction detection circuit 28 to 2d is cut off, so it becomes conductive. Therefore, although the outputs of the output terminals 3a to 3d should be at the 71-level level during normal operation, they become low level. In this way, abnormal conditions are detected in each phase silver.
ところが、上述のごとき従来技術では、誤動作を検出し
たときに各駆動回路１ａ〜１ｄを常時停止、させるため
の処理回路をも含めて、回路が複雑である。またマイク
ロコンピュータを用いて各駆動回路１ａ〜１ｄのトラン
ジスタＴＲＩのスイッチング態様を制御する場合には、
各誤動作検知回路２ａ〜２ｄの出力を入力するために、
マイクロコンピュータに４つの余分な人力ポートを設け
る必要がある。さらに、前述したごと＜Ｗｒ線時および
アース短絡時において、各誤動作検知回路２ａ〜２ｄは
同一の動作をするので、両者を区別することができず、
したがって正確な故障診断を行なうことができない。However, in the conventional technology as described above, the circuit is complicated, including a processing circuit for constantly stopping each of the drive circuits 1a to 1d when a malfunction is detected. Further, when controlling the switching mode of the transistor TRI of each drive circuit 1a to 1d using a microcomputer,
In order to input the output of each malfunction detection circuit 2a to 2d,
It is necessary to provide four extra human power ports on the microcomputer. Furthermore, as described above, each of the malfunction detection circuits 2a to 2d operates in the same manner when the Wr line is shorted and when the ground is shorted, so it is impossible to distinguish between the two.
Therefore, accurate failure diagnosis cannot be performed.
本発明は、上述の技術的課題を解決し、構成が簡単でち
り、しかも検知出力端子金少なくし、かつ正確な故障診
断を行なえるようにしたステッピングモータの誤動作検
知回路を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a stepping motor malfunction detection circuit that solves the above-mentioned technical problems, has a simple configuration, generates less dust, reduces detection output terminal metal, and enables accurate failure diagnosis. shall be.
以下、図面によって本発明の詳細な説明する。Hereinafter, the present invention will be explained in detail with reference to the drawings.
第２図は本発明の一実施例の回路図であり、第１図の従
来技術に対応する部分には同一の参照符を付す。４相−
２相励磁方式のステッピングモータＭの第１相、第２相
、第３相および第４相コイルＣＩ 、Ｃ２、Ｃ３，Ｃ４
には、負荷線４ａ〜４ｂを介して駆動回路１ａ〜１ｄが
それぞれ個別に接続される。また各駆動回路１ａ〜１ｄ
は、本発明に従う単一の誤動作検知回路６に共通に接続
され、この誤動作検知回路６によって各駆動回路１ａ〜
ｌｄ毎の異常が検知される。FIG. 2 is a circuit diagram of an embodiment of the present invention, and parts corresponding to the prior art in FIG. 1 are given the same reference numerals. 4 phase-
1st phase, 2nd phase, 3rd phase, and 4th phase coils CI, C2, C3, C4 of stepping motor M with two-phase excitation method
Drive circuits 1a to 1d are individually connected to the drive circuits 1a to 1d via load lines 4a to 4b, respectively. In addition, each drive circuit 1a to 1d
are commonly connected to a single malfunction detection circuit 6 according to the present invention, and each drive circuit 1a to 1a is connected in common by this malfunction detection circuit 6.
Abnormalities for each ld are detected.
駆動回路１ａは、半導体スイッチング素子としてのトラ
ンジスタＴＲＩとサージ′電圧吸収用のダイオードＤＩ
とを直列に接続して構成される。トランジスタＴＲＩと
ダイオードＤ１との接続点は、負荷線４ａＫ接続するだ
めの端子７ａに接続される。またトランジスタＴＲＩの
ベースはマイクロコンピュータなどの処理回路８からの
制御信号が与えられる端子９ａに接続される。他の駆動
回路１ｂ〜１ｄは駆動回路１ａと同様に構成されておシ
、駆動回路１ａの端子７ａ、９ａに対応する端子には添
字す、ｃ、ｄｉそれぞれ付して示す。The drive circuit 1a includes a transistor TRI as a semiconductor switching element and a diode DI for absorbing surge voltage.
It is constructed by connecting these in series. A connection point between the transistor TRI and the diode D1 is connected to a terminal 7a that is connected to the load line 4aK. Further, the base of the transistor TRI is connected to a terminal 9a to which a control signal from a processing circuit 8 such as a microcomputer is applied. The other drive circuits 1b to 1d are configured similarly to the drive circuit 1a, and the terminals corresponding to the terminals 7a and 9a of the drive circuit 1a are shown with suffixes ``c'' and ``di'', respectively.
上述のごとき駆動回路１ａ〜１ｄにおいて、端子７ａ〜
７ｄの電圧波形は第３図で示される。なお、第３図（ａ
）は端子７ａに対応し、第３図（ｂ）は端子７ｂに対応
し、第３図（ｅ）は端子７ｃに対応し、第３図（ｄ）は
端子７ｄに対応する。第３図で示すごとく各端子７ａ〜
７ｄの電圧波形が変化することにより、ステッピングモ
ータＭがステンピンク駆動される。In the drive circuits 1a to 1d as described above, the terminals 7a to 1d
The voltage waveform at 7d is shown in FIG. In addition, Fig. 3 (a
) corresponds to the terminal 7a, FIG. 3(b) corresponds to the terminal 7b, FIG. 3(e) corresponds to the terminal 7c, and FIG. 3(d) corresponds to the terminal 7d. As shown in Fig. 3, each terminal 7a~
As the voltage waveform 7d changes, the stepping motor M is driven in a stainless steel manner.
各駆動回路１ａ〜１ｄにおいて、トランジスタＴＲＩと
ダイオードＤ１との接続点は端子１０ａ〜１０ｄにも接
続される。これらの端子１０ａ〜１０ｄは誤動作検知回
路６の端子１１ａ〜ｌｉｄにそれぞれ個別に接続される
。In each of the drive circuits 1a to 1d, the connection point between the transistor TRI and the diode D1 is also connected to the terminals 10a to 10d. These terminals 10a to 10d are individually connected to terminals 11a to lid of the malfunction detection circuit 6, respectively.
誤動作検知回路６において、各端子１１ａ〜１１ｄには
抵抗Ｒ１，Ｒ２，Ｒ３，Ｒ４の一端が接続される。した
がって各抵抗Ｒ１〜Ｒ４は負荷線４ａ〜４ｄに接続され
ることになる。相互に逆相となる負荷線に対応する抵抗
Ｒ１，Ｒ３および抵抗Ｒ２，Ｒ４の各一端は接続点１２
．１３で接続される。なお各抵抗Ｒ１〜Ｒ４の抵抗値は
等しく、かつ各相コイルＣ１〜Ｃ４の直流抵抗値よシも
犬に選ばれている。In the malfunction detection circuit 6, one ends of resistors R1, R2, R3, and R4 are connected to each terminal 11a to 11d. Therefore, each of the resistors R1 to R4 is connected to the load lines 4a to 4d. One end of each of the resistors R1, R3 and resistors R2, R4 corresponding to load lines having opposite phases to each other is connected to a connection point 12.
．． Connected at 13. Note that the resistance values of the resistors R1 to R4 are equal, and the DC resistance values of the phase coils C1 to C4 are also selected to be similar.
接続点１２．１３間には、第１発光ダイオードＬＥＤ
１と、第１発光ダイオードＬｇＤ １と逆方向の第２
発光ダイオードＬＥＤ ２と、コンデンサＣとが並列に
接続される。なお各発光ダイオードＬＥＤ １ 、Ｌ
ＥＤ ２（７）順方向電圧ＶＦＵＶＦ（−ＶＢに選ばれ
ている。また第１発光ダイオードＬＥＤ１とフォトカプ
ラ１４ｆ：構成する第１フオトトランジスタＰＴＲ１と
、第２発光ダイオードＬＥＤ２とフォトカプラ１５を構
成する第２フォトトランジスタＰＴＲ，２とが、電源供
給電圧Ｖｃｃが与えられる端子１６および接地間に並列
に接続される。各フォトトランジスタＰＴＲ１、、ＰＴ
Ｒ２のコレクタは、処理回路８に検知信号を与えるだめ
の端子１７．１８にそれぞれ接続される。Between the connection points 12 and 13, a first light emitting diode LED
1, and a second light emitting diode in the opposite direction to the first light emitting diode LgD1.
A light emitting diode LED 2 and a capacitor C are connected in parallel. In addition, each light emitting diode LED 1, L
ED 2 (7) Forward voltage VFUVF (-VB is selected. Also, the first light emitting diode LED1 and the photocoupler 14f: constitute the first phototransistor PTR1, and the second light emitting diode LED2 and the photocoupler 15. A second phototransistor PTR, 2 is connected in parallel between the terminal 16 to which the power supply voltage Vcc is applied and ground. Each phototransistor PTR1, PT
The collectors of R2 are respectively connected to terminals 17 and 18 for providing detection signals to the processing circuit 8.
このような誤動作検知回路６において、正常時には接続
点１２．１３の電位は１／２ＶＢであシ、異常時には両
接点１２．１３間に電位差が生じ、それによって第１お
よび第２発光ダイオードＬＥＤ１ 、ＬＥＤ ２のいず
れかが通電され、第１および第２フオトトランジスタＰ
ＴＲ１、ＰＴＲ２のいずれかが導通し、端子１７．１８
に検知信号が出方される。In such a malfunction detection circuit 6, when normal, the potential of the connection point 12.13 is 1/2VB, and when abnormal, a potential difference is generated between both contacts 12.13, which causes the first and second light emitting diodes LED1, Either of the LEDs 2 is energized and the first and second phototransistors P
Either TR1 or PTR2 is conductive and terminal 17.18
A detection signal is output.
ここで、各相銀の異常モードと、接続点１２゜１３にお
ける電位と、検知出力と金示すと第１表のようになる。Table 1 shows the abnormal mode of each phase, the potential at the connection point 12 and 13, and the detection output.
また異常動作検知後に各駆動回路１ａ〜ｌｄｉオフ状態
にしたときの異常モードに対応した検知出力を示すと、
第２表のようになる。In addition, the detection output corresponding to the abnormal mode when each drive circuit 1a to ldi is turned off after abnormal operation is detected is shown below.
It will look like Table 2.
（以下余白）
第 １ 表
第 ２ 表
なお、第１表および第２表において、ＦｌはコイルＣ１
〜Ｃ４あるいは負荷線４ａ〜４ｄの断線を示し、Ｆ２は
負荷線４ａ〜４ｄのアース短絡あるいはトランジスタＴ
ＲＩのコレクタ・エミッタ間短絡全示し、Ｆ３はトラン
ジスタＴＲＩのコレクタ・エミッタ間開放を示す。また
Ｎは正常時のの出力全示し、β′は端子１８の出力を示
し、ＨはハイレベルすなわちＶｃｃｉ示し、Ｌはローレ
ベルを示す。なお、Ａ、Ｂ、Ｃ，Ｄは第３図における位
相を示している。(Margin below) Table 1 Table 2 In Tables 1 and 2, Fl is the coil C1.
~C4 or disconnection of the load lines 4a to 4d, F2 indicates a ground short circuit of the load lines 4a to 4d or a transistor T
RI is completely short-circuited between the collector and emitter, and F3 is an open circuit between the collector and emitter of transistor TRI. Further, N indicates all outputs during normal operation, β' indicates the output of the terminal 18, H indicates high level, that is, Vcci, and L indicates low level. Note that A, B, C, and D indicate the phases in FIG. 3.
したがって処理回路８において、第１表および第２表に
示すごとく検知出力の組合せを予め記憶させることによ
り、各相における異常を極めて容易に判断することがで
きる。しかも断線および短絡の区別をつけて正確な故−
診断を行なうことができる。また誤動作検出回路６から
の検出信号は２つの端子１７．１８から出力されるので
、処理回路８の入力ボートは２つあればよい。さらに各
駆動回路１ａ〜１ｄに共通に単一の誤動作検知回路６が
設けられるので、回路構成が簡単である。Therefore, by pre-memorizing combinations of detection outputs as shown in Tables 1 and 2 in the processing circuit 8, abnormality in each phase can be determined very easily. Moreover, it is possible to accurately distinguish between disconnections and short circuits.
Diagnosis can be performed. Further, since the detection signal from the malfunction detection circuit 6 is outputted from two terminals 17 and 18, the processing circuit 8 only needs to have two input ports. Furthermore, since a single malfunction detection circuit 6 is provided in common to each of the drive circuits 1a to 1d, the circuit configuration is simple.
なお、コンデンサＣはトランジスタＴＲＩが遮断してい
るときのフライバンク電圧がダイオードＤ１に吸収され
るときに生じる交流成分や、サージノイズなどの外乱に
よって接続点１２．１３の電位が変動するのを抑えるた
めのものであシ、発光ダイオードＬＥＤ １ 、ＬＥＤ
２に直列にダイオード全挿入してノイズマージンを増
加させたときには不必要である。Note that the capacitor C suppresses fluctuations in the potential at the connection points 12 and 13 due to alternating current components generated when the flybank voltage is absorbed by the diode D1 when the transistor TRI is cut off, and disturbances such as surge noise. This is for light emitting diode LED 1, LED
This is not necessary when all diodes are inserted in series with 2 to increase the noise margin.
本発明のさらに他の実施例として、接続点１２゜１３を
ワイアードＯＲとしてもよく、この場合には誤動作の有
無のみが検知され、検出信号の出力端子が１つとなる。As yet another embodiment of the present invention, the connection points 12 and 13 may be wired OR, in which case only the presence or absence of malfunction is detected, and there is only one output terminal for the detection signal.
また接続点１２，１３の電位のみに注目して誤動作の判
定をすることも可能である。すなわち、第１表および第
２表から明らかとえは比較回路などを用いて検出するこ
とが可能である。またアナログ−デジタル変換して前記
電位を検出するようにしてもよい。It is also possible to determine malfunction by focusing only on the potentials at the connection points 12 and 13. That is, as is clear from Tables 1 and 2, it is possible to detect the difference using a comparison circuit or the like. Alternatively, the potential may be detected by analog-to-digital conversion.
上述の実施例では、４相−２相励磁ステツピングモータ
に関して説明したが、本発明は６相−３相励磁ステツピ
ングモータや８相−４相励磁ステツピングモータなどに
関連しても実施可能である。Although the above-described embodiments have been described in connection with a 4-phase to 2-phase excitation stepping motor, the present invention can also be implemented in connection with a 6-phase to 3-phase excitation stepping motor, an 8-phase to 4-phase excitation stepping motor, etc. It is.
上述のごとく本発明によれば、回路構成が簡単であり、
しかも正確な故障診断が可能となる。また検知出力が１
つあるいは２つとなるので、処理回路をマイクロコンピ
ュータとしたときには入力ボートの数が少なくてすむ。As described above, according to the present invention, the circuit configuration is simple,
Moreover, accurate failure diagnosis becomes possible. Also, the detection output is 1
Therefore, when the processing circuit is a microcomputer, the number of input ports can be reduced.
第１図は従来技術を示す回路図、第２図は本発明の一実
施例の回路図、第３図は電圧波形を示す図である。
４ ａ ｔ ４ ｂ ｔ ４ （！ 、 ４ ｄ 、、
、負荷線、６・・・誤動作検知回路、１７１１８・・・
端子、１４．１５・・・フォトカブラ
代理人 弁理士 西教圭一部FIG. 1 is a circuit diagram showing a conventional technique, FIG. 2 is a circuit diagram of an embodiment of the present invention, and FIG. 3 is a diagram showing voltage waveforms. 4 a t 4 b t 4 (! , 4 d ,,
, load line, 6... malfunction detection circuit, 17118...
Terminal, 14.15...Photocabra agent Patent attorney Kei Nishi
Claims (1)
に接続される負荷線を接続点で接続し、前記接続点の正
常時における電位からのずれに応じた検知信号全出力す
る手段を備えることを特徴とするステッピングモータの
誤動作検知回路。Load lines connected to coils excited in opposite phases are connected to each other of the stepping motors at a connection point, and means is provided for outputting a full detection signal in response to a deviation from a normal potential at the connection point. Features a stepping motor malfunction detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18198282A JPS5972997A (en) | 1982-10-15 | 1982-10-15 | Erroneous operation detector circuit for stepping motor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18198282A JPS5972997A (en) | 1982-10-15 | 1982-10-15 | Erroneous operation detector circuit for stepping motor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5972997A true JPS5972997A (en) | 1984-04-25 |
| JPS6120240B2 JPS6120240B2 (en) | 1986-05-21 |
Family
ID=16110249
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18198282A Granted JPS5972997A (en) | 1982-10-15 | 1982-10-15 | Erroneous operation detector circuit for stepping motor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5972997A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2657735A1 (en) * | 1990-01-26 | 1991-08-02 | Siemens Automotive Sa | DEVICE FOR CONTROLLING THE ELECTRICAL SUPPLY OF A STEPPER MOTOR AND STEPPER MOTOR EQUIPPED WITH SUCH A DEVICE. |
-
1982
- 1982-10-15 JP JP18198282A patent/JPS5972997A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2657735A1 (en) * | 1990-01-26 | 1991-08-02 | Siemens Automotive Sa | DEVICE FOR CONTROLLING THE ELECTRICAL SUPPLY OF A STEPPER MOTOR AND STEPPER MOTOR EQUIPPED WITH SUCH A DEVICE. |
| US5304910A (en) * | 1990-01-26 | 1994-04-19 | Siemens Aktiengesellschaft | Device for controlling the electrical power supply of a stepping motor and stepping motor equipped with such a device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6120240B2 (en) | 1986-05-21 |
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