JPS596544A - Semiconductor substrate mounting jig for plasma etching - Google Patents
Semiconductor substrate mounting jig for plasma etchingInfo
- Publication number
- JPS596544A JPS596544A JP11578082A JP11578082A JPS596544A JP S596544 A JPS596544 A JP S596544A JP 11578082 A JP11578082 A JP 11578082A JP 11578082 A JP11578082 A JP 11578082A JP S596544 A JPS596544 A JP S596544A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- jig
- etching
- counter bore
- disk type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
- H01J37/3411—Constructional aspects of the reactor
- H01J37/3435—Target holders (includes backing plates and endblocks)
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、たとえば半導体基板上に被着したＡ、６（Ａ
ｌ−ｓｉ 、Ａｌ−５ｉ−ｃｕ）膜をホトリングラフィ
技術を用いて所定のパタンに現像したフォトレジストの
膜をマスクとして、平行平板型プラズマエラチャでムｌ
膜を微細パタンにエツチングする際に、半導体基板を好
ましく載置し得るプラズマエツチング用載置治具に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to the use of A, 6 (A
Using a photoresist film developed into a predetermined pattern using photolithography technology as a mask, the film was mulched with a parallel plate plasma erasure.
The present invention relates to a plasma etching mounting jig that can preferably mount a semiconductor substrate when etching a film into a fine pattern.
微細なムｌ膜の電極形成を行なう場合、真空中にエツチ
ングガスを導入しグロー放電により解離した活性なイオ
ン及びラジカルにて前記ム！膜の反応性イオンエツチン
グを行なう平行平板型プラズマエツチング法がしばしば
用いられる。ところがかかるプラズマエツチング法の場
合、この人β膜のエツチング時においてウェハー周辺部
のエツチング速度は中心部のエツチング速度よシ早く、
極端な場合にはウェハー周辺部のＡｌ電極配線が無くな
ることもある。かかる不都合をなくすべく各種の提案が
なされている。−例をあげると、エツチングに石英製又
は被エツチング物と同一の材質で作られたリング状の治
具を用いることが公知である。When forming an electrode with a fine mulch film, etching gas is introduced into a vacuum, and active ions and radicals dissociated by glow discharge are used to form the mulch film. Parallel plate plasma etching techniques, which involve reactive ion etching of the membrane, are often used. However, in the case of such a plasma etching method, the etching speed at the periphery of the wafer is faster than the etching speed at the center when etching the human β film.
In extreme cases, the Al electrode wiring around the wafer may disappear. Various proposals have been made to eliminate such inconveniences. - For example, it is known to use a ring-shaped jig made of quartz or the same material as the object to be etched for etching.
しかしながら、従来の石英製のリングにて種々寸法を変
化させてエツチング速度の均一性との関係を調べる実験
を行なった結果、ウェハ周辺部と中心部のエツチング速
度の均一性は約±１０％であり期待される程のものでは
なかった。又この値はリング状の治具を使用しない場合
の値とも大差はなかった。However, as a result of an experiment to investigate the relationship between the uniformity of etching speed and the uniformity of etching speed using a conventional quartz ring with various dimensions, the uniformity of etching speed between the periphery and the center of the wafer was about ±10%. It wasn't quite what I expected. Moreover, this value was not much different from the value when no ring-shaped jig was used.
本発明は、半導体基板を収納できる大きさに座ぐシを設
け、前記塵ぐシの周辺表面に反応性エッチングガスに不
活性な絶縁材を貼り付けた構造の導電体製盤状台からな
るプラズマエツチング用半導体基板載置治具を提供せん
とするもので、被加工面を有する前記半導体基板を載置
し、前記治具を平行平板型プラズマエラチャの一電極面
上に設置して均一エツチングを行なわんとするものであ
る０
以下本発明の実施例を図面を用いて説明する。The present invention comprises a plate-shaped base made of a conductive material having a structure in which a counter is provided in a size that can accommodate a semiconductor substrate, and an insulating material inert to reactive etching gas is pasted on the peripheral surface of the counter. The present invention aims to provide a semiconductor substrate mounting jig for plasma etching, in which the semiconductor substrate having a surface to be processed is mounted, and the jig is placed on one electrode surface of a parallel plate plasma etching process to ensure uniform etching. Embodiments of the present invention in which etching is not performed will now be described with reference to the drawings.
第１図は本発明の実施例に係るプラズマエツチング用半
導体基板載置治具の断面図を示す。この治具の外形形状
は円板型のステンレス板１でその直径は載置される半導
体基板２より２０〜３０ｍｎ１大きく板厚さは約Ｑ、８
ｍｍである。その中心部に半導体基板２厚さよりや＼深
い座ぐシ３を施し、座ぐり３の周辺部はポリエステルテ
ープ４を貼シ付けである。FIG. 1 shows a sectional view of a semiconductor substrate mounting jig for plasma etching according to an embodiment of the present invention. The outer shape of this jig is a disc-shaped stainless steel plate 1 whose diameter is 20 to 30 mm1 larger than the semiconductor substrate 2 on which it is placed and whose thickness is approximately Q.8.
It is mm. A counterbore 3, which is deeper than the thickness of the semiconductor substrate 2, is provided at the center, and a polyester tape 4 is pasted around the counterbore 3.
本発明に係る治具を用いて半導体基板をプラズマエツチ
ングする状態を第２図に示す。ステンレス製盤状台１か
らなる治具−ヒに所定の半導体基板２の載置し、治具本
体を平行平板型プラズマエラチャの下部電極兼試料台６
に載せ、対向の平行平板電極６との間で、反応室７内に
プラズマを生じさせて実施する。このとき、反応ガスは
流入口８よシ流出口９に至らせる。エツチング条件とし
てエッチャントに四塩化炭素を用い、ＲＦ ハヮー５ｏ
ｏｎ（電力密度０．２２シー）１発振周波数３８ｏＫＨ
ｚで実施した。FIG. 2 shows a state in which a semiconductor substrate is plasma etched using the jig according to the present invention. A predetermined semiconductor substrate 2 is placed on a jig consisting of a stainless steel disk-shaped table 1, and the jig body is attached to a lower electrode/sample table 6 of a parallel plate type plasma erature.
Plasma is generated in the reaction chamber 7 between the parallel plate electrodes 6 facing each other. At this time, the reaction gas is caused to reach the inlet 8 and the outlet 9. As etching conditions, carbon tetrachloride was used as the etchant, and RF
on (power density 0.22 sea) 1 oscillation frequency 38oKH
It was carried out with z.
本発明に係る治具を用いてプラズマエツチングした半導
体基板表面のエツチング速度を表面荒さ計を用いて測定
したエツチング深さから求めた。The etching rate of the surface of a semiconductor substrate subjected to plasma etching using the jig according to the present invention was determined from the etching depth measured using a surface roughness meter.
その結果、たとえば、３吋ウェハの場合、中心部とウェ
ハー周辺部よシ内側へ１０ｍｍ間隔で表面荒さ計でエツ
チング深さを測定したところウェハ周辺部よシ内側へ４
１１１ｍ点と更に内側へ２ｏｍｍ点でのエツチング速度
はそれぞれ１４００人／ｍｉｎ 中心部と中心部よシ
外側へ１０ｍｍ点ではそれぞれ１３００ Ａ／ｍｉｎ
であり、ウェハ内の最大変動率で約７．４％であった
。これは従来のものが約２０％であったのに比して著し
く向上しており、均一性のよい特性を得た。これは、本
治具上に置かれた半導体基板全体の温度分布及び放熱効
果がレジストに良好なる結果を与えているからと思われ
る。As a result, for example, in the case of a 3-inch wafer, the etching depth was measured with a surface roughness meter at 10 mm intervals from the center and the wafer periphery to the inside.
The etching speed at the 111 m point and the point 2 om further inward is 1400 A/min, respectively.The etching speed is 1300 A/min at the center and at the 10 mm point further outward from the center.
The maximum variation rate within a wafer was approximately 7.4%. This is a marked improvement compared to the conventional one, which was about 20%, and good uniformity of characteristics was obtained. This seems to be because the temperature distribution and heat dissipation effect of the entire semiconductor substrate placed on this jig gave good results to the resist.
又、治具材料の汚染による特性変化を本装置によりＡｌ
電極配線をした高周波トランジスタを用いて種々特性を
調べたがその特性結果は良好なる事を得、したがって、
治具からの汚染はない事を示した。In addition, the change in properties due to contamination of the jig material can be reduced by using this device.
Various characteristics were investigated using a high frequency transistor with electrode wiring, and the characteristics results were found to be good.
It was shown that there was no contamination from the jig.
以上に詳述したように、本発明によればＡ／膜厚さ１．
２μｍでＡ７Ｊ線幅１．ｏｌｌｍ のエツチングが均
一性よく得られる。As detailed above, according to the present invention, A/film thickness 1.
A7J line width 1.2 μm. ollm etching can be obtained with good uniformity.
第１図は本発明に係るプラズマエツチング用半導体基板
載置治具の構造断面図、第２図は第１図に示す治具を平
行平板型プラズマエラチャに載置した状態を示す概略断
面図である。
１・・・・・・ステンレス台座、３・・印・座ぐり、４
・・・・・・ポリエステルテープ、５・・・・・・下部
電極兼試料台、６・・・・・・対向電極、７・・・・・
・反応室、８・・・・・・反応ガス流入口、９・・・・
・・反応ガス流出口。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図FIG. 1 is a structural sectional view of a semiconductor substrate mounting jig for plasma etching according to the present invention, and FIG. 2 is a schematic sectional view showing the jig shown in FIG. 1 mounted on a parallel plate type plasma erasure. It is. 1...Stainless steel pedestal, 3...mark/spot face, 4
...Polyester tape, 5...Lower electrode/sample stand, 6...Counter electrode, 7...
・Reaction chamber, 8...Reaction gas inlet, 9...
...Reactant gas outlet. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure
Claims (1)
ぐ勺の周辺表面に反応性エツチングガスに対して不活性
な絶縁材が形成された導電体製盤状台からなることを特
徴とするプラズマエツチング用半導体基板載置治具。It is characterized by comprising a plate-shaped base made of a conductive material, which has a seat large enough to accommodate a semiconductor substrate, and has an insulating material inert to reactive etching gas formed on the peripheral surface of the dust tray. Semiconductor substrate mounting jig for plasma etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11578082A JPS596544A (en) | 1982-07-02 | 1982-07-02 | Semiconductor substrate mounting jig for plasma etching |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11578082A JPS596544A (en) | 1982-07-02 | 1982-07-02 | Semiconductor substrate mounting jig for plasma etching |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS596544A true JPS596544A (en) | 1984-01-13 |
Family
ID=14670870
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11578082A Pending JPS596544A (en) | 1982-07-02 | 1982-07-02 | Semiconductor substrate mounting jig for plasma etching |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS596544A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60198821A (en) * | 1984-03-23 | 1985-10-08 | Anelva Corp | Dry etching device |
| JPS6276725A (en) * | 1985-09-30 | 1987-04-08 | Toshiba Corp | Reactive plasma etching apparatus |
-
1982
- 1982-07-02 JP JP11578082A patent/JPS596544A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60198821A (en) * | 1984-03-23 | 1985-10-08 | Anelva Corp | Dry etching device |
| JPS6276725A (en) * | 1985-09-30 | 1987-04-08 | Toshiba Corp | Reactive plasma etching apparatus |
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