JPS5961681U - Terminal equipment for time division multiplex transmission system - Google Patents
Terminal equipment for time division multiplex transmission systemInfo
- Publication number
- JPS5961681U JPS5961681U JP15675682U JP15675682U JPS5961681U JP S5961681 U JPS5961681 U JP S5961681U JP 15675682 U JP15675682 U JP 15675682U JP 15675682 U JP15675682 U JP 15675682U JP S5961681 U JPS5961681 U JP S5961681U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- drive
- relay
- transmission system
- timer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Selective Calling Equipment (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例のブロック回路図、第２図ａ
−ｆは同上の正常時の動作タイムチャート、第３図ａ
” ｆは同上の信号が途中で停止したときの動作タイ
ムチャートである。
１・・・親機、３・・・信号受信回路、４・・・アドレ
ススイッチ、５・・・第１のＡＮＤゲート、６・・・出
力リレー、７・・・第１のタイマ、８・・・第２のＡＮ
Ｄゲート、９・・・第２のタイマ、１０・・・ワンショ
ット回路。Figure 1 is a block circuit diagram of an embodiment of the present invention, Figure 2a
-f is the normal operation time chart of the same as above, Fig. 3a
"f is an operation time chart when the same signal as above stops midway. 1... Base unit, 3... Signal receiving circuit, 4... Address switch, 5... First AND gate , 6... Output relay, 7... First timer, 8... Second AN
D gate, 9...second timer, 10...one shot circuit.
Claims (1)
ッチで設定したスイッチ入力とが一致したとき制御信号
を受取りオンドライブ信号を出力するとともに親機から
の信号の中からリレードライブ許可時間を検出してドラ
イブタイミング信号を出力する信号受信回路と、前記オ
ンドライブ信号とドライブタイミング信号とを入力し出
力リレーをオンドライブする第１のＡＮＤゲートと、前
記リレードライブ許可時間を検出してカウントしカウン
トアツプしたとき前記ドライブタイミング信号とともに
第２のＡＮＤゲートを通して出力リレーをオフドライブ
する第１のタイマと、前記リレードライブ許可時間を検
出してリセットし前記信号受信回路のクロックをカウン
トする第２のタイマと、前産第２のタイマのカウントア
ツプ信号によりトリガされ前記出力リレーをオフドライ
ブするワンショット回路とを設けて成る時分割多重伝送
システムの端末器。When the address signal of the signal transmitted from the base unit matches the switch input set by the address switch, it receives the control signal and outputs the on-drive signal, and also detects the relay drive permission time from the signal from the base unit. a signal receiving circuit for outputting a drive timing signal; a first AND gate for inputting the on-drive signal and the drive timing signal to on-drive the output relay; and a first AND gate for detecting and counting the relay drive permission time. a first timer that off-drives the output relay through a second AND gate together with the drive timing signal; a second timer that detects and resets the relay drive permission time and counts a clock of the signal receiving circuit; A terminal device for a time division multiplex transmission system, comprising a one-shot circuit that is triggered by a count-up signal of a second timer and off-drives the output relay.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15675682U JPS5961681U (en) | 1982-10-15 | 1982-10-15 | Terminal equipment for time division multiplex transmission system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15675682U JPS5961681U (en) | 1982-10-15 | 1982-10-15 | Terminal equipment for time division multiplex transmission system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5961681U true JPS5961681U (en) | 1984-04-23 |
Family
ID=30345793
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15675682U Pending JPS5961681U (en) | 1982-10-15 | 1982-10-15 | Terminal equipment for time division multiplex transmission system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5961681U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61286478A (en) * | 1985-06-12 | 1986-12-17 | アメリカン ロツカ− グル−プ インコ−ポレイテツド | Guarantee locking device |
-
1982
- 1982-10-15 JP JP15675682U patent/JPS5961681U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61286478A (en) * | 1985-06-12 | 1986-12-17 | アメリカン ロツカ− グル−プ インコ−ポレイテツド | Guarantee locking device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5961681U (en) | Terminal equipment for time division multiplex transmission system | |
| JPS58157996U (en) | lighting fixture control system | |
| JPS5967056U (en) | data transmission equipment | |
| JPS5819554U (en) | Incoming call detection circuit on telephone line | |
| JPS5928728U (en) | Input check circuit | |
| JPS6019286U (en) | Analog output terminal for remote control system | |
| JPS5958894U (en) | Fire alarm system test circuit | |
| JPS60112157U (en) | remote control system | |
| JPS58191769U (en) | Synchronous signal switching circuit | |
| JPS6077149U (en) | signal transmission system | |
| JPS58560U (en) | Television receiver power control device | |
| JPS59164382U (en) | control monitoring system | |
| JPS58132480U (en) | Time division multiplex remote control system | |
| JPS58179849U (en) | Automatic power cut-off device | |
| JPS58187885U (en) | coin timer device | |
| JPS59174773U (en) | VTR playback signal sending device | |
| JPS60111854U (en) | Combustion control circuit | |
| JPS6085490U (en) | remote control device | |
| JPS5947896U (en) | electronic clock | |
| JPS5948163U (en) | automatic telephone answering device | |
| JPS6026673U (en) | Disc playback device pause time limit device | |
| JPS5874194U (en) | alarm clock | |
| JPS59159087U (en) | Channel setting device for multi-channel remote control device | |
| JPS60144133U (en) | data input device | |
| JPS59125142U (en) | Erroneous transmission prevention circuit |