JPS5951609A - Integrated circuit device - Google Patents
Integrated circuit deviceInfo
- Publication number
- JPS5951609A JPS5951609A JP57161866A JP16186682A JPS5951609A JP S5951609 A JPS5951609 A JP S5951609A JP 57161866 A JP57161866 A JP 57161866A JP 16186682 A JP16186682 A JP 16186682A JP S5951609 A JPS5951609 A JP S5951609A
- Authority
- JP
- Japan
- Prior art keywords
- input
- switch
- turned
- integrated circuit
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/02—Details
Abstract
Description
【発明の詳細な説明】
本発明は集積回路装置に係シ、特に集積回路に抵抗及び
コンデンサを含んで内蔵されている発振回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit device, and more particularly to an oscillation circuit built into an integrated circuit including a resistor and a capacitor.
従来、集積回路装置に内蔵された発振回路の発振周波数
は、製品の設計時に内蔵した抵抗及びコンデンサによっ
てすでに決定されていて、使用者においてこの発振周波
数を変更することは困難であった。Conventionally, the oscillation frequency of an oscillation circuit built into an integrated circuit device has already been determined by built-in resistors and capacitors at the time of product design, and it has been difficult for the user to change this oscillation frequency.
第1図は、このような従来の集積回路装置内における発
振回路を示す回路図である。第1図において、シュミッ
ト回路1は、入力Aと接地との間にコンデンサ20、入
力Aと出力Bとの間に抵抗10を付加することによシ、
発振する。FIG. 1 is a circuit diagram showing an oscillation circuit within such a conventional integrated circuit device. In FIG. 1, the Schmitt circuit 1 is constructed by adding a capacitor 20 between input A and ground and a resistor 10 between input A and output B.
oscillate.
入力Aがハイレベルであると、出力Bの電位はロウレベ
ルで、コンデンサ20には電荷が蓄えられている。その
電荷が入力Aと出力Bの電位差によシ、抵抗10を通っ
て、出力Bに逃げていく。その結果人力Aの電位は下が
り、ある電位■1になると、シュミット回路1は入力A
をロウレベル入力とみなし、出力Bはノ・イレベルとな
る。そのため、電荷が出力Bよシ抵抗10を通って、コ
ンデンサ20にたくわえられるようになる。すると、人
力Aの電位は、上がυはじめ、今度は電位■2になると
、出力Bはロウレベルに反転する。入力Aの電位が電位
vlとv2の間で変動するという繰シ返しにより発振を
行なうのであるが、その発振周波数は、入力Aが電位v
lから■2、電位■2からv1になるまでの時間すなわ
ち電荷の移動時間で決まるのであり、これは抵抗値10
とコンデーサ20の容量の大きさによって決まるもので
ある。When input A is at high level, the potential at output B is at low level, and charge is stored in capacitor 20. Due to the potential difference between input A and output B, the charge passes through resistor 10 and escapes to output B. As a result, the potential of the human power A decreases, and when it reaches a certain potential ■1, the Schmitt circuit 1
is regarded as a low level input, and the output B becomes a no-y level. Therefore, the charge passes through the resistor 10 from the output B and is stored in the capacitor 20. Then, the potential of the human power A starts at υ and then reaches the potential ■2, and the output B is inverted to low level. Oscillation is performed by repeatedly changing the potential of input A between potentials vl and v2, and the oscillation frequency is as follows:
It is determined by the time from l to ■2 and from the potential ■2 to v1, that is, the charge transfer time, and this is determined by the resistance value 10
This is determined by the size of the capacitance of the capacitor 20.
以上のような従来例での発振周波数は、抵抗10とコン
デ/す20とによって固定されていて、これを変更する
には入力Ai外部に端子として引き出しておき、ここに
コンデンサを付加して容量を増やすか、入力A1 出力
Bの両方を外部端子に引き出しておき、抵抗をその間に
接続し、抵抗値を下げることによって周波数を変更する
ことが出来るが、これでは集積回路装置以外の外部回路
が大きくなり、また周波数を変えるのに外部素子を付は
替えをしたシするという欠点がある。The oscillation frequency in the conventional example described above is fixed by the resistor 10 and the capacitor 20. To change this, input Ai is pulled out as a terminal externally, and a capacitor is added here to change the capacitance. You can change the frequency by increasing the input A1 and output B, or by connecting a resistor between them and lowering the resistance value by connecting both input A1 and output B to external terminals. It has the disadvantage that it becomes larger and requires external elements to be added and replaced to change the frequency.
本発明の目的は、前記欠点を取シ除き、発振周波数を集
積回路装置の外部回路からの信号により選択可能とした
発振回路を有する集積回路装置を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above drawbacks and provide an integrated circuit device having an oscillation circuit whose oscillation frequency can be selected by a signal from an external circuit of the integrated circuit device.
本発明は、抵抗とコンデンサとを含む発振回路を内蔵し
た集積回路装置において、集積回路装置の外部回路から
の信号によシ発振周波数を変更できる機能を含んだこと
を特徴とする集積回路装置にある。The present invention relates to an integrated circuit device having a built-in oscillation circuit including a resistor and a capacitor, which includes a function of changing the oscillation frequency by a signal from an external circuit of the integrated circuit device. be.
次に本発明を図面を参照しながら詳細に説明する。Next, the present invention will be explained in detail with reference to the drawings.
第2図は本発明の一実施例の回路図である。本集積回路
装置は、シュミット回路50を備え、またアナログスイ
ッチso、siを有し、これらはゲート信号がロウレベ
ルの時スイッチオン(OFF)で、ハイレベルの時はス
イッチ(ON)となる。まず外部端子Eよジノ・イレベ
ルを印加した場合について述べる。このとき、アナログ
スイッチ80はオンで、アナログスイッチ81はオフと
なる。そのため電荷は、アナログスイッチ80を通り、
抵抗60を通りコンデ/す70に蓄えられたり、放出さ
れるということになる。次に外部端子Eにロウレベルを
印加した場合は、アナログスイッチ80はオフで、アナ
ログスイッチ81はオンとなる。FIG. 2 is a circuit diagram of one embodiment of the present invention. This integrated circuit device includes a Schmitt circuit 50 and analog switches so and si, which are turned on (OFF) when the gate signal is at a low level and turned on (ON) when the gate signal is at a high level. First, we will discuss the case where the Gino-I level is applied to the external terminal E. At this time, the analog switch 80 is on and the analog switch 81 is off. Therefore, the charge passes through the analog switch 80,
It passes through the resistor 60 and is stored in the capacitor 70 or released. Next, when a low level is applied to the external terminal E, the analog switch 80 is turned off and the analog switch 81 is turned on.
このとき電荷は、抵抗61.60を通り、コンデンサ7
0,71に蓄えられる。電荷が、出力りから入力Cに移
動するに要する時間は、外部端子Eにノ・イレベルを印
加した場合に比べ、抵抗61が増加した分だけ、余計忙
かかる。また、入力Cの電位の時間変化は、前者に比ベ
コンデンサ71が増えたので、同一量の電荷が入力Cに
流れ込んでも、容量が増加しただけ電位変化は少ない。At this time, the charge passes through the resistor 61.60 and the capacitor 7
It is stored in 0.71. The time required for the charge to move from the output to the input C is longer than that required when a noise level is applied to the external terminal E due to the increase in the resistance 61. Furthermore, since the number of capacitors 71 has been increased compared to the former case, the change in the potential of the input C over time is smaller than that of the former, so even if the same amount of charge flows into the input C, the potential change is smaller due to the increased capacitance.
以上により入力Cが電位V1から■2、電位■2から■
1と変化するまでの時間は前者に比べ多くの時間を要す
る。そのため、発振周波数は低くなる。As a result of the above, input C changes from potential V1 to ■2 and from potential ■2 to ■
It takes more time to change to 1 than the former. Therefore, the oscillation frequency becomes low.
この様に本実施例においては、集積回路装置に内蔵され
た発振回路の時定数を、集積回路装置の外部からの制御
信号によシ変化させて発振周波数を選択出来るというも
ので、l、抵抗あるいはコンデンサだけを可変にすると
か、抵抗、コンデンサ、アナログスイッチ、外部端子を
複数にして複数の発振周波数を選択するなどの応用も可
能である。In this way, in this embodiment, the oscillation frequency can be selected by changing the time constant of the oscillation circuit built into the integrated circuit device using a control signal from outside the integrated circuit device. Alternatively, it is possible to make only the capacitor variable, or to select multiple oscillation frequencies by using multiple resistors, capacitors, analog switches, and external terminals.
以上説明したように、本発明によれば、発振周波数を使
用者がその用途に応じて選択できるという絶大な効果が
得られる。As explained above, according to the present invention, a tremendous effect can be obtained in that the user can select the oscillation frequency according to the application.
第1図は従来の集積回路装置の発振回路部の一例を示す
回路図、第2図は本発明の一実施例の集積回路装置を示
す回路図である。
1.50・・・・・・シュミット回路、10,60.6
1・・・・・・抵抗、20,70,71・・・・・・コ
ンデ/す、80.81・・・アナログスイッチ、54・
・・・・・イ/ノく一タ、 A、C・・・・・・入力
、B、D・・・・・・出力、E・・・・・・外部端子。FIG. 1 is a circuit diagram showing an example of an oscillation circuit section of a conventional integrated circuit device, and FIG. 2 is a circuit diagram showing an integrated circuit device according to an embodiment of the present invention. 1.50...Schmitt circuit, 10,60.6
1... Resistance, 20, 70, 71... Condenser/su, 80.81... Analog switch, 54.
・・・・・・A/No. A, C:Input, B, D:Output, E:External terminal.
Claims (1)
よって前記発振回路の発振周波数が選択されるように構
成されていることを特許とする集積回路装置。[Claims] An oscillation circuit including a resistor and a capacitor is built-in. An integrated circuit device that is patented in that the integrated circuit device is configured such that the oscillation frequency of the oscillation circuit is selected by a control signal input from the outside.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57161866A JPS5951609A (en) | 1982-09-17 | 1982-09-17 | Integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57161866A JPS5951609A (en) | 1982-09-17 | 1982-09-17 | Integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5951609A true JPS5951609A (en) | 1984-03-26 |
Family
ID=15743445
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57161866A Pending JPS5951609A (en) | 1982-09-17 | 1982-09-17 | Integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5951609A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63313909A (en) * | 1987-06-16 | 1988-12-22 | Toshiba Corp | Cr oscillating circuit |
JP2010171685A (en) * | 2009-01-22 | 2010-08-05 | Fuji Electric Systems Co Ltd | Clock synchronization circuit |
-
1982
- 1982-09-17 JP JP57161866A patent/JPS5951609A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63313909A (en) * | 1987-06-16 | 1988-12-22 | Toshiba Corp | Cr oscillating circuit |
JP2010171685A (en) * | 2009-01-22 | 2010-08-05 | Fuji Electric Systems Co Ltd | Clock synchronization circuit |
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