JPS5949698B2 - How to seal electronic components - Google Patents

How to seal electronic components

Info

Publication number
JPS5949698B2
JPS5949698B2 JP6186280A JP6186280A JPS5949698B2 JP S5949698 B2 JPS5949698 B2 JP S5949698B2 JP 6186280 A JP6186280 A JP 6186280A JP 6186280 A JP6186280 A JP 6186280A JP S5949698 B2 JPS5949698 B2 JP S5949698B2
Authority
JP
Japan
Prior art keywords
melting point
substrate
sealing
low melting
transparent substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6186280A
Other languages
Japanese (ja)
Other versions
JPS56158458A (en
Inventor
一文 小川
武敏 米澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6186280A priority Critical patent/JPS5949698B2/en
Publication of JPS56158458A publication Critical patent/JPS56158458A/en
Publication of JPS5949698B2 publication Critical patent/JPS5949698B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【発明の詳細な説明】 本発明は電子部品の封止とくに低温封止に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to encapsulation of electronic components, particularly low temperature encapsulation.

さらに詳しくは、本発明は光学的窓を有するセラミック
パッケージ等における低温封止法に関するものである。
従来、光学的窓を有するセラミックパッケージの封止に
は、第1図に示すように、窓材の透明基板1の周縁部に
、あらかじめ低融点ガラス層2を形成しておき、セラミ
ックパッケージ3側には封入の電子部品4を組込んでお
き、前記セラミックパッケージ3と透明基板1を低融点
ガラス層2を介して位置合せし、シーリング炉等を用い
てセラミックパッケージ3と透明基板1を同時に加熱し
、前記低融点ガラス層2を溶融して透明基板1をセラミ
ックパッケージ3に接着密封する方法が用いられていた
More particularly, the present invention relates to low temperature sealing methods for ceramic packages and the like having optical windows.
Conventionally, in sealing a ceramic package having an optical window, as shown in FIG. The ceramic package 3 and the transparent substrate 1 are aligned through the low melting point glass layer 2, and the ceramic package 3 and the transparent substrate 1 are simultaneously heated using a sealing furnace or the like. However, a method has been used in which the low melting point glass layer 2 is melted and the transparent substrate 1 is adhesively sealed to the ceramic package 3.

5はパッケージの外部リードである。5 is an external lead of the package.

し力化ながらこの方法では、低融点ガラスの融点が最低
でも400℃程度と高いため、電子部品を組込んだセラ
ミックパッケージもシーリング炉で、最低450℃程度
の加熱を必要とする。従つて、高温限界が100℃程度
の電子部品(例えば、有機物質で形成されたモザイク状
のカラーフィルタを貼り合せた固体撮像板)では、10
0℃数分の加熱で、カラーフィルタの色素が劣化してし
まう。したがつて、従来の方法でかかる電子部品を封入
することは不可能である。一方、前記透明基板1の周縁
部およびセラミツクベツケージ3の周縁部を、それぞれ
あらかじめメタライズしておき、それぞれのメタライズ
の間I に低温半田等を挟み、前述と同じようにシーリ
ング炉で封止を行う方法もあるが、高温限界が100℃
程度の電子部品の場合、融点が80℃程度の低温半田を
使用せねばならず、封止後の信頼性が極端に悪くなる。
However, in this method, since the melting point of low-melting glass is as high as at least 400°C, ceramic packages incorporating electronic components also need to be heated to a minimum of about 450°C in a sealing furnace. Therefore, for electronic components with a high temperature limit of about 100°C (for example, a solid-state image pickup plate laminated with a mosaic color filter made of organic material),
Heating for several minutes at 0°C will deteriorate the pigments in the color filter. It is therefore not possible to encapsulate such electronic components using conventional methods. On the other hand, the periphery of the transparent substrate 1 and the periphery of the ceramic bed cage 3 are each preliminarily metalized, low-temperature solder or the like is sandwiched between each metallization, and sealing is performed in a sealing furnace in the same manner as described above. There is a method to do this, but the high temperature limit is 100℃.
In the case of electronic components of about 100° C., low-temperature solder with a melting point of about 80° C. must be used, and the reliability after sealing becomes extremely poor.

以上述べてきたように、従来の封止法の欠点、すなわち
、透明基板とセラミックパッケージを同時に加熱して封
止を行うことにより生じる不都合に鑑み、本発明の目的
は、セラミツクパツケージ等に組み込んだ電子部品の温
度をあまり上昇することなく、すなわち、局所的な加熱
により、セラミツクパツケージ等の基板を透明基板で形
成された窓材で封入する方法を提供することにある。
As described above, in view of the drawbacks of conventional sealing methods, that is, the inconveniences caused by heating a transparent substrate and a ceramic package at the same time, it is an object of the present invention to It is an object of the present invention to provide a method for encapsulating a substrate such as a ceramic package with a window material formed of a transparent substrate without significantly increasing the temperature of an electronic component, that is, by local heating.

以下、本発明の一実施例を第2図を用いて説明する。ま
ず、第2図aのごとく窓材となる透明基板21(例えば
コバールガラスやサファイア板)の周縁部にタングステ
ンペーストの焼付やコバール金属のろう付等で、第1の
メタライズ層22を形成し、さらに、その上に低融点物
質この場合は低融点金属層23{例えば、普通の半田(
融点180℃)}を形成しておく。一方、bのごとくセ
ラミツクパツケージ基板24側の周縁部にもコバールガ
ラス等で第2のメタライズ層25を形成しておき、電子
部品26を組み込む。
An embodiment of the present invention will be described below with reference to FIG. First, as shown in FIG. 2a, a first metallized layer 22 is formed on the periphery of a transparent substrate 21 (for example, Kovar glass or sapphire plate) that will serve as a window material by baking tungsten paste or brazing Kovar metal. Furthermore, a low melting point material, in this case a low melting point metal layer 23 (for example, ordinary solder) is applied thereon.
(melting point: 180°C)}. On the other hand, as shown in b, a second metallized layer 25 of Kovar glass or the like is also formed on the peripheral edge of the ceramic package substrate 24, and an electronic component 26 is assembled therein.

2Tは、パツケージのリードを示す。2T indicates the package lead.

その後、第2図cのごとくセラミツクパツケージ側の第
2のメタライズ層25と、透明基板21側の第1のメタ
ライズ層22を、低融点金属層nを介して密着させ、前
記基板側より一集光した光ビームA(例えば、1nφ程
度に絞つたYAGレーザ)で、第1のメタライズ層22
を一端から順次照射してゆき、局所的に昇温する。例え
ば、低融点金属層23として、融点180℃の半田を用
いる場合には、200〜250℃程度まで昇温する。こ
うして第1のメタライズ層22と第2のメタライズ層2
5を低融点金属で接着封止することができる。なお、電
子部品26としてはたとえばモザイク状のカラーフイル
タの貼り合された固体撮像板を用いる。従つて、本発明
の方法を用いることにより、光学的窓を有するセラミツ
クパツケージの封止を、内部の電子部品を傷うことなく
、高信頼で行うことができる。
Thereafter, as shown in FIG. 2c, the second metallized layer 25 on the ceramic package side and the first metallized layer 22 on the transparent substrate 21 side are brought into close contact with each other via the low melting point metal layer n, and are brought together from the substrate side. The first metallized layer 22 is irradiated with a light beam A (for example, a YAG laser focused to about 1nφ).
is irradiated sequentially from one end to raise the temperature locally. For example, when using solder with a melting point of 180°C as the low melting point metal layer 23, the temperature is raised to about 200 to 250°C. In this way, the first metallized layer 22 and the second metallized layer 2
5 can be adhesively sealed with a low melting point metal. Note that as the electronic component 26, for example, a solid-state imaging plate on which a mosaic color filter is bonded is used. Therefore, by using the method of the present invention, a ceramic package having an optical window can be sealed with high reliability without damaging the internal electronic components.

すなわち、窓材が透明基板であるため、レーザー光等に
より、この透明基板を透して直接第1のメタライズ層を
加熱でき、そして、通常透明基板もセラミツクパツケー
ジも非常に熱伝導が悪いため、内部の電子部品まで熱が
伝りにくく、局所的に高温封止が可能である。また、本
発明では光を利用して加熱する方式であるため、透明の
ガラスチヤンバー内に試料を入れて、外部より光ビーム
を照射することも可能であり、不活性ガス雰囲気中での
封止も非常に簡単に行うことができる。
That is, since the window material is a transparent substrate, the first metallized layer can be directly heated by laser light or the like through the transparent substrate, and since both the transparent substrate and the ceramic package usually have very poor thermal conductivity, Heat is not easily transmitted to internal electronic components, allowing localized high-temperature sealing. Furthermore, since the present invention uses light to heat the sample, it is also possible to place the sample in a transparent glass chamber and irradiate it with a light beam from the outside, making it possible to seal the sample in an inert gas atmosphere. It is also very easy to stop.

なお、第1のメタライズ層に非常に光反射率の良い金属
を用いる場合には、あらかじめ、メタライズ層と透明基
板の間に、光の吸収層を設けておく必要がある。
Note that when a metal with very good light reflectance is used for the first metallized layer, it is necessary to provide a light absorption layer in advance between the metallized layer and the transparent substrate.

また、第1および第2のメタライズ用の金属は少くとも
、低融点金属層23よりも融点が高い方が望ましい。さ
らにまた、本実施例では、第1のメタライズ層22上に
低融点金属層23を形成した例を示したが、この低融点
金属層23があらかじめ第1のメタライズ層22上に形
成されてなくて、第2のメタライズ層25上に形成され
ていても同じように封止することができるし、さらに箔
状にして第1)第2のメタライズ層の間に挟んで用いて
も同じであることは、言うまでもない。
Furthermore, it is desirable that the metals for the first and second metallizations have at least a higher melting point than the low melting point metal layer 23. Furthermore, although this embodiment shows an example in which the low melting point metal layer 23 is formed on the first metallized layer 22, this low melting point metal layer 23 is not formed on the first metalized layer 22 in advance. Even if it is formed on the second metallized layer 25, it can be sealed in the same way, or it can be made into a foil and sandwiched between the first and second metalized layers. That goes without saying.

なお、このとき、メタライズ表面は、金メツキ等の耐蝕
性金属で被つておき、さらに、雰囲気は、多少還元性の
ある、N2ベース5%H2等を用いた方が良い。さらに
また、試料の設置場所にガラスチヤンバ一を用いれば、
チヤンバ一の外から十分光のエネルギーを照射できるの
で非常に都合が良い。以上述べてきた実施例は半田封止
の場合、すなわち、透明基板とセラミツクパツケージに
それぞれメタライズを行つておく場合について述べたが
、低融点金属の代りに、透明基板とセラミツクパツケー
ジを接着でき光を吸収する低融点ガラスを用いる場合に
は透明基板とセラミツクパツケージにメタライズの必要
がなく、実施例と同じように局部的な光線による加熱に
より透明基板とセラミツクパツケージのガラス封止が行
なえることは明らかである。
At this time, it is better to cover the metallized surface with a corrosion-resistant metal such as gold plating, and to use a somewhat reducing atmosphere such as N2-based 5% H2. Furthermore, if a glass chamber is used as the sample installation location,
This is very convenient because sufficient light energy can be irradiated from outside the chamber. The embodiments described above have been described in the case of solder sealing, that is, the case where the transparent substrate and the ceramic package are individually metalized. It is clear that when a low-melting glass that absorbs water is used, there is no need to metalize the transparent substrate and the ceramic package, and the transparent substrate and the ceramic package can be glass-sealed by localized heating with light beams, as in the example. It is.

さらにまた、セラミツクパツケージのみが光を吸収して
も封止が行なえることも明らかである。
Furthermore, it is clear that the sealing can be achieved even if only the ceramic package absorbs light.

また、本発明はセラミツク基板以外の基板を用いた場合
にも適用することができる。以上のように、本発明は局
所的な加熱にて容易かつ確実に電子部品の封止を行うこ
とができ、信頼性の高いパツケージの製造に大きく寄与
するものである。
Furthermore, the present invention can be applied to cases where substrates other than ceramic substrates are used. As described above, the present invention allows electronic components to be easily and reliably sealed by local heating, and greatly contributes to the production of highly reliable packages.

また、集光したレーザ光で封止部に沿つて順次照射し、
極所的に封止してゆくため一括封止に比べ、ガス抜によ
るピンホールの発生が少く、均一封止ができる。
In addition, the condensed laser beam is sequentially irradiated along the sealing part,
Because the seal is localized, there are fewer pinholes caused by gas venting than when sealing is done all at once, and uniform sealing is possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の方法にて透明基板とセラミツクパツケー
ジを低融点ガラスで封止する場合の形状断面図、第2図
a−cは本発明の一実施例にかかるレーザービームを用
いた低温封止法を説明するための工程断面図である。 21・・・・・・透明基板、22・・・・・・第1のメ
タライズ層、23・・・・・・低融点金属層、24・・
・・・・セラミツクパツケージ基板、25・・・・・・
第2のメタライズ層、26・・・・・・電子部品。
Figure 1 is a cross-sectional view of the shape of a transparent substrate and a ceramic package sealed with low-melting glass using a conventional method, and Figures 2 a-c are low-temperature sealing using a laser beam according to an embodiment of the present invention. It is a process sectional view for explaining a stopping method. 21... Transparent substrate, 22... First metallized layer, 23... Low melting point metal layer, 24...
...Ceramic package substrate, 25...
Second metallized layer, 26...Electronic component.

Claims (1)

【特許請求の範囲】 1 少くとも光を透す第1の基板と他の第2の基板を、
これらの第1、第2の基板より融点が低く光を吸収し、
さらに前記第1、第2の基板と融着する低融点物質を介
して密着する工程と、前記第1の基板側より集光した光
を封止部に沿つて順次照射することにより局所的に前記
低融点物質を昇温せしめ、前記第1の基板と第2の基板
を前記低融点物質を介して接着する工程とを備えたこと
を特徴とする電子部品の封止方法。 2 低融点物質も光を透し、第2の基板が光を吸収する
ことを特徴とする特許請求の範囲第1項に記載の電子部
品の封止方法。 3 第1、第2の基板の少くとも片方に光を吸収する第
3の層をあらかじめ形成しておき、低融点物質およびこ
の第3の層を介して、前記第1および第2の基板を密着
することを特徴とする特許請求の範囲第1項に記載の電
子部品の封止方法。
[Claims] 1. At least a first substrate that transmits light and another second substrate,
It has a lower melting point than these first and second substrates and absorbs light,
Furthermore, a step of bringing the first and second substrates into close contact with each other via a low melting point substance that is fused to the first substrate, and sequentially irradiating the condensed light from the first substrate side along the sealing part to locally A method for sealing an electronic component, comprising the step of raising the temperature of the low melting point substance and bonding the first substrate and the second substrate via the low melting point substance. 2. The method for sealing an electronic component according to claim 1, wherein the low melting point substance also transmits light and the second substrate absorbs light. 3. A third layer that absorbs light is formed in advance on at least one of the first and second substrates, and the first and second substrates are bonded to each other via a low melting point substance and this third layer. A method for sealing an electronic component according to claim 1, wherein the electronic component is sealed.
JP6186280A 1980-05-09 1980-05-09 How to seal electronic components Expired JPS5949698B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6186280A JPS5949698B2 (en) 1980-05-09 1980-05-09 How to seal electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6186280A JPS5949698B2 (en) 1980-05-09 1980-05-09 How to seal electronic components

Publications (2)

Publication Number Publication Date
JPS56158458A JPS56158458A (en) 1981-12-07
JPS5949698B2 true JPS5949698B2 (en) 1984-12-04

Family

ID=13183340

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6186280A Expired JPS5949698B2 (en) 1980-05-09 1980-05-09 How to seal electronic components

Country Status (1)

Country Link
JP (1) JPS5949698B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018216722A1 (en) 2017-05-25 2018-11-29 信越化学工業株式会社 Method for analyzing degree of hydrophobicity of powder, highly hydrophobized coloring pigment, and cosmetic containing said coloring pigment

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4685200A (en) * 1982-01-18 1987-08-11 Analog Devices, Incorporated Low internal temperature technique for hermetic sealing of microelectronic enclosures
JPS58186951A (en) * 1982-04-24 1983-11-01 Toshiba Corp Packaging method for electronic part

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018216722A1 (en) 2017-05-25 2018-11-29 信越化学工業株式会社 Method for analyzing degree of hydrophobicity of powder, highly hydrophobized coloring pigment, and cosmetic containing said coloring pigment

Also Published As

Publication number Publication date
JPS56158458A (en) 1981-12-07

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