JPS594043U - output device - Google Patents
output deviceInfo
- Publication number
- JPS594043U JPS594043U JP5999683U JP5999683U JPS594043U JP S594043 U JPS594043 U JP S594043U JP 5999683 U JP5999683 U JP 5999683U JP 5999683 U JP5999683 U JP 5999683U JP S594043 U JPS594043 U JP S594043U
- Authority
- JP
- Japan
- Prior art keywords
- control
- logic
- circuit
- controlled device
- interface circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Sources (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本発明の実施例のブロック構成図、第２図、第
３図は動作波形図である。
１・・・電源、２・・・論理回路、３□、３□・・・イ
ンターフェース、４・・・駆動回路、５・・・機構部、
７・・・電源電圧検出線、８・・・比較回路、９・・・
制御信号、Ｄ□。
Ｄ２・・・ダイオード、Ｒ１ｒ□、ｒ２・・・抵抗。FIG. 1 is a block diagram of an embodiment of the present invention, and FIGS. 2 and 3 are operational waveform diagrams. DESCRIPTION OF SYMBOLS 1... Power supply, 2... Logic circuit, 3□, 3□... Interface, 4... Drive circuit, 5... Mechanism part,
7...Power supply voltage detection line, 8...Comparison circuit, 9...
Control signal, D□. D2...Diode, R1r□, r2...Resistance.
Claims (1)
ターフェース回路を有する制御装置と、該インターフェ
ース回路を介して信号を受授することにより該制御装置
に接続支配されるインターフェース回路と論理回路と、
駆動回路と、これらの電源を有する被制御装置間の連動
接続制御においてζ゛上記制御装置側に制御側論理回路
の電源電圧を直接に被制御装置に送出する信号線を設け
るとともに、被制御装置側に、該電圧を監視する電位検
出手段と論理制御回路の論理入力に対する割込み手段を
有し、該電圧が異常の時被制御装置側のインターフェー
ス回路の受信入力を無効にして被制御装置の動作を抑止
するようにしたことを特徴とする出力装置。A control device having a logic power supply on the control side, a logic circuit on the control side, an interface circuit on the control side, and an interface circuit and logic circuit that are connected and controlled by the control device by receiving and receiving signals via the interface circuit. and,
In interlocking connection control between a drive circuit and a controlled device having these power supplies, a signal line is provided on the control device side to directly send the power supply voltage of the control side logic circuit to the controlled device, and the controlled device The side has potential detection means for monitoring the voltage and interrupt means for the logic input of the logic control circuit, and when the voltage is abnormal, the receiving input of the interface circuit on the controlled device side is disabled and the controlled device operates. An output device characterized in that it suppresses.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5999683U JPS594043U (en) | 1983-04-21 | 1983-04-21 | output device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5999683U JPS594043U (en) | 1983-04-21 | 1983-04-21 | output device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS594043U true JPS594043U (en) | 1984-01-11 |
Family
ID=30190241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5999683U Pending JPS594043U (en) | 1983-04-21 | 1983-04-21 | output device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS594043U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61170520A (en) * | 1985-01-25 | 1986-08-01 | Kobe Steel Ltd | Slow cooling installation |
-
1983
- 1983-04-21 JP JP5999683U patent/JPS594043U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61170520A (en) * | 1985-01-25 | 1986-08-01 | Kobe Steel Ltd | Slow cooling installation |
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