JPS5939932B2 - Complementary characteristic switching circuit - Google Patents
Complementary characteristic switching circuitInfo
- Publication number
- JPS5939932B2 JPS5939932B2 JP11873579A JP11873579A JPS5939932B2 JP S5939932 B2 JPS5939932 B2 JP S5939932B2 JP 11873579 A JP11873579 A JP 11873579A JP 11873579 A JP11873579 A JP 11873579A JP S5939932 B2 JPS5939932 B2 JP S5939932B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- operational amplifier
- signal
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G7/00—Volume compression or expansion in amplifiers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/62—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/62—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio
- H04B1/64—Volume compression or expansion arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Electronic Switches (AREA)
- Noise Elimination (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】
この発明は、互に相補特性をなす２つの信号を得るため
の切換回路に関するものであり、その目的とするところ
は、完全な相補特性を得ることができ、切換タイミング
の制約がなく、さらに、切換ノイズを低減することので
きる改善された相補特性切換回路を提供することにある
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching circuit for obtaining two signals having mutually complementary characteristics.The purpose of this invention is to obtain completely complementary characteristics and to control the switching timing. An object of the present invention is to provide an improved complementary characteristic switching circuit which is free from the above limitations and can further reduce switching noise.
従来、雑音低減装置を含むコンパンダーシステムにおい
ては、伝送系の前半で信号を圧縮（エンコード）し、後
半で伸張（デコード）することによつて伝送系中に発生
する雑音を低減したり、あるいはダイナミックレンジの
実効的な拡大を計ることなどが行われてきた。Conventionally, in a compander system that includes a noise reduction device, the noise generated in the transmission system is reduced by compressing (encoding) the signal in the first half of the transmission system and decompressing (decoding) the signal in the second half. Efforts have been made to effectively expand the dynamic range.
ただし、これらの場合には、伝送系としては信号を原信
号に復す必要があり、互に相補特性をなす２つの信号を
得る回路が不可欠で、従来より同一回路中の負帰還路を
切換えることによつてかゝる信号を取り出しており、第
１図に従来の相補特性切換回路の原理図を示す。However, in these cases, it is necessary for the transmission system to restore the signal to the original signal, and a circuit that obtains two signals with mutually complementary characteristics is essential. In particular, such signals are extracted, and FIG. 1 shows a principle diagram of a conventional complementary characteristic switching circuit.
この第１図の回路において、１は信号入力端子、２と３
は信号出力端子で、４は広帯域に互つて大きな利得をも
つ演算増幅器、５はＦなる伝達特性を有する伝達特性決
定回路、６はスイッチ回路で、１回路２接点の切換スイ
ッチで代表される。In the circuit shown in Fig. 1, 1 is a signal input terminal, 2 and 3
4 is a signal output terminal, 4 is an operational amplifier having a large gain over a wide band, 5 is a transfer characteristic determining circuit having a transfer characteristic of F, and 6 is a switch circuit, which is represented by a changeover switch having two contacts in one circuit.
上記スイッチ回路６は、演算増幅器４の負帰還路を伝達
特性決定回路５の入力側から取るか出力側から取るかの
選択作用を行い、スイッチ回路６の端子ｃが端子ａ側に
切換えられている場合には、演算増幅器４には１００％
負帰還がかかるのでその利得は１となり、後続の伝達特
性決定回路５によつて出力端子２より特性Ｆをもつ出力
信号が得られる。次に、スイッチ回路６が端子を側に切
換えられた場合には、伝達特性決定回路５が演算増幅器
４の負帰還路に入るために、出力端子３より得られる出
力信号の特性はＡｏ、１
Ｉ＋ Ａｏ−ＦＦ
で表わされる。The switch circuit 6 selects whether the negative feedback path of the operational amplifier 4 is taken from the input side or the output side of the transfer characteristic determining circuit 5, and the terminal c of the switch circuit 6 is switched to the terminal a side. , the operational amplifier 4 has 100%
Since negative feedback is applied, the gain is 1, and an output signal having characteristic F is obtained from the output terminal 2 by the subsequent transfer characteristic determining circuit 5. Next, when the switch circuit 6 is switched to the terminal side, the transfer characteristic determining circuit 5 enters the negative feedback path of the operational amplifier 4, so that the characteristic of the output signal obtained from the output terminal 3 is Ao, 1 It is expressed as I+Ao-FF.
ただし、Ａｏは演算増幅器４の裸の利得であり、Ａｏは
１に比べて極めて大きいので、上式は−とほぼ等しくな
る。However, Ao is the bare gain of the operational amplifier 4, and since Ao is extremely large compared to 1, the above equation becomes approximately equal to -.
以上のように、出力端子２より得られる出力信・ 号と
出力端子３より得られる出力信号は互に相補特性をなし
、出力端子２の出力信号を入力信号として出力端子３よ
り得られる出力信号はとなり、伝送系としては信号が原
信号に復したことになる。As described above, the output signal obtained from output terminal 2 and the output signal obtained from output terminal 3 have complementary characteristics, and the output signal obtained from output terminal 3 using the output signal of output terminal 2 as an input signal. This means that the signal has returned to the original signal in the transmission system.
なお、伝達特性決定回路５は、所定の周波数特性を有す
るフイルタ一回路、あるいは入力レベルによつて周波数
特性が変化するもの、あるいは単にレベルのみが圧縮・
伸張されるものなどが用いられ、これらの特性によつて
伝送系中やテープなどの媒体に発生する雑音を低減した
り、あるいはリニアリティーが損われることを補正した
りする作用が行われる。The transfer characteristic determining circuit 5 may be a filter circuit having a predetermined frequency characteristic, a circuit whose frequency characteristic changes depending on the input level, or a circuit whose frequency characteristic changes depending on the input level, or a circuit in which only the level is compressed.
Those that can be expanded are used, and these characteristics reduce noise generated in the transmission system or on media such as tape, or correct loss of linearity.
ところで、従来の相補特性切換回路にはスイツチ回路６
に問題があり、その切換タイミングはシヨーテイング型
でもノンシヨーテイング型でも具合が悪く、例えばシヨ
ーテイング型の場合には演算増幅器４と伝達特性決定回
路５とが一時的に短絡されて入力信号がそのま〜出力さ
れ、また、ノンシヨーテイング型の場合には演算増幅器
４の負帰還路が一時的ｉこ断たれることによつてレベル
の極めて高い信号が出力されるので、スイツチ回路６は
瞬時的に切換えねばならなかつた。By the way, the conventional complementary characteristic switching circuit includes a switch circuit 6.
There is a problem with this, and the switching timing is not suitable for both shooting and non-shooting types. For example, in the shooting type, the operational amplifier 4 and the transfer characteristic determining circuit 5 are temporarily short-circuited, and the input signal remains as it is. In addition, in the case of the non-shooting type, the negative feedback path of the operational amplifier 4 is temporarily cut off, and an extremely high level signal is output. I had to switch to
第２図は従来の半導体スイツチ回路の一例で、２個のト
ランジスタを用いた半導体スイツチ回路７とスイツチ駆
動回路８よりなるが、半導体スイツチ回路７を端子ａ側
から端子ｂ側に瞬時的に切換えるために、スイツチ駆動
回路８は点線で図示したような何れか一方のみが閉とな
る２個の開閉スイツチで代表される特殊な回路を必要と
し、瞬時的なスイツチ切換を行うことによつて信号中に
ノイズを発生し易いという欠点があつた。FIG. 2 shows an example of a conventional semiconductor switch circuit, which consists of a semiconductor switch circuit 7 using two transistors and a switch drive circuit 8. The semiconductor switch circuit 7 is instantaneously switched from the terminal a side to the terminal b side. Therefore, the switch drive circuit 8 requires a special circuit represented by two open/close switches, one of which is closed, as shown by the dotted line, and the switch drive circuit 8 requires a special circuit represented by two open/close switches, one of which is closed, as shown by the dotted line. The drawback was that it was easy to generate noise.
この発明は、上記の欠点を改善したもので、第３図はこ
の発明：こなる相補特性切換回路の原理図で、従来回路
と同様な作用を行う部分には同一符号を附してある。This invention has improved the above-mentioned drawbacks, and FIG. 3 is a principle diagram of the complementary characteristic switching circuit according to the invention, in which the same reference numerals are given to parts that perform the same functions as those of the conventional circuit.
この第３図において、９はスイツチ回路で、このスイツ
チ回路９は開閉スイツチであれば機械的スイツチでも半
導体スイツチでもよい。In FIG. 3, 9 is a switch circuit, and the switch circuit 9 may be a mechanical switch or a semiconductor switch as long as it is an open/close switch.
先ず、スイツチ回路９が閉の場合には演算増幅器４には
１００（！）負帰還がか＼り、出力端子２より特性Ｆを
もつ第１の出力信号が得られる。First, when the switch circuit 9 is closed, a negative feedback of 100 (!) is applied to the operational amplifier 4, and a first output signal having a characteristic F is obtained from the output terminal 2.
抵抗１０はスイツチ回路９によつて伝達特性決定回路５
が短絡されないようにするためのもので、ある程度抵抗
値の大きなものを用いている。次に、スイツチ回路９が
開の場合には、伝達特性決定回路５は抵抗１０を介して
演算増幅器４の負帰還路に入るために、出力端子３より
得られる第２の出力信号の特性はとなり、第１の出力信
号に対して相補特性となる。The resistor 10 is connected to the transfer characteristic determining circuit 5 by a switch circuit 9.
This is to prevent short-circuiting, and a material with a relatively large resistance value is used. Next, when the switch circuit 9 is open, the transfer characteristic determining circuit 5 enters the negative feedback path of the operational amplifier 4 via the resistor 10, so that the characteristic of the second output signal obtained from the output terminal 3 is Therefore, the characteristic is complementary to the first output signal.
この場合に抵抗１０は負帰還路に直列に人ることになる
が、演算増幅器４の反転入力端子の入力インピーダンス
が極めて高いために特性上の影響は無視し得る。ただし
、抵抗１０は伝達特性決定回路５の負荷抵抗にもなるの
で、これによつて伝達特性Ｆが変化しないように、後述
するバツフア一回路を設けてその出力インピーダンスを
下げてもよい。In this case, the resistor 10 is placed in series with the negative feedback path, but since the input impedance of the inverting input terminal of the operational amplifier 4 is extremely high, the effect on the characteristics can be ignored. However, since the resistor 10 also serves as a load resistance for the transfer characteristic determining circuit 5, a buffer circuit, which will be described later, may be provided to lower the output impedance so that the transfer characteristic F does not change due to this.
なお、スイツチ回路９は単なる開閉スイツチであるから
、従来回路のような切換タイミングに関する問題は皆無
で、また、瞬時的にスイツチ切換を行う必要もない。第
４図はこの発明になる相補特性切換回路の第１の実施例
の回路図で、演算増幅器４、伝達特性決定回路５の他に
半導体スイツチ回路１１とバツフア一回路１２と抵抗１
０を備え、また、スイツチ回路１１を駆動するための定
電流回路１３と駆動スイツチ１４が用いられている。Since the switch circuit 9 is simply an open/close switch, there is no problem with switching timing as in conventional circuits, and there is no need for instantaneous switching. FIG. 4 is a circuit diagram of a first embodiment of the complementary characteristic switching circuit according to the present invention, in which, in addition to an operational amplifier 4 and a transfer characteristic determining circuit 5, a semiconductor switch circuit 11, a buffer circuit 12, and a resistor 1 are shown.
0, and a constant current circuit 13 and a drive switch 14 for driving the switch circuit 11 are used.
半導体スイツチ回路１１を用いるとスイツチ閉の場合に
トランジスタのベース・エミツタ間に直流電位ロスを生
ずるが、この電位はバツフア一回路１２に含まれるトラ
ンジスタのベース・エミツタ間の電位ロスと等しいので
、直流電位差によるスイツチ開閉ノイズは発生しない。When the semiconductor switch circuit 11 is used, a DC potential loss occurs between the base and emitter of the transistor when the switch is closed, but this potential is equal to the potential loss between the base and emitter of the transistor included in the buffer circuit 12, so the DC potential loss occurs between the base and emitter of the transistor included in the buffer circuit 12. Switch opening/closing noise due to potential difference does not occur.
すなわち、第４図の回路は第３図の原理回路のスイツチ
回路を半導体化し、さらに、抵抗１０による伝達特性Ｆ
に対する影響を皆無にするためにバツフア一回路１２を
附加したもので、出力端子２あるいは出力端子３より互
に相補関係をなす第１と第２の出力信号を取り出す点に
変りはない。In other words, the circuit of FIG. 4 has the switch circuit of the principle circuit of FIG.
A buffer circuit 12 is added in order to completely eliminate any influence on the output signal, but there is no difference in that the first and second output signals, which are complementary to each other, are taken out from the output terminal 2 or the output terminal 3.
第５図はこの発明になる相補特性切換回路の第２の実施
例の回路図で、直流電位ロスを発生しない半導体スイツ
チ回路１５およびバツフア一回路１６を用いたものであ
る。上記の半導体スイツチ回路１５とバツフア一回路１
６は、それぞれの回路中のトランジスタのベース・エミ
ツタ間の直流電位ロスをこれと等価なダイオードの順方
向電圧によつて打ち消したもので、か＼る手段はＩＣ内
部のバツフア一回路に多く用いられるものである。FIG. 5 is a circuit diagram of a second embodiment of the complementary characteristic switching circuit according to the present invention, which uses a semiconductor switch circuit 15 and a buffer circuit 16 that do not cause DC potential loss. The above semiconductor switch circuit 15 and buffer circuit 1
In 6, the DC potential loss between the base and emitter of the transistor in each circuit is canceled by the equivalent forward voltage of the diode, and this method is often used in buffer circuits inside ICs. It is something that can be done.
また、この回路では定電流路１３と駆動スイツチ１４に
よつて半導体スイツチ回路１５を開閉するに際して、半
導体スイツチに流れる直流電流を徐々に増加したり減少
させたりするための遅延回路１７を備え、いわゆるソフ
ト切換を行うことによつて、信号切換時のノイズをさら
に低減することができる。This circuit also includes a delay circuit 17 for gradually increasing or decreasing the direct current flowing through the semiconductor switch when the semiconductor switch circuit 15 is opened or closed by the constant current path 13 and the drive switch 14. By performing soft switching, noise at the time of signal switching can be further reduced.
この発明は、所期の目的のために、伝送系において信号
の周波数特性の変更や、レベルの圧縮・伸張などを行う
場合に、上述のようなこの発明になる相補特性切換回路
を用いることによつて、信号を完全に原信号に復するた
めに不可欠な相補特性が簡単に、かつ、理想的に得られ
る。The present invention uses the complementary characteristic switching circuit of the present invention as described above when changing the frequency characteristics of a signal, compressing/expanding the level, etc. in a transmission system for the intended purpose. Therefore, the complementary characteristics essential for completely restoring the signal to the original signal can be easily and ideally obtained.
また、スイツチ回路が簡略化され、しかも、スイツチ切
換タイミングに無関係になり、さらに、ソフト切換えに
よつて切換ノイズを低減することができるなどの幾多の
利点を有する。In addition, the switch circuit is simplified, the switching timing is independent, and switching noise can be reduced by soft switching, among other advantages.
第１図は従来の相補特性切換回路の原理図、第２図は従
来の半導体スイツチ回路の回路図、第３図はこの発明に
なる相補特性切換回路の原理図（第４図はこの発明の第
１の実施例の回路図、第５図はこの発明の第２の実施例
の回路図である。
１・・・・・・入力端子、２，３・・・・・・出力端子
、４・・・・・・演算増幅器、５・・・・・・伝達特性
決定回路、９・・・・・・スイツチ回路、１０・・・・
・・抵抗、１１・・・・・・半導体スイツチ回路、１２
・・・・・・バツフア一回路、１３・・・・・・定電流
回路、１４・・・・・・駆動スイツチ、１５・・・・・
・半導体スイツチ回路、１６・・・・・・バツフア一回
路、１７・・・・・・遅延回路。Figure 1 is a principle diagram of a conventional complementary characteristic switching circuit, Figure 2 is a circuit diagram of a conventional semiconductor switch circuit, Figure 3 is a principle diagram of a complementary characteristic switching circuit of the present invention (Figure 4 is a diagram of the principle of a complementary characteristic switching circuit of the present invention). The circuit diagram of the first embodiment, and FIG. 5 is the circuit diagram of the second embodiment of the present invention. 1... Input terminal, 2, 3... Output terminal, 4 ...Operation amplifier, 5...Transfer characteristic determining circuit, 9...Switch circuit, 10...
...Resistance, 11...Semiconductor switch circuit, 12
...Buffer circuit, 13... Constant current circuit, 14... Drive switch, 15...
- Semiconductor switch circuit, 16... buffer circuit, 17... delay circuit.
Claims (1)
、この伝達特性決定回路の出力端子と演算増幅器の反転
入力端子の間に抵抗を接続し、また、演算増幅器の出力
端子と反転入力端子の間に開閉手段を設け、この演算増
幅器の正入力端子より入力信号を印加して、上記開閉手
段が閉の場合には上記伝達特性決定回路の出力端子ある
いはこれにつながるバッファー回路より第１の出力信号
を取り出し、上記開閉手段が開の場合には上記演算増幅
器の出力端子より第２の出力信号を取り出すことによつ
て、上記第１の出力信号と第２の出力信号が互に相補特
性をなすように構成したことを特徴とする相補特性切換
回路。1. A transfer characteristic determining circuit is connected to the output terminal of the operational amplifier, a resistor is connected between the output terminal of the transfer characteristic determining circuit and the inverting input terminal of the operational amplifier, and a resistor is connected between the output terminal of the operational amplifier and the inverting input terminal. A switching means is provided in between, and an input signal is applied from the positive input terminal of the operational amplifier, and when the switching means is closed, the first output is output from the output terminal of the transfer characteristic determining circuit or the buffer circuit connected thereto. By taking out the signal and taking out the second output signal from the output terminal of the operational amplifier when the switching means is open, the first output signal and the second output signal have mutually complementary characteristics. A complementary characteristic switching circuit characterized in that it is configured as follows.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11873579A JPS5939932B2 (en) | 1979-09-18 | 1979-09-18 | Complementary characteristic switching circuit |
| DE19803034077 DE3034077C2 (en) | 1979-09-18 | 1980-09-10 | Circuit arrangement for optionally impressing a predetermined transmission characteristic on an incoming signal |
| GB8029691A GB2059227B (en) | 1979-09-18 | 1980-09-15 | Complementary characteristics switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11873579A JPS5939932B2 (en) | 1979-09-18 | 1979-09-18 | Complementary characteristic switching circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5643833A JPS5643833A (en) | 1981-04-22 |
| JPS5939932B2 true JPS5939932B2 (en) | 1984-09-27 |
Family
ID=14743768
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11873579A Expired JPS5939932B2 (en) | 1979-09-18 | 1979-09-18 | Complementary characteristic switching circuit |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS5939932B2 (en) |
| DE (1) | DE3034077C2 (en) |
| GB (1) | GB2059227B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60172831A (en) * | 1984-02-13 | 1985-09-06 | Nippon Telegr & Teleph Corp <Ntt> | Syllabic compander |
| US5121080A (en) * | 1990-12-21 | 1992-06-09 | Crystal Semiconductor Corporation | Amplifier with controlled output impedance |
| US5585763A (en) * | 1995-03-30 | 1996-12-17 | Crystal Semiconductor Corporation | Controlled impedance amplifier |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2744249B2 (en) * | 1977-10-01 | 1980-01-31 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Circuit arrangement for optional dynamic compression or expansion |
-
1979
- 1979-09-18 JP JP11873579A patent/JPS5939932B2/en not_active Expired
-
1980
- 1980-09-10 DE DE19803034077 patent/DE3034077C2/en not_active Expired
- 1980-09-15 GB GB8029691A patent/GB2059227B/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| GB2059227B (en) | 1983-12-14 |
| DE3034077C2 (en) | 1983-05-05 |
| DE3034077A1 (en) | 1981-03-19 |
| GB2059227A (en) | 1981-04-15 |
| JPS5643833A (en) | 1981-04-22 |
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