JPS593952A - Formation of aluminum wiring layer - Google Patents
Formation of aluminum wiring layerInfo
- Publication number
- JPS593952A JPS593952A JP11151882A JP11151882A JPS593952A JP S593952 A JPS593952 A JP S593952A JP 11151882 A JP11151882 A JP 11151882A JP 11151882 A JP11151882 A JP 11151882A JP S593952 A JPS593952 A JP S593952A
- Authority
- JP
- Japan
- Prior art keywords
- aluminum
- semiconductor substrate
- ultrafine
- aluminum film
- ultrafine grains
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
（ＩＩ 発明の技術分野
本発明は半導体装置の製造におけるアルミニウム配線層
の形成方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (II) Technical Field of the Invention The present invention relates to a method for forming an aluminum wiring layer in the manufacture of semiconductor devices.
（２）従来技術と問題点
ＩＣ，ＬＳＩ等の半導体装置の相互配線は一般にアルミ
ニウム（ＡＬ）でもって半導体装置製造工程での最終工
程に近いところで形成されている。(2) Prior Art and Problems Interconnections in semiconductor devices such as ICs and LSIs are generally formed of aluminum (AL) near the final step in the semiconductor device manufacturing process.
この配線形成がアルミニウムの真空蒸着又はスパッタに
よって行なわれるわけであるが、半導体基板の表面は様
々な工程をへていくごとに凹凸の段差が形成されている
ので、その段差部分にてアルミニウムの蒸着膜又はスパ
ッタ膜が薄くなったシ段切れを庄じζい、その結果とし
て、相互配線の断線が生じることもあシ、歩留ｐ低下の
原因となっている。This wiring formation is performed by vacuum evaporation or sputtering of aluminum, but since uneven steps are formed on the surface of the semiconductor substrate as it goes through various processes, aluminum evaporation is performed on the stepped portions. When the film or sputtered film becomes thinner, breakage is removed, and as a result, interconnections may be disconnected, which is a cause of a decrease in yield.
（３）発明の目的
本発明の目的は、半導体基板表面の凹凸段差部にて段切
れの生じないアルミニウム膜を形成する方法を提案し、
段差に起因する配線の断線を防止することである。(3) Purpose of the Invention The purpose of the present invention is to propose a method for forming an aluminum film that does not cause breakage at uneven step portions on the surface of a semiconductor substrate;
The purpose is to prevent wiring breakage due to differences in level.
（４）発明の構成
上述の目的が、アルミニウムの超微粒子を低圧の不活性
雰囲気中で生成し、この雰囲気中で水平方向に振動させ
た段差表面を有する半導体基板上に堆積し、次に１００
ないし４００℃の＠度への加熱によって堆積した超微粒
子を溶融し冷却してアルミニウム膜を形成することから
なるアルミニウム配線層の形成方法を提供することによ
って達成される。(4) Structure of the Invention The above-mentioned object is to produce ultrafine aluminum particles in a low-pressure inert atmosphere, deposit them on a semiconductor substrate having a stepped surface that is vibrated horizontally in this atmosphere, and then
This is achieved by providing a method for forming an aluminum wiring layer, which comprises heating the deposited ultrafine particles to 400° C. to 400° C. to melt and cool the deposited ultrafine particles to form an aluminum film.
アノシミニウムの超微粒子はガス蒸発法によって粒径Ｉ
ＯないしＪＵＵｎｍのものが不活性ガスの圧力（１ない
し５０ ’ｌ’ｏｒｒ ）下で得られる（例えば、斉藤
弥へ：技術ノート（超微粒子の製法）金属微粒子、応用
物理、第５０巻、第２号（１９８３）、ｐｐ、 Ｉ ４
９−１５０参照）。Ultrafine particles of anosiminium are produced with particle size I by gas evaporation method.
O to JUUnm can be obtained under the pressure of inert gas (1 to 50'l'orr) (for example, to Ya Saito: Technical Note (Production of Ultrafine Particles) Fine Metal Particles, Applied Physics, Vol. 50, No. No. 2 (1983), pp, I 4
9-150).
（５） 発明の実施態様 以下０本発明の笑施態様例を図面を参照して説明する。(5) Embodiments of the invention Embodiments of the present invention will be described below with reference to the drawings.
アルミニウム膜を形成すべき半導体基板を搭載する振動
支持台を公知の超微粒子製造装置に組込んでアルミニウ
ム膜形成装置（図示せず）とする。A vibration support stand on which a semiconductor substrate on which an aluminum film is to be formed is mounted is incorporated into a known ultrafine particle manufacturing apparatus to form an aluminum film forming apparatus (not shown).
アルミニウムの超微粒子を生成するために、蒸発室を１
０”−’Ｔｏｒｒ’Ｅで威圧し、不活性ガス（Ｈｅ、Ａ
ｒ又はＸｅ）を１ないし５０ Ｔｏｒｒの圧力まで導入
し、そして、高純度のアルミニウム＃（ソース）全加熱
して粒径が１０ないしｌ Ｕ Ｏｎｍの超微粒子を生成
する。この超微粒子１を振動支持台２（第１図）に搭載
した半導体基板３上に堆積させるわけて必るが、その際
Ｖこ振動支持台２を０．１〜Ｉ ＫＨ２の振動数で、０
．１和り、下の振動幅にて水平方向に振動させて半導体
基板３上の四部４内に超微粒子を集めるようにする。こ
の凹部４は、例えば、半導体基＆３のＳｉＯ□などの絶
縁−５に設けられたコンタクトホールであって、シリコ
ンウェハ６又は配線層（図示せず）が凹所４の底となっ
ている。In order to produce ultrafine particles of aluminum, the evaporation chamber was
0"-'Torr'E to intimidate, inert gas (He, A
r or Xe) is introduced to a pressure of 1 to 50 Torr, and the high purity aluminum # (source) is fully heated to produce ultrafine particles with a particle size of 10 to 1 U Onm. It is necessary to deposit the ultrafine particles 1 on the semiconductor substrate 3 mounted on the vibration support stand 2 (FIG. 1). 0
．． 1 and vibrate in the horizontal direction at a lower vibration width to collect the ultrafine particles within the four parts 4 on the semiconductor substrate 3. This recess 4 is, for example, a contact hole provided in an insulator 5 such as SiO□ of a semiconductor substrate &3, and a silicon wafer 6 or a wiring layer (not shown) serves as the bottom of the recess 4.
なお、振動支持台２はｔ【磁石を利用するなどの公知の
振動子Ｌｉによって振動させることができる。Note that the vibration support table 2 can be vibrated by a known vibrator Li, such as one using a magnet.
アルミニウム超微粒子の堆積を上述した振動を与えなが
ら１続してほぼ平坦な所定厚さの超微粒子層７（第２図
１）を凹凸表面の半導体基板３上に形成する。The ultrafine particles of aluminum are deposited one after another while applying the above-described vibration, and a substantially flat ultrafine particle layer 7 (FIG. 2, FIG. 1) having a predetermined thickness is formed on the semiconductor substrate 3 having an uneven surface.
次に、超微粒子層を溶融してアルミニウム膜８（第３図
）とするために１００ないし４００℃の温度への加熱処
理を行なう。この加熱処理は例えば振動支持台にニクロ
ム線などの電熱線を配置して抵抗加熱によりおこなう。Next, heat treatment is performed to a temperature of 100 to 400° C. in order to melt the ultrafine particle layer to form an aluminum film 8 (FIG. 3). This heat treatment is carried out by resistance heating, for example, by placing a heating wire such as a nichrome wire on a vibrating support.
加熱処理後冷却してから半導体基板３をアルミニウム膜
形成装置から取出す。金属超微粒子はその材料の融点と
比べて極めて低温にて溶融する特色がある（例えば寺倉
清之二表面融解、日本物理学会誌、Ｉ！３７巻、第２号
（１９８２）、１）Ｉ）、 １４８参照）、アルミニウ
ム配線をオミソクコンタクトとするために４００℃相度
の温度にてアニールすることが望ましい。After cooling after the heat treatment, the semiconductor substrate 3 is taken out from the aluminum film forming apparatus. Ultrafine metal particles have the characteristic of melting at an extremely low temperature compared to the melting point of the material (for example, Kiyoji Terakura, Surface Melting, Journal of the Physical Society of Japan, Vol. I! 37, No. 2 (1982), 1) I) , 148), it is desirable to anneal the aluminum wiring at a temperature of about 400° C. in order to form an ohmic contact.
超微粒子を溶融状態にしてそのまま４００’Ｃまで加熱
するとアルミニウムとシリコン基＆ノシリコンとの合金
化が進むので、なるべく低い温度にて溶融化・しそして
冷却凝固したアルミニウム膜をアニールすることが望ま
しい。If ultrafine particles are molten and heated to 400'C as they are, alloying of aluminum and silicon groups and silicon will proceed, so it is desirable to melt the particles at the lowest possible temperature and then anneal the solidified aluminum film by cooling. .
上述した超微粒子の堆積および加熱処理は、アルミニウ
ムの酸化を防止するために、超微粒子生成時の低圧不活
性ガス雰囲気中にそ行なう。The above-described deposition of ultrafine particles and heat treatment are carried out in a low-pressure inert gas atmosphere during generation of ultrafine particles in order to prevent oxidation of aluminum.
このように形成したアルミニウム膜を従来と同様にホト
エツチングして所足の配線パターンを形成する。The aluminum film thus formed is photo-etched in a conventional manner to form the required wiring pattern.
（６）発明の詳細
な説明したように、本発明に係る方法によって形成され
たアルミニウム膜は第３図に示すように段差部にて薄く
なったシ段切れが生じることはないので、配線の断線は
生じない。したがって、相互配線の歩留りが向上して製
品歩留りが良くなる。(6) As described in detail of the invention, the aluminum film formed by the method of the present invention becomes thinner at the stepped portions as shown in FIG. No disconnection occurs. Therefore, the yield of interconnections is improved and the product yield is improved.
第１図は、振動している半導体基板上へのアルミニウム
超微粒子の堆積を示す概略断面図であり、第２図は、堆
積し九アルミニウムの超微粒子層を示す概略断面図であ
り、
第３図は１本発明の方法によって形成したアルミニウム
膜を示す概略断面図である。
１・・・・・・アルミニウムの超微粒子、２・・・・・
・振動支持台、３・・・・・・半導体基板、４・・・・
・・凹部、７・・・・・・超微粒子層、８・・・・・・
アルミニウム膜。
特杵出願人
富士通株式会社
叫・許出願代理人
弁理士 青 木 朗
弁理士 西 舘 和 之
弁理士 内 １）幸 男
弁理士 山 口 昭 之1 is a schematic cross-sectional view showing the deposition of ultrafine aluminum particles on a vibrating semiconductor substrate; FIG. 2 is a schematic cross-sectional view showing a layer of ultrafine aluminum particles deposited; FIG. 1 is a schematic cross-sectional view showing an aluminum film formed by the method of the present invention. 1... Ultrafine particles of aluminum, 2...
・Vibration support stand, 3... Semiconductor substrate, 4...
... Concavity, 7... Ultrafine particle layer, 8...
Aluminum membrane. Special Pestle Applicant: Fujitsu Limited, Patent Attorney: Akira Aoki, Patent Attorney, Kazuyuki Nishidate, Patent Attorney: 1) Yukio, Patent Attorney: Akiyuki Yamaguchi
Claims (1)
生成し、との雰囲気中で水平方向に振動させた段差表面
を有する半導体基板上に堆積し、次に１００ないし４０
０℃の温度への加熱によって堆積した超微粒子を溶融し
冷却してアルミニウム膜を前記半導体基板上に形成する
ことからなるアルミニウム配線層の形成方法。1. Ultrafine particles of aluminum are generated in a low-pressure inert atmosphere and deposited on a semiconductor substrate with a stepped surface that is horizontally vibrated in an atmosphere of
A method for forming an aluminum wiring layer, which comprises heating to a temperature of 0° C. to melt deposited ultrafine particles and cooling to form an aluminum film on the semiconductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11151882A JPS593952A (en) | 1982-06-30 | 1982-06-30 | Formation of aluminum wiring layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11151882A JPS593952A (en) | 1982-06-30 | 1982-06-30 | Formation of aluminum wiring layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS593952A true JPS593952A (en) | 1984-01-10 |
| JPH0254658B2 JPH0254658B2 (en) | 1990-11-22 |
Family
ID=14563346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11151882A Granted JPS593952A (en) | 1982-06-30 | 1982-06-30 | Formation of aluminum wiring layer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS593952A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63208244A (en) * | 1987-02-24 | 1988-08-29 | Nec Corp | Manufacture of semiconductor device |
| JPH01298169A (en) * | 1988-05-27 | 1989-12-01 | Tokyo Electron Ltd | Film formation |
| JPH1197392A (en) * | 1997-09-16 | 1999-04-09 | Ebara Corp | Method and system for filling fine recess |
| WO2001027983A1 (en) * | 1999-10-15 | 2001-04-19 | Ebara Corporation | Method and apparatus for forming interconnection |
| JP2006519493A (en) * | 2003-02-07 | 2006-08-24 | ナノ クラスター デバイシス リミテッド | A line with clusters in a template |
| JP4578755B2 (en) * | 2000-05-02 | 2010-11-10 | 日揮触媒化成株式会社 | Integrated circuit manufacturing method |
-
1982
- 1982-06-30 JP JP11151882A patent/JPS593952A/en active Granted
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63208244A (en) * | 1987-02-24 | 1988-08-29 | Nec Corp | Manufacture of semiconductor device |
| JPH01298169A (en) * | 1988-05-27 | 1989-12-01 | Tokyo Electron Ltd | Film formation |
| JPH1197392A (en) * | 1997-09-16 | 1999-04-09 | Ebara Corp | Method and system for filling fine recess |
| WO2001027983A1 (en) * | 1999-10-15 | 2001-04-19 | Ebara Corporation | Method and apparatus for forming interconnection |
| US6730596B1 (en) | 1999-10-15 | 2004-05-04 | Ebara Corporation | Method of and apparatus for forming interconnection |
| JP4578755B2 (en) * | 2000-05-02 | 2010-11-10 | 日揮触媒化成株式会社 | Integrated circuit manufacturing method |
| JP2006519493A (en) * | 2003-02-07 | 2006-08-24 | ナノ クラスター デバイシス リミテッド | A line with clusters in a template |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0254658B2 (en) | 1990-11-22 |
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