JPS593931A - Forming of thin film - Google Patents

Forming of thin film

Info

Publication number
JPS593931A
JPS593931A JP57113704A JP11370482A JPS593931A JP S593931 A JPS593931 A JP S593931A JP 57113704 A JP57113704 A JP 57113704A JP 11370482 A JP11370482 A JP 11370482A JP S593931 A JPS593931 A JP S593931A
Authority
JP
Japan
Prior art keywords
gas
substrate
wafer
thin film
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57113704A
Other languages
Japanese (ja)
Inventor
Yoshimi Shiotani
喜美 塩谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57113704A priority Critical patent/JPS593931A/en
Publication of JPS593931A publication Critical patent/JPS593931A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/48—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
    • C23C16/482—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation using incoherent light, UV to IR, e.g. lamps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02277—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition the reactions being activated by other means than plasma or thermal, e.g. photo-CVD

Abstract

PURPOSE:To easily form any desired thin film on a silicon substrate in a short time without the need of a large-scaled apparatus by a method wherein a compound film formed through the photochemical reaction is adhered onto the semiconductor substrate. CONSTITUTION:An Si wafer 1 including a semiconductor device is introduced on a heat-resistant susceptor 6 placed over a belt 3B within a treatment chamber 4, and the interior of the treatment chamber 4 is exhausted after closing a gate valve 5A. Mixture gas of monisilane gas, phosphine gas and nitrous oxide gas is introduced from a gas inlet port 8, a UV beam is irradiated to the mixture gas through a quartz plate 10 provided with slits using a light source as a xenon lamp 9, thereby to coat a PSG film on the Si wafer 1 through the photochemical reaction. Since the PSG film is easily coated on the Si substrate 1 in a short time by heating only due to the light, it becomes possible to treat the Si substrate including a semiconductor device with relatively ease.

Description

【発明の詳細な説明】 （ａ）　　発明の技術分野 本発明はシリコン基板のような半導体基板上における薄
膜の形成方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method of forming a thin film on a semiconductor substrate such as a silicon substrate.

（′ｂ）技術の背景 ＩＣ，Ｔ、Ｓｌ等の半導体装置の製造において半導体素
子を形成したシリコン（Ｓｉ、）基板上には、大気中の
ナトリウム（Ｎａ）原子等の不純物原子ａ８１基板表面
への侵入を防止するために、燐硅酸ガフス（ＰＣＧ）膜
が化学蒸着（ＣＶＤ）法等によって被着されている。('b) Background of the technology In the manufacture of semiconductor devices such as IC, T, and Sl, impurity atoms such as sodium (Na) atoms in the atmosphere are deposited on the silicon (Si) substrate on which semiconductor elements are formed. In order to prevent the intrusion of gas, a phosphosilicate gaff (PCG) film is deposited by chemical vapor deposition (CVD) or the like.

ところでこのＩ）　Ｓ　Ｇ膜は保ご膜や層間絶縁膜とし
て広く使用されている。By the way, this I)SG film is widely used as a protective film and an interlayer insulating film.

（Ｃ）　　従来技術と問題点 ところで従来このような保ご膜や層間絶縁膜の形成方法
として一般に周知のＣＶＤ法やプラズマＣＶＤ法がとら
れてきた。(C) Prior Art and Problems Conventionally, the well-known CVD method or plasma CVD method has been used as a method for forming such a protective film or an interlayer insulating film.

然しＣＶＤ法は拡散炉等、プラズマＣＶＤ法は発振器お
よび加熱機構等の比較的大がかりな装置が必要である。However, the CVD method requires relatively large-scale equipment such as a diffusion furnace, and the plasma CVD method requires relatively large-scale equipment such as an oscillator and a heating mechanism.

（ｄ）　　発明の目的 本発明は大がかりな装置を必要とせず短時間で容易に半
導体素子を形成したシリコン（Ｓｌ）基板上に任意の薄
膜を形成し得るような新規な薄膜の形成方法Ω提供を目
的とするものである。(d) Purpose of the Invention The present invention provides a novel method for forming a thin film that can form any desired thin film on a silicon (Sl) substrate on which semiconductor elements are easily formed in a short time without requiring large-scale equipment. The purpose is to

（ｅ）　　発明の構成 かかる目的を達成するための本発明の薄膜の形成方法は
処理室内へ半導体基−板と光線を照射する光源とを設置
し、鴫処理室内を排気したのち、該処理室内へ該半導体
基板の成分原子を含む反応ガスを導入し、該光源上り光
線を反応ガスに照射せしめて該反応ガスを加熱し、光化
学反応を生じさせ、該反応によって形成される化合物膜
を該半導体基板上に付着させるようにしたことを特徴と
するものである。(e) Structure of the Invention In order to achieve the above object, the method for forming a thin film of the present invention includes installing a semiconductor substrate and a light source for irradiating a light beam into a processing chamber, evacuating the inside of the processing chamber, and then removing the heat from the processing chamber. A reactive gas containing component atoms of the semiconductor substrate is introduced into the semiconductor substrate, and the reactive gas is heated by irradiating the reactive gas with the light beam coming from the light source to cause a photochemical reaction, and the compound film formed by the reaction is transferred to the semiconductor substrate. It is characterized in that it is attached onto a substrate.

（ｆ）　　発明の実施例 以下図面を用いて本発明の一実施例につき詳細に説明す
る。(f) Embodiment of the Invention An embodiment of the invention will be described in detail below with reference to the drawings.

図は本発明の薄膜の形成方法に用いる装置の概略図であ
る。The figure is a schematic diagram of an apparatus used in the thin film forming method of the present invention.

図示するように例えば半導体素子を形成した５ｉｆｙｘ
バー１をテフロン製のウエハーカセツ）２Ａに収納する
。その後耐熱ゴム製のべ／Ｌ／　）　８　Ａを用いてウ
ェハー１を１枚づつ運搬しアルシミニウム製の処理室４
の近傍にウェハーｌが近付いた時点でゲートパルプ５Ａ
を開いてウェハー１をアルシミニウム製等の処理室４内
のベル）８Ｂの耐熱性のサセプタ６上に導入する。次い
でゲートノ＜μプ５．ＡＪを閉じて処理室４の排気孔７
よシ排気ポンプ（図示せず）等を用いて処理室４内部を
１０−２〜１ｏ−３Ｔｏｒｒ程度の真空度になるまで排
気する。その後力゛ヌ導入孔８よシモノシラン（ＳｉＨ
４）ガスとホスフィン（ＰＨａ）ガスと亜酸化窒素（Ｎ
　、　Ｏ）ガスとの混合ガスをＩ　ＴＯｒｒの真空度に
なるまで導入する。次いで処理室４内に設けたキセノン
ランプ９よりなる光源を用いスリットを設けた石英板Ｉ
Ｏを介して紫外線を照射して１０分程度保つ。そして導
入された混合ガスを光化学反応によってｐ’；ａ膜に変
化させ形成されたＰＳＧ膜をＳ１ウエハー１上に厚さ数
１０００オングストローム（人）程の状態で付着させる
ようにする。For example, 5ifyx with semiconductor elements formed as shown in the figure.
Store the bar 1 in a Teflon wafer cassette (2A). Thereafter, the wafers 1 are transported one by one using a heat-resistant rubber plate (L/ ) 8A to the processing chamber 4 made of aluminum.
When the wafer l approaches the vicinity of the gate pulp 5A
The wafer 1 is opened and introduced onto the heat-resistant susceptor 6 of the bell (8B) in the processing chamber 4 made of aluminum or the like. Next, gate no < μ 5. Close the AJ and open the exhaust hole 7 of the processing chamber 4.
The inside of the processing chamber 4 is evacuated to a degree of vacuum of about 10 -2 to 10 -3 Torr using an exhaust pump (not shown) or the like. After that, force was applied through the introduction hole 8 using simonosilane (SiH).
4) Gas and phosphine (PHa) gas and nitrous oxide (N
, O) A mixed gas with gas is introduced until the vacuum degree of I TOrr is reached. Next, using a light source consisting of a xenon lamp 9 provided in the processing chamber 4, a quartz plate I provided with a slit is
UV rays are irradiated through O and kept for about 10 minutes. Then, the introduced mixed gas is changed into a p';a film by a photochemical reaction, and the formed PSG film is deposited on the S1 wafer 1 to a thickness of about 1000 angstroms.

このようにすれば光による加熱のみで短時間で容易にＳ
ｉ基板１上にＰＳＧ膜が被着するようになるので、比較
的容易に半導体素子を形成したＳｉ基板を処理すること
ができる。In this way, S can be easily made in a short time by just heating with light.
Since the PSG film is deposited on the i-substrate 1, the Si substrate on which semiconductor elements are formed can be relatively easily processed.

その後このようにＰＳＧ膜を形成したＳｉウェハー１を
ゲートバルブ５Ｂを開いてベル）ａＣ上に取り出しカセ
ツ）２Ｂに収容するようにする。Thereafter, the Si wafer 1 with the PSG film formed thereon is opened on the gate valve 5B and taken out onto the bell (a)C and placed in the cassette (a) 2B.

ここで光源に用いるキセノンランプの代わシにブロムラ
ンプ等の紫外線を照射するランプを用いてもよい。また
レーザ光を照射するアルゴンガスレーザ装置等を光源の
代わシに処理室５内に設置してもよい。Here, instead of the xenon lamp used as the light source, a lamp that emits ultraviolet rays, such as a brome lamp, may be used. Further, an argon gas laser device or the like that emits laser light may be installed in the processing chamber 5 instead of the light source.

また基板として用いる材料として８１０代わシにガリウ
ム砒素（ＧａＡｓ）等の化合物半導体結晶を用いてもよ
い。Further, as the material used for the substrate, a compound semiconductor crystal such as gallium arsenide (GaAs) may be used instead of 810.

（２）発明の効果 以上述べたように本発明の半導体装置の製造方法によれ
ば簡単な方法で半導体素子を形成した基板上にＰＳＧｌ
ｌｌｆが形成され、このような方法で薄膜を形成すれば
半導体装置の製造コストが低下する利点を生じる。(2) Effects of the Invention As described above, according to the method of manufacturing a semiconductor device of the present invention, a PSG film can be formed on a substrate on which a semiconductor element is formed by a simple method.
llf is formed, and forming a thin film by such a method has the advantage of reducing the manufacturing cost of a semiconductor device.

【図面の簡単な説明】[Brief explanation of drawings]

図において１はＳ１ウエハー、２Ａ、２ＢｉｌＪセツト
、８Ａ、８Ｂ、８０はベルト、４は処理室、５Ａ、５Ｂ
はゲートパルプ、６はサセプタ、７は排気孔、８はガス
導入孔、９はキセノンランプ、ＩＯは石英板を示す。In the figure, 1 is S1 wafer, 2A, 2BilJ set, 8A, 8B, 80 is belt, 4 is processing chamber, 5A, 5B
6 is a gate pulp, 6 is a susceptor, 7 is an exhaust hole, 8 is a gas introduction hole, 9 is a xenon lamp, and IO is a quartz plate.

Claims (1)

【特許請求の範囲】[Claims] 処理室内へ半導体基板と光線を照射する光源とを設置し
、該処理室内を排気したのち、該処理室内へ該半導体基
板の成分原子を含む反応ガスを導入し、該光源よシ光線
を反応ガスに照射せしめて該反応ガスを加熱し光化学反
応を生じさせ、該反応によって形成される化合物膜を該
半導体基板上に付着させるようにしたことを特徴とする
薄膜の形成方法。A semiconductor substrate and a light source that irradiates a light beam are installed in a processing chamber, and after the inside of the processing chamber is evacuated, a reactive gas containing the component atoms of the semiconductor substrate is introduced into the processing chamber, and the light beam is radiated by the light source into the reactive gas. 1. A method for forming a thin film, comprising heating the reaction gas by irradiating it to cause a photochemical reaction, and depositing a compound film formed by the reaction on the semiconductor substrate.
JP57113704A 1982-06-29 1982-06-29 Forming of thin film Pending JPS593931A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57113704A JPS593931A (en) 1982-06-29 1982-06-29 Forming of thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57113704A JPS593931A (en) 1982-06-29 1982-06-29 Forming of thin film

Publications (1)

Publication Number Publication Date
JPS593931A true JPS593931A (en) 1984-01-10

Family

ID=14619052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57113704A Pending JPS593931A (en) 1982-06-29 1982-06-29 Forming of thin film

Country Status (1)

Country Link
JP (1) JPS593931A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61271819A (en) * 1985-05-27 1986-12-02 Semiconductor Energy Lab Co Ltd Thin film forming method
US4887548A (en) * 1987-05-15 1989-12-19 Semiconductor Energy Laboratory Co., Ltd. Thin film manufacturing system
US5112647A (en) * 1986-11-27 1992-05-12 Canon Kabushiki Kaisha Apparatus for the preparation of a functional deposited film by means of photochemical vapor deposition process
US5364667A (en) * 1992-01-17 1994-11-15 Amtech Systems, Inc. Photo-assisted chemical vapor deposition method
JPH07176499A (en) * 1994-06-21 1995-07-14 Semiconductor Energy Lab Co Ltd Light emitting apparatus
US6261372B1 (en) * 1999-04-15 2001-07-17 Tokyo Electron Limited Vacuum process system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61271819A (en) * 1985-05-27 1986-12-02 Semiconductor Energy Lab Co Ltd Thin film forming method
JPH0548616B2 (en) * 1985-05-27 1993-07-22 Handotai Energy Kenkyusho
US5112647A (en) * 1986-11-27 1992-05-12 Canon Kabushiki Kaisha Apparatus for the preparation of a functional deposited film by means of photochemical vapor deposition process
US4887548A (en) * 1987-05-15 1989-12-19 Semiconductor Energy Laboratory Co., Ltd. Thin film manufacturing system
US5364667A (en) * 1992-01-17 1994-11-15 Amtech Systems, Inc. Photo-assisted chemical vapor deposition method
JPH07176499A (en) * 1994-06-21 1995-07-14 Semiconductor Energy Lab Co Ltd Light emitting apparatus
US6261372B1 (en) * 1999-04-15 2001-07-17 Tokyo Electron Limited Vacuum process system

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