JPS5928706A - Demodulation circuit - Google Patents

Demodulation circuit

Info

Publication number
JPS5928706A
JPS5928706A JP13739682A JP13739682A JPS5928706A JP S5928706 A JPS5928706 A JP S5928706A JP 13739682 A JP13739682 A JP 13739682A JP 13739682 A JP13739682 A JP 13739682A JP S5928706 A JPS5928706 A JP S5928706A
Authority
JP
Japan
Prior art keywords
signal
switching
circuit
wave
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13739682A
Other languages
Japanese (ja)
Inventor
Hiroshi Iida
浩 飯田
Eiichiro Iwasaki
岩崎 英一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sansui Electric Co Ltd
Original Assignee
Sansui Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sansui Electric Co Ltd filed Critical Sansui Electric Co Ltd
Priority to JP13739682A priority Critical patent/JPS5928706A/en
Publication of JPS5928706A publication Critical patent/JPS5928706A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/54Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving generating subcarriers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/22Homodyne or synchrodyne circuits
    • H03D1/2209Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
    • H03D1/2236Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Signal Processing (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To simplify the constitution of a demodulation circuit without using an analog multiplier or the like, by switching synchronizingly an input amplitude modulation signal by a switching wave not including the 3rd harmonic for demodulating the signal. CONSTITUTION:A composite signal is inputted to a signal input terminal 1 of an FM stereo demodulation circuit and a clock signal produced in synchronizing with a pilot signal is inputted to a clock signal input terminal 2. This clock signal is frequency-divided at 1/3 and 1/2 frequency division circuits 3, 4 to output a couple of outputs Q1, Q1', Q2, Q2' having opposite phase, and the outputs are applied to AND gates 5, 6 and a pulse Q3 where 120 deg. period being 1/3 of one period is at H level and the rest is L level is outputted from the gate 5 and a pulse Q4 of opposite phase difference is outputted from the gate 6. The pulses Q3, Q4 control switches 9, 10 switching the composite signal of a switching circuit 7. Further, the input amplitude modulation wave is demodulated by the switching wave not including the 3rd harmonic and a difference signal L-R is outputted from the circuit 7.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は振幅変調信号を同期検波する復調回路に係シ、
特にFM(周波数変調〕ステレオ受信機のステレオ復調
部(いわゆるマルチゾレクス復調部)等に最適な復調回
路に関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a demodulation circuit for synchronously detecting an amplitude modulated signal.
In particular, it relates to a demodulation circuit that is optimal for a stereo demodulation section (so-called multizorex demodulation section) of an FM (frequency modulation) stereo receiver.

〔発明の技術的背景〕[Technical background of the invention]

第1図に従来方式によるF’Mステレオ受信機のステレ
オ復調回路の等何回路を示す。ステレオ復調回路には受
信された放送波をFM復調して取り出したステレオコン
ポノット信号が供給される。このコンポノット信号中の
19 kHzの・にイロ、ト信号に基づいて生成された
3 8 kHzの復調用キャリアをスイッチング信号と
して該コンポノット信号を図示のようにスイッチSWl
で切換え、端子’r、、’r2に交互に与えることによ
り端子TI、T、にはそれぞれ左、右チャンネル信号り
、Rが分離して導出される。ここに示したのはあくまで
も原理的なものであって現実にはスイッチSWlとして
はダイオード、トランジスタ等を用いたスイッチング回
路が使用され、また補助回路として良好なチャンネル七
ノ4レージ、ンヲ得るための七ノjレーション市す両回
路等が必要である。
FIG. 1 shows a stereo demodulation circuit of a conventional F'M stereo receiver. A stereo component signal obtained by FM demodulating the received broadcast wave is supplied to the stereo demodulation circuit. Using the 38 kHz demodulation carrier generated based on the 19 kHz .
By switching the signals at terminals 'r, , and 'r2 alternately, left and right channel signals R and R are separately derived from terminals TI and T, respectively. What is shown here is just a principle; in reality, a switching circuit using diodes, transistors, etc. is used as the switch SWl, and as an auxiliary circuit, it is necessary to Seven circuits are required.

上述からもわかるようにステレオ復調の結果得られる左
、右チャンネル信号り、Rは1M理的にコンポノット信
号K 38 kHzの矩形波を乗じた形となる。
As can be seen from the above, the left and right channel signals obtained as a result of stereo demodulation, R, have a form obtained by multiplying 1M theoretically by the rectangular wave of the component knot signal K 38 kHz.

しかしながら、矩形波は基本波だけでなく高次の高調波
を多く含んだ波形であり、伽調信号中にそれら高調波が
混入されるばかりでなく、もし入力コンポノット信号中
にその矩形波の筒調波に相当する成分がおればそれを後
脚することになり、ビート障害の発生や雑音の混入を招
き、さらにはS/Nを劣化させたり、再生信号を著しく
聴きづらくシ産りする。
However, the rectangular wave is a waveform that contains not only the fundamental wave but also many higher-order harmonics, and not only will these harmonics be mixed into the tone signal, but if the input component signal is If there is a component corresponding to the cylinder harmonic, it will be left behind, causing beat disturbances and noise, and furthermore deteriorating the S/N ratio and making the reproduced signal extremely difficult to hear. .

これに対し他の後脚方式として正弦波スイ。On the other hand, the other hind leg system is sine wave swivel.

チングあるいは正弦波復調などと呼ばれる方式がある。There is a method called pinging or sine wave demodulation.

この方式は高次の高調波を含まない純正弦波の&uJ用
キャリアを入力コンポノット信号に乗じ左、右チヤンネ
ル信号を分離抽出するものでおる。この場合、復調しよ
−うとする信号成分のみについての復調能力しか有して
おらず、それ以外の成分についての復調能力は持ってい
ないで、原理的にビート障害の発生や雑音の混入のおそ
れはない。
In this method, the input component signal is multiplied by a carrier for &uJ, which is a pure sine wave that does not contain high-order harmonics, and the left and right channel signals are separated and extracted. In this case, it has the ability to demodulate only the signal component to be demodulated, but not the other components, and in principle there is a risk of beat disturbances or noise mixing. That's not it.

しかしながら、この方式では高価なアナログ乗算器を必
要とするが、このアナログ乗算器自体の特性、特に直線
性やS/Nおよびグイナミソクレンノ等に問題があって
、現時点では良好な結果の得られるものの入手が困難で
あることなどによって、この方式のものは実用に供され
ていない。
However, this method requires an expensive analog multiplier, but there are problems with the characteristics of this analog multiplier itself, especially linearity, S/N, and signal-to-noise ratio, and so far it has not been possible to obtain good results. This method has not been put to practical use because it is difficult to obtain such a method.

今日のステレオ後脚回路はほとんど先に述べた矩形波ス
イ、ッチング方式を採用しており、前述した高調波復調
による問題を避けるため、アンチバーディフィルタと呼
ばれるロー・ンスフィルタでコンポノット信号から不要
筒周波成分(例えば隣接局により生ずる1 00 kH
zの干渉ひずみ成分等)を除去してからスイッチングを
行なうようにしていた。この場合、コンポノット信号が
ロー・セスフィルタを通るため、メイン信号であるL+
Hの和信号(コンボノット何列の50〜150UOHz
に存在する)とサブ信号であるL −Rの差信号(コン
ポノット信号に38 kHzのサブキャリアの変調成分
として存在する)との間に位相差を生じ、復調信号にセ
・臂レージ、ンの劣化を生じたり、復調後の再生音質を
悪化させたりするという新たな問題を生じていた。
Most of today's stereo rear leg circuits employ the square wave switching and switching method mentioned above, and in order to avoid the problems caused by harmonic demodulation mentioned above, a low frequency filter called an anti-birdie filter is used to remove component signals from the component signal. Cylindrical frequency components (for example, 100 kHz generated by adjacent stations)
z interference distortion components, etc.) were removed before switching was performed. In this case, the component signal passes through the low-cess filter, so the main signal L+
H sum signal (50 to 150 UOHHz of several rows of combo knots)
A phase difference is generated between the sub-signal L - R difference signal (present in the component signal as a modulation component of the 38 kHz subcarrier), and the demodulated signal has a This has caused new problems such as deterioration of the sound quality and deterioration of the reproduced sound quality after demodulation.

また、高調波成分として第3高調波が特に問題となると
ころから、上述したアンチ・ザーデイフィルタを用いな
い方式として、38 kHzのスイッチング信号の第3
高調波(114kf(z )でコンポノット信号をスイ
ッチングする回路を設けてビート成分のみを抽出しこの
信号を適宜レベル調整してステレオ復調出力り、R中に
あるビート成分から減算し同成分をキャンセルする方式
もあるが、この場合も構成が複雑化するという問題があ
る。
In addition, since the third harmonic is a particular problem as a harmonic component, as a method that does not use the above-mentioned anti-Zardi filter, the third harmonic of the 38 kHz switching signal is
A circuit is installed to switch the component signal at harmonics (114 kf (z)), extracts only the beat component, adjusts the level of this signal appropriately, outputs stereo demodulation, subtracts it from the beat component in R, and cancels the same component. There is also a method to do this, but this also has the problem of complicating the configuration.

一万、上述においては主としていわゆるスイッチング方
式によるステレオ復調について説明したが、ステレオ復
調方式にはこの他にいわゆるマトリクス方式による復調
がある。この場合にも実質的には第2図に示すようにコ
ンポノット信号をスイッチSW2により38 kllz
の復調用キャリアでスイッチングして交」に極性を切換
えて差動回路りに与えL −Rの差信号を取り出し、こ
れをマトリクス回路Mに与えてコンポノット信号中のL
+Hの和信号成分との和および差をとり、左、右チャン
ネル復W故出力L1Rを得ることになり、上述のスイッ
チング方式の場合と同様コンポノット信号を38 kH
zでスイッチングすることに変りはない。なお、M2e
こおけるスイッチSW2と差動回路りは具体的にはダイ
オード等のスイッチング回路と差動増幅器の組合せ、゛
またはダブルバランスドミギサ等の形で構成さハる。
In the above description, stereo demodulation based on a so-called switching method was mainly explained, but stereo demodulation also includes demodulation using a so-called matrix method. In this case as well, as shown in FIG.
The demodulation carrier is switched to switch the polarity to "alternate" and applied to the differential circuit to extract the L - R difference signal, which is applied to the matrix circuit M to convert the L in the component knot signal.
By taking the sum and difference with the +H sum signal component, the left and right channel double output L1R is obtained, and as in the case of the above-mentioned switching method, the component signal is converted to 38 kHz.
There is no difference in switching with z. In addition, M2e
Specifically, the switch SW2 and the differential circuit here are configured in the form of a combination of a switching circuit such as a diode and a differential amplifier, or a double-balanced mixer.

このように従来のステレオ>g回路ではいがなる方式を
用いた場合にもスイッチングに伴Zよう問題が生じてい
た。
As described above, even when using the conventional stereo>g circuit, a problem arises due to switching.

上述したスイッチング後調時にスイッチング信号に自ま
れる高調波成分に同期する成分をも復調してし−まうと
いう現象14FMステレオ受1d機pcおけるステレオ
後調回路VC限らず、振幅変調成分を同期検波する場合
には多かれ少な力・れ問題となっ′Cいた。
The above-mentioned phenomenon in which components synchronized with harmonic components contained in the switching signal are demodulated during switching post-adjustment is not limited to the stereo post-adjustment circuit VC in the 14FM stereo receiver PC. When doing so, there was a problem of more or less force and strain.

〔発明の目的〕[Purpose of the invention]

本発明は振幅変調信号を同期検波するに際し復調用キャ
リアの第3高調波成分による影響を低減し得る同期検波
を簡単な構成で実現し得る(′M調回路を提供すること
を目的としている。
The present invention aims to provide an M-modulation circuit that can realize synchronous detection with a simple configuration that can reduce the influence of the third harmonic component of a demodulating carrier when synchronously detecting an amplitude modulated signal.

〔発明の概要〕[Summary of the invention]

本発明は振幅変調信号の同期検波に際し、多くの問題を
持つンζもかかわらず従来多用されていた矩形波スイッ
チングに代えて第3高調波を含“まないスイッチング波
でのスイッチングを実現することに、l:り上記目的を
達成するものである。すなわち本発明においては、矩形
波的な同期スイッチングの導通角および極性を選択し、
実質的に、検波周波数に関し120°の位相角区間を所
定の極性をもって、且つこノLと位相が180°ずれた
同120″の位相角区間を上記極性とは逆の極性をもっ
て入力振幅変調信号を導出することにより、スイッチン
グ波に山T3Aa14波を含まないスイッチングを実現
するものでd・)る。
An object of the present invention is to realize switching using a switching wave that does not contain third harmonics in place of the conventionally frequently used square wave switching, which has many problems in synchronous detection of amplitude modulated signals. In other words, in the present invention, the conduction angle and polarity of the rectangular wave synchronous switching are selected,
Substantially, the input amplitude modulated signal has a phase angle interval of 120° with a predetermined polarity with respect to the detection frequency, and a phase angle interval of 120'', which is 180° out of phase with this L, with a polarity opposite to the above polarity. By deriving d.), it is possible to realize switching that does not include the peak T3Aa14 wave in the switching wave.

〔発明の実施例〕[Embodiments of the invention]

第3図に本発明をFMステレオ後後回回路適用した場合
の一実施例の構成を模式的に示す。
FIG. 3 schematically shows the configuration of an embodiment in which the present invention is applied to an FM stereo post circuit.

ここで説明する実施例に第2図に示したマトリクス方式
の構成においてザブチャンネルを復調してL −Rを抽
出する部分に本発明を適用したものである。
The embodiment described here is an example in which the present invention is applied to the portion of demodulating subchannels and extracting L-R in the matrix type configuration shown in FIG. 2.

第3図において、1はコンボノット信号S二(L十R)
+(L−R)slnωt(但し、ω二2π×38 [k
Hz〕)が入力される18号入力端子、2は19 kH
2の・そイロ、ト侶号に同期して生成された3 8 k
Hz X 6=224 k■lzのクロ、り信号が入力
系れるクロ、り(i7号入力☆111子である。3およ
び4けそilぞれ1/3および1/2の分周比を羽゛す
る分周回路であり、各々人力何月を分周して互いに逆位
相の一対の出力を得るものでりる。
In Figure 3, 1 is the combo knot signal S2 (L + R)
+(L-R)slnωt (however, ω22π×38 [k
18 input terminal where Hz]) is input, 2 is 19 kHz
38k generated in synchronization with 2 Soiro and Toyogo
Hz x 6 = 224 klz black and white signals are input to the black and white (i7 input ☆ 111 child). This is a frequency divider circuit that divides the frequency manually, and obtains a pair of outputs with mutually opposite phases.

5および6はアンドゲートであり、7はコン′小゛ノッ
ト信号Sをスイッチングするスイッチング回路である。
5 and 6 are AND gates, and 7 is a switching circuit for switching the connotation signal S.

このスイッチング回路7の出力として復調出力でおるL
−Rの差信号が専用でれ、マトリクス回路に供給される
The output of this switching circuit 7 is the demodulated output L.
-R difference signals are dedicated and fed to the matrix circuit.

第4図は上記スイッチング回路2の詳細を示すものであ
る。同図において、8は差動増幅器であり、この差動増
幅器8の非反転および反転入力端子にはそれぞれスイッ
チ9およびIOを介してコンポノット<s号Sが入力さ
れる。スイッチ9および10は第3図に示した“アンド
ゲート5および6の出力Vこよりぞれぞれオン/オフ制
御される。
FIG. 4 shows details of the switching circuit 2. As shown in FIG. In the figure, reference numeral 8 denotes a differential amplifier, and a component signal S is inputted to the non-inverting and inverting input terminals of the differential amplifier 8 via a switch 9 and IO, respectively. Switches 9 and 10 are controlled on/off by the outputs V of AND gates 5 and 6, respectively, shown in FIG.

次にこのような構成における作用について第5図(a)
〜(X)に示す各部波形を参照17て説明する。
Next, the effect of such a configuration is shown in Figure 5(a).
The waveforms of each part shown in ~(X) will be explained with reference to 17.

クロック信号入力端子2には第5図(a)に示すような
り口、りfg号が入力される。このクロ。
The clock signal input terminal 2 receives a start signal and a start signal fg as shown in FIG. 5(a). This black.

り信号は分周回路3で1/3に分周され、それぞれ第5
図(b)および(C)に示すような互いV(180の位
相差を有する(すなわち逆位相の)2種の信号Q+ お
よび肩が分周回路3から出力される。信号Qtij四に
分周回路4で1/2に分周きれ、やはりそtlぞれ第5
図(d)および(e) VC示すような互いに1800
の位相差を有する2独の信号Q2おrび「が分周回路4
から111力される。
The frequency of the signal is divided into 1/3 by the frequency dividing circuit 3, and the fifth
Two types of signals Q+ and shoulder having a phase difference of 180 (that is, opposite phases) are outputted from the frequency dividing circuit 3 as shown in FIGS. (b) and (C). The frequency can be divided by 1/2 in circuit 4, and each of the 5th
1800 to each other as shown in Figures (d) and (e) VC
The two signals Q2 and ``, which have a phase difference of
111 power is applied.

この分周回路4の出力信号Q2と分周回路3の出力信号
Cがアンドダート5に入力され、このアンドゲート5か
らは第5図(イ)に示すような信号Q3が出力される。
The output signal Q2 of the frequency dividing circuit 4 and the output signal C of the frequency dividing circuit 3 are inputted to an AND gate 5, and a signal Q3 as shown in FIG. 5(A) is outputted from the AND gate 5.

また、分周回路3の出力Q+−と分周回路4のム1力で
−がアントゲ゛−16に入力され、このアンドゲート6
かりは第5図(g)に示すような信号Q4が出力される
。毎号Q3−Q4は周波数38 kHzの周Jυj阪で
hって、共に1周期の1/3(すなわち12 o’の位
相両区間がl((−・イレベル)で残余の区間がL(0
−レベル)であるノ9ルスであり、互いに180の位相
差を有している。これらイぎ号Q s  + ’J 4
がスイッチング回路7にスイッチング(g号として与え
られ、該スイッチ回路7では信ぢ入力端子1から与えら
れるコンポノット信号Sが上記信号Q3  、Q4でス
イッチングきれf、 −Rの差悟号出力が得られる。こ
のとき、スイッチング回路7ではスイッチ9およびlθ
がそれぞれ信号Q、およびQ4でυiJ閉される。すな
わち、メイッチ9は信+3Q、がHである期間のみ閉(
オン)であり、スイッチlOは信号Q4がHである期間
のみ閉で心る。したがって、ある時点より信号j Q 
sが11となり位相角で120°の区間、Q3がl【で
スイッチ9が閉であると、この間信号Q4はL 、 ス
□(7f l 01ri開(オフ)テA+り、それに1
.;(60’の位相角区間は信号Q!、Q4が共にり、
スイッチ9.IOが共に開となり、さらにそれに続く位
相角120°の区間は信号Q3はり、スイッチ9が開の
ままであるのに対し信号Q4は1(、スイッチ1θが閉
となり、続く位相角60°■区間はスイッチ9,1θが
ともに開となる。このような開閉動作を縁り返して、信
号入力端子1から入力されているコンポノット信号Sを
スイッチングする。このjn 9、例えばコンポノット
信号Sの周期成分比ωtが正である区間は信号q3がH
に、5111ωtが負の区間は信号Q4がHになるよう
に位相関係を設定すれば差動増幅器8の出力すなわちス
イッチング回路7の出力にL−Rの差信号が得られる。
In addition, the output Q+- of the frequency divider circuit 3 and the output voltage of the frequency divider circuit 4 are input to the AND gate 16, and this AND gate 6
The balance outputs a signal Q4 as shown in FIG. 5(g). Each issue Q3-Q4 has a frequency of 38 kHz and has a frequency of 38 kHz.
- level), and have a phase difference of 180 from each other. These numbers Q s + 'J 4
is given to the switching circuit 7 as a switching signal (g), and in the switching circuit 7, the component signal S given from the signal input terminal 1 is switched by the signals Q3 and Q4, and a difference signal f, -R is obtained. At this time, in the switching circuit 7, the switch 9 and lθ
are closed by signals Q and Q4, respectively. In other words, match 9 is closed (
(on), and the switch IO is closed only during the period when the signal Q4 is H. Therefore, from a certain point the signal j Q
When s is 11 and the phase angle is 120°, Q3 is 1 and the switch 9 is closed. During this period, the signal Q4 is L, S
.. ;(In the phase angle interval of 60', the signals Q! and Q4 are both,
Switch 9. Both IO are open, and in the following period of phase angle 120°, signal Q3 is high, and switch 9 remains open, while signal Q4 is 1 (, switch 1θ is closed, and the following phase angle is 60°). Switches 9 and 1θ are both opened.Reversing this opening and closing operation, the component knot signal S input from the signal input terminal 1 is switched.This jn 9, for example, the period of the component knot signal S In the section where the component ratio ωt is positive, the signal q3 is H.
If the phase relationship is set so that the signal Q4 becomes H in the period in which 5111ωt is negative, an L-R difference signal can be obtained at the output of the differential amplifier 8, that is, the output of the switching circuit 7.

この差信号(L−R)と別途に復言周した和信号(L+
R)とをマトリクス回路で演算してステレオ左右チャン
ネル信号り、Hに分離する。
This difference signal (L-R) and the sum signal (L+
R) is calculated by a matrix circuit and separated into stereo left and right channel signals and H.

上記スイッチング回路7の出力として得られる差信号(
L−R)は位相角120’に相当する・!ルス幅を有す
る・fルスを60’の休止区間を挾んで交互に極性を反
転させたパルスでコンポノット信号Sをスイッチング(
乗算)したものに相当する。上記・平ルスには原理的に
第3高調波成分が含まれていないので、スイッチング回
路7の出力として導出される差信号(L−Ft )には
38 kHzの復調用キャリアの第3高調波に起因する
問題は住じない。
The difference signal obtained as the output of the switching circuit 7 (
LR) corresponds to a phase angle of 120'! The component knot signal S is switched with pulses whose polarity is alternately reversed with f pulses having a pulse width of 60' in between (
multiplication). Since the above-mentioned signal does not contain the third harmonic component in principle, the difference signal (L-Ft) derived as the output of the switching circuit 7 contains the third harmonic of the 38 kHz demodulation carrier. Problems caused by this will not occur.

次に上記パルスに第3亮詞波成分が含まれていないこと
を説明する。
Next, it will be explained that the above-mentioned pulse does not include the third idiom wave component.

上記実質的なスイッチング信号f(θ)は第6図に示す
ように、0≦θくθl、θ8〈θ〈π十θ1 。
As shown in FIG. 6, the above-mentioned substantial switching signal f(θ) is 0≦θ<θl, θ8<θ<π+θ1.

π+θ2〈θ〈2πの区間; f(θ)=0 θ!≦θ≦θtの区間; f(θ)=1 π十θl≦θ≦π十02の区間; f(θ)−一1 なる周期2rrの/4’ルス波である。π+θ2〈θ〈2π interval; f(θ)=0 θ! ≦θ≦θt interval; f(θ)=1 An interval of π10θl≦θ≦π102; f(θ)-1 This is a /4' pulse wave with a period of 2rr.

このスイッチング信号のフーリエ級数は次式1式% (1) この場合係数in、bnは、 ’n”” −−i(slnnθ1 5illnθl)・
・・・・・・・・(4)nπ bn= 1(cosnθ2− cosnθl)    
 ・・・・・・・・・(5)nπ が求められる。
The Fourier series of this switching signal is expressed by the following formula 1% (1) In this case, the coefficients in and bn are 'n'''' --i(slnnθ1 5illnθl)・
・・・・・・・・・(4) nπ bn= 1 (cosnθ2− cosnθl)
(5) nπ is calculated.

ここで上記(4) 、 (5)式から第Kp波の係数a
つおよびb工が零になる条件を求める。
Here, from the above equations (4) and (5), the coefficient a of the Kp wave is
Find the conditions under which 1 and b become zero.

&lnKθz −5lnK B x =0      
   ””””、(5)collにθ2  CQSKθ
1=o         −0−=、<7)(6) 、
 (7)式より (但し、mは正の整数) となる。第6図の波形では午が1800を越えることは
ないので、rn = lとして第3高調波(K−3の場
合)について検討すると、−2π 2    1   3 ;120°          四重・(9)となり、
120’の位相角区間について、f(θ)−1または−
1となる波形(第6図においてθ1−30°、θ2=1
500とした波形)には第3扁調波が含まれていないこ
とになる。
&lnKθz −5lnK B x =0
"""", (5) θ2 CQSKθ to coll
1=o −0−=,<7)(6),
From formula (7), (where m is a positive integer). In the waveform in Figure 6, the noon never exceeds 1800, so if we consider the third harmonic (in the case of K-3) with rn = l, we get -2π 2 1 3 ; 120° quadruple (9). ,
For a phase angle interval of 120′, f(θ)−1 or −
1 (θ1-30°, θ2=1 in Figure 6)
500 waveform) does not include the third flattened wave.

したがって、スイッチング信号が実質的eζこのような
波形となるようにスイッチングすればよい。
Therefore, it is sufficient to perform switching so that the switching signal substantially has such a waveform as eζ.

ちなみに、第5高調波が存在しない・ヤルス波形は(8
)式より、 θ −θ =劾ど 2  1  5 〃・ら、m = 1ならばθ2−01−72゜m = 
2ならばθ2−θ、=144゜である。したがって、実
質的に、72°あるいは144°の位相角区間f(θ)
=1′またけ−1となるスイッチング信号によるスイッ
チングを行なえば、第5高調波による影響を除去するこ
とができることになる。
By the way, the Jars waveform without the 5th harmonic is (8
) From the formula, θ − θ = 2 1 5 〃・ra, if m = 1, θ2 − 01 − 72゜ m =
2, θ2−θ, = 144°. Therefore, in effect, the phase angle interval f(θ) of 72° or 144°
If switching is performed using a switching signal of =1' across -1, the influence of the fifth harmonic can be removed.

このように、4調用キャリア(38kHz)の半周期の
2/3 (120°)の位相角区間に相当するスイッチ
ング導通角をもって入力コン7」?ノット(8号をスイ
ッチングすることにより、上記復調用キャリアの第3高
調波成分に起因する問題を生じることのない同期スイッ
チング復調を実現することができる。
In this way, the input converter 7 has a switching conduction angle corresponding to a phase angle interval of 2/3 (120°) of a half period of the 4-tone carrier (38kHz). By switching Knot (No. 8), it is possible to realize synchronous switching demodulation that does not cause problems caused by the third harmonic component of the demodulation carrier.

なお、本発明は上述し且つ図面に示す実施例にのみ限定
されることなく、その要旨を変更しない範囲内で種々変
形して実施することができる。
It should be noted that the present invention is not limited to the embodiments described above and shown in the drawings, but can be implemented with various modifications without changing the gist thereof.

例えば第7図に原理的構成を第8図(、) 、 (b)
に動作波形をそれぞれ示すように、第3図のスイッチン
グ回路7として、極性スイッチング回路1ノで通常の(
:rニーティファクター1/2=50チつまり導通角1
80°の)矩形波・ぞルスQ6で人力信号の極性を交互
にスイッチングし、その出力についてダート回路12で
上記極性スイッチのタイミングヲ′含み半周期の1/3
の区間だけゲートを閉じる(零レベルを出力する)よう
なり−ト・ンルスQ6によってり一゛−トをかける構成
のスイッチング回路を用いるようにしても上述と同様の
結果を得ることができる。
For example, Fig. 7 shows the basic configuration and Fig. 8 (,), (b)
As shown in FIG. 3, the operating waveforms are shown in FIG.
:rNity factor 1/2=50chi, that is, conduction angle 1
The polarity of the human input signal is alternately switched using the 80°) rectangular wave signal Q6, and the output is controlled by the dart circuit 12 at 1/3 of a half cycle, including the timing of the polarity switch.
The same result as described above can be obtained by using a switching circuit configured to close the gate (output a zero level) only in the period of , and to apply a bias by the pulse Q6.

さらに、本発明はE’ Mステレオ復調回路に1辰らず
、振幅変調成分を同期検波するいかなる場合にも適用す
ることができ、4袂な第3高調波成分による復調等の問
題を払拭することができる。
Furthermore, the present invention is not limited to the E'M stereo demodulation circuit, and can be applied to any case where amplitude modulation components are synchronously detected, and eliminates problems such as demodulation due to the fourth harmonic component. be able to.

〔発明の効果〕〔Effect of the invention〕

本発明によれば実質的に第3高調波が含まれないスイッ
チング波で入力振幅変調信号を同期スイッチングして復
調することにより、特に問題となりがちな第3高調波に
よる悪影響を防止した同期検波を、アナログ乗算器等を
用いることなく簡単な構成で実現し得る伐−勾回路を提
供することができる。
According to the present invention, by synchronously switching and demodulating the input amplitude modulated signal with a switching wave that does not substantially contain the third harmonic, synchronous detection can be performed that prevents the adverse effects of the third harmonic, which tends to be particularly problematic. , it is possible to provide a gradient circuit that can be realized with a simple configuration without using analog multipliers or the like.

第、5図 fIi6wJ 館7図 Os           Qg 9118図 (b)Qtグ1)、1Figure 5 fIi6wJ Building 7 Os Qg Figure 9118 (b) Qt 1), 1

Claims (1)

【特許請求の範囲】[Claims] 振幅変調信号を同期検波する復調回路において、入力振
幅変調信号をスイッチ回路で同期スイッチングさせ、実
質的に、検波周波数に関し120°の位相角区間を所定
の極性をもって、且つこれと位相が180°ずれた同1
20°の位相角区間を上記極性とは逆の極性をもって上
記入力振幅変調信号を導出する構成としたことを特徴と
する復調回路。
In a demodulation circuit that synchronously detects an amplitude modulation signal, the input amplitude modulation signal is synchronously switched by a switch circuit, and the phase angle section of 120° with respect to the detection frequency has a predetermined polarity and the phase is 180° out of this. Same 1
A demodulation circuit characterized in that the input amplitude modulation signal is derived from a 20° phase angle interval with a polarity opposite to the above polarity.
JP13739682A 1982-08-09 1982-08-09 Demodulation circuit Pending JPS5928706A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13739682A JPS5928706A (en) 1982-08-09 1982-08-09 Demodulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13739682A JPS5928706A (en) 1982-08-09 1982-08-09 Demodulation circuit

Publications (1)

Publication Number Publication Date
JPS5928706A true JPS5928706A (en) 1984-02-15

Family

ID=15197683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13739682A Pending JPS5928706A (en) 1982-08-09 1982-08-09 Demodulation circuit

Country Status (1)

Country Link
JP (1) JPS5928706A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0255758A2 (en) * 1986-07-28 1988-02-10 Tektronix, Inc. L + R separation system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5599857A (en) * 1979-01-23 1980-07-30 Victor Co Of Japan Ltd Demodulation method of fm stereo signal and its unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5599857A (en) * 1979-01-23 1980-07-30 Victor Co Of Japan Ltd Demodulation method of fm stereo signal and its unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0255758A2 (en) * 1986-07-28 1988-02-10 Tektronix, Inc. L + R separation system
EP0255758A3 (en) * 1986-07-28 1989-06-07 Tektronix, Inc. l + r separation system

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