JPS5927136B2 - optical receiver circuit - Google Patents

optical receiver circuit

Info

Publication number
JPS5927136B2
JPS5927136B2 JP56146618A JP14661881A JPS5927136B2 JP S5927136 B2 JPS5927136 B2 JP S5927136B2 JP 56146618 A JP56146618 A JP 56146618A JP 14661881 A JP14661881 A JP 14661881A JP S5927136 B2 JPS5927136 B2 JP S5927136B2
Authority
JP
Japan
Prior art keywords
circuit
apd
temperature
multiplication factor
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56146618A
Other languages
Japanese (ja)
Other versions
JPS5847348A (en
Inventor
一雄 山根
眞司 清田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56146618A priority Critical patent/JPS5927136B2/en
Publication of JPS5847348A publication Critical patent/JPS5847348A/en
Publication of JPS5927136B2 publication Critical patent/JPS5927136B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60Receivers
    • H04B10/66Non-coherent receivers, e.g. using direct detection
    • H04B10/69Electrical arrangements in the receiver
    • H04B10/693Arrangements for optimizing the preamplifier in the receiver
    • H04B10/6931Automatic gain control of the preamplifier
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60Receivers
    • H04B10/66Non-coherent receivers, e.g. using direct detection
    • H04B10/69Electrical arrangements in the receiver
    • H04B10/691Arrangements for optimizing the photodetector in the receiver
    • H04B10/6911Photodiode bias control, e.g. for compensating temperature variations

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Dc Digital Transmission (AREA)
  • Optical Communication System (AREA)

Description

【発明の詳細な説明】 本発明は、最適増倍率(M)と最適識別レベル(Vth
)とについて温度補償を行つた光受信回路に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides an optimal multiplication factor (M) and an optimal discrimination level (Vth
) and relates to an optical receiving circuit that performs temperature compensation for the above.

現在長波長帯の光受信回路においては、受光素子として
ゲルマニウムーアバランシエ・ホト・タイオード(以下
Ge−APDと略す)が広く用いられている。
Currently, in long wavelength band optical receiving circuits, germanium abalancier photodiodes (hereinafter abbreviated as Ge-APD) are widely used as light receiving elements.

しかしながらGe−APDは暗電流が大きく、暗電流に
よつて増倍率や識別レベルの最適値が影響を受ける。し
かもGe−APDの暗電流は温度依存性が大きく、例え
ば温度25℃の上昇によつて10倍にもなる。そのため
Ge−APDの最適増倍率M、最適識別レベルVthも
温度によつて変動する。一般にAPDの最適増倍率Mは
暗電流iDの関数として、次式によつて与えられること
が知られている。
However, Ge-APD has a large dark current, and the optimum values of the multiplication factor and discrimination level are affected by the dark current. Furthermore, the dark current of the Ge-APD has a strong temperature dependence, and increases by a factor of 10 when the temperature increases by 25° C., for example. Therefore, the optimum multiplication factor M and the optimum discrimination level Vth of the Ge-APD also vary depending on the temperature. It is generally known that the optimum multiplication factor M of APD is given by the following equation as a function of dark current iD.

また最適識別レベルVtれは暗電流iDおよび最適増倍
率Mの関数として、次の諸式によつて与えられる。
Further, the optimum discrimination level Vt is given by the following equations as a function of the dark current iD and the optimum multiplication factor M.

σ0 vth=・・・・・・・・・・・・・・・(2)σo+
σ1σ0=2eiDM2fXB+<in2>B・・・・
・・(3)σ1■2e(ξshotio+iD)M2+
XB+<i1>B・・・・・・(4)これら諸式におい
てeは電子集荷量、Bは等価>2+x x+2 1−4(−)2iD2+(ξshotio+2iD)・
・・・・・・・・(1) 雑音帯域幅、<in2>は入力換算雑音電流、ioは入
力光電流、ξshotはショット雑音振幅効率、iDは
APD暗電流、XはAPD雑音指数である。
σ0 vth=・・・・・・・・・・・・・・・(2) σo+
σ1σ0=2eiDM2fXB+<in2>B...
...(3) σ1■2e(ξshotio+iD)M2+
XB+<i1>B...(4) In these formulas, e is the electron collection amount, B is the equivalent>2+x x+2 1-4(-)2iD2+(ξshotio+2iD)・
・・・・・・・・・(1) Noise bandwidth, <in2> is input equivalent noise current, io is input photocurrent, ξshot is shot noise amplitude efficiency, iD is APD dark current, and X is APD noise figure .

従来、特に長波長帯の光受信回路においては、上述の(
1)式で示されるような暗電流のiDの変化に基づく最
適増倍率Mの変化を、APD出力を増幅する増幅回路に
温度補償を施すことによつて除去することが行われてい
た。しかしながら長波長螢光受信回路においては、識別
回路における最適識別レベルも上述の(2)式の関係に
従つて、暗電流IDおよび最適増倍率Mの変化による影
響を受けるが、これに対する対策は行われていなかつた
。本発明はこのような従来技術の欠点を除去しようとす
るものであつて、その目的は、光受信回路に訃いて、受
光素子APDの暗電流の温度依存性が原因となつて生じ
る、APDの最適増倍率Mの変化を温度補償するととも
に、暗電流1D訃よび最適増倍率Mの変化に応じて識別
レベルの温度補償を行うことができる回路形式を提供す
ることにある。以下、実施例について本発明を詳細・}
こ説明する。
Conventionally, the above-mentioned (
The change in the optimum multiplication factor M based on the change in iD of the dark current as shown in equation 1) has been removed by temperature-compensating the amplifier circuit that amplifies the APD output. However, in a long-wavelength fluorescent receiver circuit, the optimum discrimination level in the discrimination circuit is also affected by changes in the dark current ID and the optimum multiplication factor M according to the relationship in equation (2) above, but no countermeasures are taken. I wasn't aware of it. The present invention aims to eliminate such drawbacks of the prior art, and its purpose is to reduce the temperature dependence of the dark current of the light receiving element APD, which occurs due to the temperature dependence of the dark current of the light receiving element APD. It is an object of the present invention to provide a circuit type capable of temperature-compensating changes in the optimum multiplication factor M and temperature-compensating the discrimination level in accordance with changes in the dark current 1D and the optimum multiplication factor M. The present invention will be described in detail with reference to Examples below.
I will explain this.

第1図は、本発明の光受信回路の一実施例の構成を示す
プロツク図である。同図において、1は受光素子であつ
てGe−APDからなり、入力光信号を電気信号に変換
して出力する。2は増幅器であつて、受光素子1の電気
信号を増幅して出力する。
FIG. 1 is a block diagram showing the configuration of an embodiment of the optical receiving circuit of the present invention. In the figure, reference numeral 1 denotes a light-receiving element made of a Ge-APD, which converts an input optical signal into an electrical signal and outputs the electrical signal. Reference numeral 2 denotes an amplifier which amplifies the electrical signal of the light receiving element 1 and outputs the amplified signal.

3は電気AGC回路であつて、増幅器2の出力によつて
増幅器2の利得を制御する自動利得制御を行う。
Reference numeral 3 denotes an electric AGC circuit that performs automatic gain control to control the gain of the amplifier 2 according to the output of the amplifier 2.

4はAPDバイアス電圧発生回路(DC/DCCONV
)であつて、電気AGC回路3の出力を直流電圧に変換
して受光素子1のバイアス電圧として供給することによ
つて受光素子1の増倍率を制御する。
4 is an APD bias voltage generation circuit (DC/DCCONV
), and the multiplication factor of the light receiving element 1 is controlled by converting the output of the electric AGC circuit 3 into a DC voltage and supplying it as a bias voltage to the light receiving element 1.

5は等化器(EQL)であつて増幅器2の出力に対する
振幅}よび位相等化を行う。
Reference numeral 5 denotes an equalizer (EQL) which performs amplitude and phase equalization for the output of the amplifier 2.

6はタイミング抽出回路(TIM)であつて、増幅器2
の出力からタイミング成分を抽出する。
6 is a timing extraction circuit (TIM), and amplifier 2
Extract the timing component from the output of .

7は識別器(DEC)であつて、等化器5の出力を識別
して2値化するとともに、フリツプフロツプを有しタイ
ミング抽出回路6のタイミング信号によつてりタイミン
グを行つて出力デイジタル信号を発生する。
A discriminator (DEC) 7 identifies and binarizes the output of the equalizer 5, and also has a flip-flop and performs timing according to the timing signal of the timing extraction circuit 6 to generate an output digital signal. Occur.

第1図の光受信回路によつて光受信号を電気信号に変換
して出力する。
The optical reception circuit shown in FIG. 1 converts the optical reception signal into an electrical signal and outputs it.

この際、受光素子1、増幅器2、電気AGC回路3、A
PDバイアス電圧供給回路4は負帰還回路を構成し、増
幅器2の利得(伝達インピーダンス)をGとしたとき、
10MG=一定になるように制御が行われることによつ
て、増幅器2の出力レベルが安点化される。従つて、増
幅器2の利得Gを温度補償することによつて、受光素子
1における増倍率Mの温度補償が行われる。第2図は増
幅器2の一部の増幅回路における温度補償を説明してい
る。
At this time, the light receiving element 1, the amplifier 2, the electric AGC circuit 3, the A
The PD bias voltage supply circuit 4 constitutes a negative feedback circuit, and when the gain (transfer impedance) of the amplifier 2 is G,
By performing control so that 10MG=constant, the output level of the amplifier 2 is lowered. Therefore, by temperature-compensating the gain G of the amplifier 2, the multiplication factor M in the light-receiving element 1 is temperature-compensated. FIG. 2 explains temperature compensation in a part of the amplifier circuit of the amplifier 2.

同図に訃いてTRlはトランジスタ、R1〜R7は抵抗
、G1はコンデンサ、Thlはサーミスタである。サー
ミスタThlはトランジスタTR,のコレクタ回路に卦
ける抵抗R5に並列に接続されていることによつて、温
度が上昇したときコレクタ負荷を小さくして利得を低下
させる。サーミスタThがエミツタ抵抗R5と並列に設
けられている場合は、温度の上昇によつて利得が上昇す
る。このような補償特性の選択は、使用するGe−AP
Dの特性によつて決定される。第2図の温度補償回路は
従来既に提案されているものである。第1図の光受信回
路に卦いては、さらに(2)式の関係を利用して、識別
器7に訃いて、最適増倍率Mと暗電流1Dに対する温度
補償が行われる。
In the figure, TRl is a transistor, R1 to R7 are resistors, G1 is a capacitor, and Thl is a thermistor. The thermistor Thl is connected in parallel to the resistor R5 in the collector circuit of the transistor TR, thereby reducing the collector load and lowering the gain when the temperature rises. When the thermistor Th is provided in parallel with the emitter resistor R5, the gain increases as the temperature increases. The selection of such compensation characteristics depends on the Ge-AP used.
It is determined by the characteristics of D. The temperature compensation circuit shown in FIG. 2 has been proposed in the past. In the optical receiving circuit shown in FIG. 1, temperature compensation for the optimal multiplication factor M and dark current 1D is performed in the discriminator 7 using the relationship of equation (2).

このような識別回路に卦ける温度補償は本発明の最も特
徴とするところである。第3図は本発明における識別器
部の温度補償の一例を説明している。
Temperature compensation for such an identification circuit is the most distinctive feature of the present invention. FIG. 3 explains an example of temperature compensation of the discriminator section in the present invention.

同図に訃いてAは演算増幅器、TRll,TRl2はト
ランジスタ、Dzはツエナダイオード、R,l〜R,9
は抵抗、Th,lはサーミスタ、Thl2はサーミスタ
またはダイオードである。第3図に卦いて演算増幅器A
、抵抗Rll〜Rl3卦よびサーミスタThllからな
る回路は、APDバイアス電圧と増倍率との関係が温度
特性を有するため、それを打ち消して増倍率の真値を得
るための温度補償を行つている。
In the same figure, A is an operational amplifier, TRll and TRl2 are transistors, Dz is a Zener diode, R, l to R, 9
is a resistor, Th,l is a thermistor, and Thl2 is a thermistor or diode. In Figure 3, operational amplifier A
, resistors Rll to Rl3, and thermistor Thll, since the relationship between the APD bias voltage and the multiplication factor has a temperature characteristic, it performs temperature compensation to cancel the relationship and obtain the true value of the multiplication factor.

すなわち同じ増倍率を得るバイアス電圧が温度によつて
上昇するのに対し、この回路の利得はサーミスタThl
lが抵抗Rl3に並列に接続されていることによつて、
温度の上昇に伴つて減少する。従つてAPDバイアス電
圧発生回路4から、受光素子1に対するAPDバイアス
電圧を増幅器Aの入力として与えることによつて、AP
Dバイアス電圧に対して温度補償を行い、これによつて
温度補償された増倍率Mに対応する電圧を増幅器Aの出
力に得る。増幅器Aの出力はツエナダイオードZDによ
つて一定電圧を減算され、抵抗Rl5と抵抗R,6訃よ
びサーミスタまたはダイオードThl2とからなる電圧
分割回路を経て、トランジスタTR,,のベースに識別
レベルに対応する電圧を発生する。従つてMの情報が識
別レベルに反映される。トランジスタTRll,TRl
2は差動的に接続されていて、端子1Nを経てTRl2
のベースに加えられている人力電圧がトランジスタTR
llのベースの識別レベルによジ比較され、トランジス
タTRllが0N,0FFすることによつて、2値化さ
れた出力信号を端子0UTに生じる。一方、トランジス
タTRllのベース回路にはサーミスタまたはダイオー
ドThl2が抵抗Rl6と接地間に挿入されている。
In other words, while the bias voltage to obtain the same multiplication factor increases with temperature, the gain of this circuit is determined by the thermistor Thl.
By connecting l in parallel to resistor Rl3,
decreases with increasing temperature. Therefore, by applying the APD bias voltage to the light receiving element 1 from the APD bias voltage generation circuit 4 as an input to the amplifier A, the AP
Temperature compensation is performed on the D bias voltage, thereby obtaining a voltage corresponding to the temperature compensated multiplication factor M at the output of the amplifier A. The output of the amplifier A is subtracted by a constant voltage by a Zener diode ZD, and then passed through a voltage divider circuit consisting of a resistor Rl5, a resistor R, and a thermistor or a diode Thl2, and then applied to the base of the transistor TR, which corresponds to the discrimination level. generates a voltage. Therefore, the information of M is reflected in the identification level. Transistors TRll, TRl
2 is differentially connected, and TRl2 is connected via terminal 1N.
The human voltage applied to the base of the transistor TR
The signal is compared with the identification level of the base of transistor TRll, and the transistor TRll is turned ON and OFF, thereby producing a binarized output signal at the terminal 0UT. On the other hand, a thermistor or diode Thl2 is inserted between the resistor Rl6 and ground in the base circuit of the transistor TRll.

従つて温度が上昇すると、トランジスタTRllのベー
ス電位は接地電位に近づき識別レベルは上昇する。この
ようにして、第3図の回路に卦いては、Ge−APDの
温度変化に基づく暗電流の変化の影響が、トランジスタ
TRllのベース電位の変化によつて補償される。第3
図に卦ける端子Nの入力電圧は、第1図に訃ける等変化
器5の出力に対応し、従つて第3図の回路によつて、最
適増倍率Mと暗電流1Dに対する温度補償を行うことが
できる。
Therefore, as the temperature rises, the base potential of the transistor TRll approaches the ground potential and the discrimination level increases. In this way, in the circuit of FIG. 3, the effect of a change in dark current due to a temperature change in the Ge-APD is compensated for by a change in the base potential of the transistor TRll. Third
The input voltage at the terminal N in the diagram corresponds to the output of the constant variable transformer 5 shown in FIG. It can be carried out.

な訃第3図においては、タイミング抽出回路6のタイミ
ング信号によつてりタイミングを行うフリツプフロツプ
部は、省略してあられされている。向、本発明をGe−
APDを例にして説明したが、他のAPDにも適用が可
能である。
In addition, in FIG. 3, the flip-flop section which performs timing according to the timing signal of the timing extraction circuit 6 is omitted. For the present invention, Ge-
Although the explanation has been given using an APD as an example, the present invention can also be applied to other APDs.

又短波長帯用の受信回路にも適用が可能である。以上説
明したように本発明の光受信回路によれば、受光素子A
PDの暗電流の温度依存性に基づいて生じる最適増倍率
Mの変化を温度補償できるだけでなく、最適増倍率Mの
変化と暗電流1Dの変化とに応じて最適識別レベルの温
度補償をも行うことができるので、極めて効果的である
It can also be applied to short wavelength band receiving circuits. As explained above, according to the optical receiving circuit of the present invention, the light receiving element A
Not only can temperature compensation be performed for the change in the optimum multiplication factor M that occurs based on the temperature dependence of the dark current of the PD, but also temperature compensation for the optimum discrimination level can be performed in accordance with the change in the optimum multiplication factor M and the change in the dark current 1D. It is extremely effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の光受信回路の一実施例の構成を示すプ
ロツク図、第2図は増幅器部の温度補償の一例を示す回
路図、第3図は識別器部の温度補補の一例を示す回路図
である。 1・・・・・・受光素子、2・・・・・・増幅器、3・
・・・・・電気AGC回路(AGC)、4・・・・・・
APDバイアス電圧発生回路(DC/DCCONV)、
5・・・・・・等化器(EQL)、6・・・・・・タイ
ミング抽出回路(TIM)、7・・・・・・識別器(D
EC)、TRl,TRll,TRl2・・・・・・トラ
ンジスタ、A・・・・・・演算増幅器、ZO・・・・・
・ツエナダイオード、R1〜R7,Rll〜Rl9・・
・・・・抵抗、C1・・・・・・コンデンサ、Thl,
Thll・・・・・・サーミスタ、Thl2・・・・・
・サーミスタまたはダイオード。
FIG. 1 is a block diagram showing the configuration of an embodiment of the optical receiver circuit of the present invention, FIG. 2 is a circuit diagram showing an example of temperature compensation in the amplifier section, and FIG. 3 is an example of temperature compensation in the discriminator section. FIG. 1... Light receiving element, 2... Amplifier, 3.
...Electric AGC circuit (AGC), 4...
APD bias voltage generation circuit (DC/DCCONV),
5... Equalizer (EQL), 6... Timing extraction circuit (TIM), 7... Discriminator (D
EC), TRl, TRll, TRl2...transistor, A...operational amplifier, ZO...
・Zena diode, R1~R7, Rll~Rl9...
...Resistance, C1 ... Capacitor, Thl,
Thll...Thermistor, Thl2...
・Thermistor or diode.

Claims (1)

【特許請求の範囲】[Claims] 1 アバランシエ・フォト・ダイオード(以下APDと
略す)を受光素子として有し該APDにおける最適増倍
率の変化を温度補償した光受信回路において、前記受光
素子の出力を識別して2値化する識別回路における識別
レベルを前記APDにおける最適増倍率と暗電流との変
化に応じて温度補償したことを特徴とする光受信回路。
1. In an optical receiving circuit that has an avalanche photo diode (hereinafter abbreviated as APD) as a light receiving element and temperature compensates for changes in the optimum multiplication factor in the APD, an identification circuit that identifies and binarizes the output of the light receiving element. 1. An optical receiver circuit, wherein the discrimination level in the APD is temperature-compensated according to changes in the optimum multiplication factor and dark current in the APD.
JP56146618A 1981-09-17 1981-09-17 optical receiver circuit Expired JPS5927136B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56146618A JPS5927136B2 (en) 1981-09-17 1981-09-17 optical receiver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56146618A JPS5927136B2 (en) 1981-09-17 1981-09-17 optical receiver circuit

Publications (2)

Publication Number Publication Date
JPS5847348A JPS5847348A (en) 1983-03-19
JPS5927136B2 true JPS5927136B2 (en) 1984-07-03

Family

ID=15411803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56146618A Expired JPS5927136B2 (en) 1981-09-17 1981-09-17 optical receiver circuit

Country Status (1)

Country Link
JP (1) JPS5927136B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011154475A1 (en) 2010-06-09 2011-12-15 Arcelik Anonim Sirketi An oven

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3283788B2 (en) 1997-05-16 2002-05-20 日本電気株式会社 Optical receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011154475A1 (en) 2010-06-09 2011-12-15 Arcelik Anonim Sirketi An oven

Also Published As

Publication number Publication date
JPS5847348A (en) 1983-03-19

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