JPS59221672A - Current detecting circuit - Google Patents

Current detecting circuit

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Publication number
JPS59221672A
JPS59221672A JP9603183A JP9603183A JPS59221672A JP S59221672 A JPS59221672 A JP S59221672A JP 9603183 A JP9603183 A JP 9603183A JP 9603183 A JP9603183 A JP 9603183A JP S59221672 A JPS59221672 A JP S59221672A
Authority
JP
Japan
Prior art keywords
source
current
transistor
mos
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9603183A
Other languages
Japanese (ja)
Inventor
Hiroshige Goto
浩成 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP9603183A priority Critical patent/JPS59221672A/en
Publication of JPS59221672A publication Critical patent/JPS59221672A/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE:To make a high-speed response possible by feeding constantly a constant-bias current to a current detecting circuit consisting of MOSFETs connected in series. CONSTITUTION:Field effect transistors MOSFETs 1 and 2 applied with bias voltages VB1 and VB2 are connected in series, and a signal current source 4 and a bias current source 6 are connected to the source of the FET2. Further, a reference power source is connected to the drain of the FET1, and a source follower circuit 5 is connected to the connection point between both FETs 1 and 2. When the signal current of the signal current source 4 and the bias current of the bias current source 6 are denoted as I and IS respectively and the gate potential of the FET1 is represented as V, the source potential VS of the FET2 is as shown by an equation (where A is a constant, L is the gate length of the FET1, and W is the gate width of the FET2), so the signal current I is calculated. Then, even when the signal current I is zero, neither of the FETs 1 and 2 enters a floating state because of the bias current IB, and a high-speed response is made possible.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はアナログMO8%積回路において微小電流を検
出する電流検出回路に関τる。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a current detection circuit for detecting minute current in an analog MO8% product circuit.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

一般にアナログMOS集積回路においては、微小電流乞
遅れ時間なく検出でることが重要である場合が多い。例
えば測光システムにおける微小光による微小電流の検出
である。
In general, in analog MOS integrated circuits, it is often important to be able to detect minute currents without any delay. An example is the detection of a minute current using a minute amount of light in a photometry system.

このような微小電流の検出に用いられる従来の電流検出
回路な第1図に示で。この電流検出回路はMOS)ラン
ジスタ1,2とソースフォロワ回路5で構成されており
、MOS)ランジスタ1゜2のゲートにはそれぞれバイ
アス電圧v、、、V、、が印加されている。MOS)ラ
ンジスタ1のドレインは基準電源に接続され、MOS)
ランジスタ1のソースとMOS)ランジスタ2のドレイ
ンが接続され、ソースフォロワ回路5はこの接続点の電
位ン検出でる。検出てべき信号電流源4は、MOSトラ
η次、夕2のソースに接続されている。このためMOS
)う沙入夕・2のソースは等節約に大きな静電容量3ン
介して接地されている。この静電容量3は検出対象であ
る微小電流が集積回路の広い領域から集められろことが
多いため、この電流の流入する、あるいは流出する領域
が広い面積にわたって存在でることにより生ずるもので
ある。MOSトランジスタ1.2のゲートにはそれぞれ
所定のバイアス刊圧Va+ r %uが印加されている
ので、MOSトランジスタ1.2は飽和領域で動作でる
A conventional current detection circuit used to detect such minute currents is shown in FIG. This current detection circuit is composed of MOS transistors 1 and 2 and a source follower circuit 5, and bias voltages v, , , V, are applied to the gates of the MOS transistors 1 and 2, respectively. MOS) The drain of transistor 1 is connected to the reference power supply, MOS)
The source of the transistor 1 and the drain of the MOS transistor 2 are connected, and the source follower circuit 5 detects the potential at this connection point. The signal current source 4 to be detected is connected to the source of the MOS transistor ηth order and source 2. For this reason, MOS
) The source of 2 is grounded through a large capacitance 3 to save energy. This capacitance 3 is generated because the small current to be detected is often collected from a wide area of the integrated circuit, and the area into which this current flows in or out exists over a wide area. Since a predetermined bias voltage Va+ r %u is applied to the gates of the MOS transistors 1.2, the MOS transistors 1.2 operate in the saturation region.

この従来の電流検出回路の動作を説明でる。信号電流源
4による電流′lfIとでると、定常状態ではMOSト
ランジスタ1のソースのtJt 位Vsは、MOSトラ
ンジスタ1が飽和状態で動作しているので、次式の如く
なる。
The operation of this conventional current detection circuit will now be explained. When the current 'lfI from the signal current source 4 is generated, the tJt level Vs of the source of the MOS transistor 1 in a steady state becomes as shown in the following equation since the MOS transistor 1 operates in a saturated state.

Vs =vo −A (L/W >JT      −
(1)ただし、 Vo+XMOS )ランジスタ1のゲ
ートの電位、LおよびWはそれぞれMOS トランジス
タ1のゲート長とゲート幅、Aは酸化膜厚等で錠まる定
数である。ソースフォロワ回路5により(1)式の電位
変化?検出丁れば、電流値■がわかる。
Vs = vo −A (L/W > JT −
(1) However, Vo+XMOS) The potential of the gate of the transistor 1, L and W are the gate length and gate width of the MOS transistor 1, respectively, and A is a constant determined by the oxide film thickness, etc. Potential change in equation (1) due to source follower circuit 5? If detected, the current value (■) can be determined.

しかしながら、この従来の電流検出回路では次のよ5な
問題点がある。丁なわち、信号電流源4から信号電流の
供給がない場合は信号電流源4の出力端が開方状態とな
り、MOS)ランジスタ1゜2のソースがフローティン
グ状態となる。そのため、このソース領域は熱電子放出
等の効果によって電位が上昇する。したがって再び信号
電流源4から信号電流が通流しはじめても、まずMOS
トランジスタ20ンースの電位ン下降させて、続いてM
OS)ランジスタ1のソースの電位を下降させた後、は
じめて(1)式であられされる゛電位を検出することが
できる。このようにこの電流検出回路では検出に不感時
間があるため、急速な応答が要求されるシステムでは用
いることができなかったわ〔発明の目的〕 本発明は上記事情?青磁してなされたもので、不感時間
のない高速応答が可能な電流検出回路?提供することン
目的とする。
However, this conventional current detection circuit has the following five problems. That is, when no signal current is supplied from the signal current source 4, the output end of the signal current source 4 is in an open state, and the source of the MOS transistor 1.2 is in a floating state. Therefore, the potential of this source region increases due to effects such as thermionic emission. Therefore, even if the signal current starts to flow from the signal current source 4 again, first the MOS
The potential of transistor 20 is lowered, and then M
Only after lowering the potential of the source of transistor 1 (OS) can the potential given by equation (1) be detected. As described above, this current detection circuit has a dead time in detection, so it could not be used in a system that requires a rapid response. [Objective of the Invention] The present invention does not meet the above-mentioned circumstances. A current detection circuit made of celadon and capable of high-speed response with no dead time? The purpose is to provide.

〔発明の概要〕[Summary of the invention]

この目的を達成するために本発明による電流検出回路は
、常に一定のバイアス電流Y通流でるバイアス電流源7
備えたことを特徴とfる。
To achieve this purpose, the current detection circuit according to the present invention uses a bias current source 7 that always passes a constant bias current Y.
It is characterized by the fact that it is equipped with

〔発明の実施例〕[Embodiments of the invention]

以下本発明ン図示の一実施例に基づいて説明する。第2
図に本実施例による電流検出口Wjt示す。この電流検
出回路も従来と同様に、MOS)ランジスタ1,2とソ
ースフォロワ回路5で構成されており、さらにバイアス
電流源6ン有している点に特徴がある。MOS)ランジ
スタ1.2はソノケートに加えられたバイアスミL圧v
B、 、 v82により飽和領域で動作てる。MOS)
ランジスタ1のドレインは基準電源に接続され、MOS
)ランジスタ1のソースとMOS)ラン′ジスタ2のド
レインが接続されている。この接続点の電位ケ検出でる
ソースフォロワ回路5は、D/l08)ランジスタ5a
とMOS)ランジスタ5bにより構成されている。検出
丁べき信号電流源4はMOS)ランジスタ2のソースに
接続されており、バイアス直流源6も同じくMOSトラ
ンジスタ2のソースに接続されている。なお、この電流
検出回路においてもMOS)ランジスタ2のソースに等
測的に太きな静電容量3乞介して接地されている。
The present invention will be explained below based on an illustrated embodiment. Second
The figure shows a current detection port Wjt according to this embodiment. This current detection circuit is also comprised of MOS transistors 1 and 2 and a source follower circuit 5, as in the prior art, and is further characterized in that it has a bias current source 6. MOS) The transistor 1.2 is the bias L pressure v applied to the sonocate.
B, , v82 is operating in the saturation region. MOS)
The drain of transistor 1 is connected to the reference power supply, and the MOS
) The source of transistor 1 and the drain of transistor 2 are connected. The source follower circuit 5 that detects the potential of this connection point is a transistor 5a
and MOS) transistor 5b. A signal current source 4 to be detected is connected to the source of the MOS transistor 2, and a bias DC source 6 is also connected to the source of the MOS transistor 2. In this current detection circuit as well, the source of the MOS transistor 2 is grounded via a thick capacitor 3 equimetrically.

次に本実施例による電流検出回路の動作を説明する。測
定丁べき信号電流源4の信号電流YI。
Next, the operation of the current detection circuit according to this embodiment will be explained. Signal current YI of signal current source 4 to be measured.

バイアス電流源6のバイアス電流%’Iaと′4−ると
(1)式と同様に次式が成立てる。
When the bias current %'Ia and '4- of the bias current source 6 are calculated, the following equation is established similarly to equation (1).

V8=V−A(L/W)ET−・・・(2)バイアス電
流■8はあらかじめわかっているから。
V8=V-A(L/W)ET-...(2) Bias current ■8 is known in advance.

ソースフォロワ回路5によりMOSトランジスタ2のソ
ースの電位VsY検出てれば、(2)式により信号電流
工がわかる。そして信号電流の供給がない場合でも、バ
イアス電流源6から常にバイアス直流IIlカ供給され
ているからMOS)ランジスタ1.2のソースがフロー
ティング状態になることはなく、この電流検出回路は常
に検出可能な定常状態となっている。したがって信号電
流がJib流丁れば不感時間がなく直ちに検出できる。
If the potential VsY of the source of the MOS transistor 2 is detected by the source follower circuit 5, the signal current factor can be determined from equation (2). Even when no signal current is supplied, the bias DC current is always supplied from the bias current source 6, so the source of the MOS transistor 1.2 will never be in a floating state, and this current detection circuit can always detect the current. It is in a steady state. Therefore, if the signal current is JIB style, there is no dead time and it can be detected immediately.

集積回路化した場合のバイアス電流源6の具体例ン第3
図、第4図に示す。第3図の具体例はMOSトランジス
タ7により構成されており、そのソースは接地され、ゲ
ートには所定のバイアス電。
Specific example of bias current source 6 when implemented as an integrated circuit Part 3
It is shown in Fig. 4. The specific example shown in FIG. 3 is composed of a MOS transistor 7, whose source is grounded and whose gate is connected to a predetermined bias voltage.

圧Ve 力印加され、ドレインはMOS)ランジスタ2
のソースに接続されている。バイアス電圧Vs Y調節
することによりバイアス電流Is乞制御できる。
Pressure Ve force is applied, drain is MOS) transistor 2
connected to the source. The bias current Is can be controlled by adjusting the bias voltage VsY.

第4図に示す具体例はMOS)ランジスタ8により構成
され、そのソース、ゲートは共に接地され、ドレインは
MOSトランジスタ2J、ノースに接続されている。ゲ
ート下の1燭値゛成圧Y例えばイオン・インプランテー
ション等の1呵値制御手段ICJ−って制御して、バイ
アス電流1.I’l調節できる。
The specific example shown in FIG. 4 is composed of a MOS transistor 8, whose source and gate are both grounded, and whose drain is connected to the MOS transistor 2J, north. The bias current 1.0 is controlled by a value control means ICJ, such as ion implantation, for example, for ion implantation. I'l can be adjusted.

なお、本発明による′電流検出回路はnチャンネル集積
回路によってもPチャ〉・ネル集、債回路によっても同
泌に実現できることはいうまでもない。
It goes without saying that the current detection circuit according to the present invention can be realized simultaneously by an n-channel integrated circuit, a p-channel integrated circuit, or a bonded circuit.

〔発明の効用〕[Efficacy of invention]

以上の通り、本発明によれば、遅れ時間なく、倣小成流
ケ簿出てろことが可能であり、高速応答が要求されるd
411光システムの電流検出装置として最適である−
As described above, according to the present invention, it is possible to output a small copy flow without delay time, and d
Ideal as a current detection device for the 411 optical system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電流検出回路の回路図、第2図は本発明
の一実施例による電流検出回りの回路図、第3図、第4
図はそれぞれ同電流検出回路のバイアス電流源の具体例
ン示す回路図である。 1.2・・・MOS)ランジスタ、3・・・n’t6@
1.1・・・信号電流源、5・・・ソースフォロワ回路
、6・・・バイアス電流源。 出願人代理人   猪  股     清第1図 手続補正書(方式) 昭和困年・・9月2日 特許庁長官   若 杉 和 夫 殿 1、事件の表示 昭和団年特許願第96031号 2、発明の名称 電流検出回路 3、補正をする者 事件との関係 特許出願人 (307)東京芝浦電気株式会社
Fig. 1 is a circuit diagram of a conventional current detection circuit, Fig. 2 is a circuit diagram of a current detection circuit according to an embodiment of the present invention, Figs.
Each figure is a circuit diagram showing a specific example of a bias current source of the same current detection circuit. 1.2...MOS) transistor, 3...n't6@
1.1... Signal current source, 5... Source follower circuit, 6... Bias current source. Applicant's agent Kiyoshi Inomata Figure 1 procedural amendment (method) September 2nd, 1947 Director-General of the Patent Office Kazuo Wakasugi 1, Indication of the case Showa Dan Patent Application No. 96031 2, Invention Name Current Detection Circuit 3, Relationship with the Amended Person Case Patent Applicant (307) Tokyo Shibaura Electric Co., Ltd.

Claims (1)

【特許請求の範囲】 ゲートに所定のバイアス電圧が印加され、ドレインが基
準電源に接続された第1のMOS)ランジスタと、ゲー
トに所定のバイアス電圧が印加され、ドレインが前記第
1のMOS)ランジスタのソースに接続された第2のM
OS)ランジスタと、この第2のMOS)ランジスタの
ドレインの電位変化ケ検出てる電位検出手段と?備え、
前記第2のMOS)ランジスタのソースに流入でる信号
電流を前記電位検出手段により検出てる電流検出回路に
おいて、 前記第2のMOS )ランジスタのソースに常に一定の
バイアス電流ケ流入させるバイアス電流源を備えたこと
?特徴とする′電流検出回路。
[Scope of Claims] A first MOS (MOS transistor) transistor whose gate has a predetermined bias voltage applied thereto and whose drain is connected to a reference power supply; A second M connected to the source of the transistor
OS) transistor and potential detection means that detects potential changes at the drain of this second MOS) transistor? Prepare,
The current detection circuit detects a signal current flowing into the source of the second MOS transistor by the potential detection means, further comprising a bias current source that always causes a constant bias current to flow into the source of the second MOS transistor. Was it? Features: Current detection circuit.
JP9603183A 1983-05-31 1983-05-31 Current detecting circuit Pending JPS59221672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9603183A JPS59221672A (en) 1983-05-31 1983-05-31 Current detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9603183A JPS59221672A (en) 1983-05-31 1983-05-31 Current detecting circuit

Publications (1)

Publication Number Publication Date
JPS59221672A true JPS59221672A (en) 1984-12-13

Family

ID=14154045

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9603183A Pending JPS59221672A (en) 1983-05-31 1983-05-31 Current detecting circuit

Country Status (1)

Country Link
JP (1) JPS59221672A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04343034A (en) * 1991-05-17 1992-11-30 Honda Motor Co Ltd Semiconductor sensor
KR100702810B1 (en) * 1998-06-09 2007-04-03 코닌클리케 필립스 일렉트로닉스 엔.브이. Current measuring device and telephone terminal using such a current measuring device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04343034A (en) * 1991-05-17 1992-11-30 Honda Motor Co Ltd Semiconductor sensor
KR100702810B1 (en) * 1998-06-09 2007-04-03 코닌클리케 필립스 일렉트로닉스 엔.브이. Current measuring device and telephone terminal using such a current measuring device

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