JPS59219017A - Analog-digital converter - Google Patents
Analog-digital converterInfo
- Publication number
- JPS59219017A JPS59219017A JP9354283A JP9354283A JPS59219017A JP S59219017 A JPS59219017 A JP S59219017A JP 9354283 A JP9354283 A JP 9354283A JP 9354283 A JP9354283 A JP 9354283A JP S59219017 A JPS59219017 A JP S59219017A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- current
- output
- converter
- photocoupler
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Description
【発明の詳細な説明】
（ａ）１発明の技術分野
本発明はＡ／Ｄ変換器に係り、特に電流値検出用の簡易
型Ａ／Ｄ変換器に関するものである。DETAILED DESCRIPTION OF THE INVENTION (a) 1. Technical Field of the Invention The present invention relates to an A/D converter, and particularly to a simple A/D converter for detecting a current value.
（ｂ）、従来技術と問題点
第１図は従来のＡ／Ｄ変換器の一実施例を示すブロック
図である。(b), Prior Art and Problems FIG. 1 is a block diagram showing one embodiment of a conventional A/D converter.
図中、１は発振器、２は鋸状波発生回路、３はコンパレ
ータ、４はゲート、５ば計数器、６は制御回路である。In the figure, 1 is an oscillator, 2 is a sawtooth wave generating circuit, 3 is a comparator, 4 is a gate, 5 is a counter, and 6 is a control circuit.
以下第１図に従って従来のＡ／Ｄ変換器の詳細を説明す
る。The details of a conventional A/D converter will be explained below with reference to FIG.
上記Ａ／Ｄ変換器は電圧一時間変換系のＡ／Ｄ変換器で
、ＩＮ端子に被測定電圧が印加される。制御回路６によ
り、鋸状波発生回路２を動作させると同時にゲート４を
開き、発振器１の出力を計数器５に入力し、計数を開始
する。The A/D converter is a one-time voltage conversion type A/D converter, and the voltage to be measured is applied to the IN terminal. The control circuit 6 operates the sawtooth wave generating circuit 2 and at the same time opens the gate 4, inputs the output of the oscillator 1 to the counter 5, and starts counting.
鋸状波発生回路２の出力電圧が時間と共に増大し、鋸状
波電圧と入力電圧が等しくなったことをコンパレーク３
は検出し、ゲー１−４を閉じる。此の間に計数器５が計
数した発振器１の出力パルス数が被測定電圧に比例して
いる。The output voltage of the sawtooth wave generation circuit 2 increases over time, and the comparator 3 detects that the sawtooth wave voltage and the input voltage have become equal.
is detected and game 1-4 is closed. During this period, the number of output pulses from the oscillator 1 counted by the counter 5 is proportional to the voltage to be measured.
此のＡ／Ｄ変換器の精度を決定する要因の一つはコンパ
レータ３で、本Δ／Ｄ変換器の重要な構成要素である。One of the factors that determines the accuracy of this A/D converter is the comparator 3, which is an important component of this Δ/D converter.
従来のＡ／Ｄ変換器は此の様にオペ・アンプをコンバレ
ータとして使用して基準電圧と比較しているが、オペ・
アンプは価格の高いと云う欠点がある。Conventional A/D converters use an operational amplifier as a converter to compare with the reference voltage, but the operational amplifier
The disadvantage of amplifiers is that they are expensive.
（Ｃ）１発明の目的
本発明の目的は従来技術の有する上記の欠点を除去し、
オペ・アンプを使用しない簡易型で且つ低価格のＡ／Ｄ
変換器を提供することである。(C)1 Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art;
A simple and low-cost A/D that does not use an operational amplifier
The purpose of the present invention is to provide a converter.
（ｄ）０発明の構成
上記の目的は本発明によれば、被測定電流をフォトカプ
ラの入力側に流し、出力側の一端を接地し、他端を抵抗
の一端に接続し、前記抵抗の他端をＡ点とし、前記Ａ点
と或一定電圧電源の出力端子と間に、所定の抵抗と半導
体スイッチを直列に接続した回路を複数個並列にして接
続し、制御回路を制御して順次前記半導体スイッチをオ
ンし、前記所定の抵抗と前記半導体スイッチの接続点の
電圧を所定の基準電圧と一定のスレッシュ・ホールド値
を有するオア・ゲートにより比較することを特徴とする
Ａ／Ｄ変換器を提供することにより達成される。(d) 0 Structure of the Invention According to the present invention, the current to be measured is passed through the input side of the photocoupler, one end of the output side is grounded, and the other end is connected to one end of the resistor. The other end is set as point A, and between the point A and the output terminal of a certain constant voltage power supply, a plurality of circuits each having a predetermined resistor and a semiconductor switch connected in series are connected in parallel, and the control circuit is controlled to sequentially The A/D converter is characterized in that the semiconductor switch is turned on and the voltage at the connection point of the predetermined resistor and the semiconductor switch is compared with a predetermined reference voltage by an OR gate having a constant threshold value. This is achieved by providing
（ｅ）０発明の実施例
第２図は本発明の一実施例を示す図である。図中、ＴＲ
Ｉ、ＴＲ２、−・ＴＲｎは夫々スイッチング・トランジ
スタ、Ｒ１、Ｒ２、・・Ｒｎは夫々抵抗、ＲＯは抵抗、
ＩＣはフォトカプラ、Ｇはオア・ゲート、Ｃ０ＮＴは制
御部、Ｘは被４（す定物、電源電圧は＋５■である。(e) 0 Embodiment of the Invention FIG. 2 is a diagram showing an embodiment of the invention. In the figure, TR
I, TR2, - TRn are switching transistors, R1, R2,...Rn are resistors, RO is a resistor,
IC is a photocoupler, G is an OR gate, C0NT is a control section, and X is a constant object, and the power supply voltage is +5.
本発明はオペ・アンプを使用することなく、トランジス
タのスイッチングを利用した簡単な回路構成で電流値を
Ａ／Ｄ変換出来る様にし、又フォトカプラを使用する為
、被測定系と測定系を電気的に分離出来る利点がある。The present invention enables A/D conversion of current values with a simple circuit configuration using transistor switching without using an operational amplifier, and uses a photocoupler to electrically connect the system under test and the measurement system. It has the advantage of being able to be separated.
第２図に於いて、アナログ電流値Ｉｆをディジクル値に
変換する方法に就いて説明する。Referring to FIG. 2, a method of converting an analog current value If into a digital value will be explained.
フォトカプラＩＣの電流伝達率をβとすると、フォトカ
プラＩＣの入力電流Ｉｆに対し、出力側の電流はＩｆ・
βとなる。If the current transfer rate of the photocoupler IC is β, then the current on the output side is If・
Becomes β.
今制御部Ｃ０ＮＴの出力Ｐｉをハイ・レベルとする。Now, the output Pi of the control unit C0NT is set to high level.
制御部の出力Ｐｉがハイ・レベルであるので、トランジ
スタＴＲ４はオンの状態となり、ゲートＧの０１人力の
電位Ｖｉは次式で与えられる。Since the output Pi of the control section is at a high level, the transistor TR4 is turned on, and the potential Vi of the 01 voltage of the gate G is given by the following equation.
Ｖｉ−５−β・Ｉｆ・Ｒｉ （１）今Ｒ１＜
Ｒ２＜Ｒ３＜ −・−＜Ｒｎ （２）と設定すれば
、
Ｖｌ＞Ｖ２＞Ｖ３＞・−・＞Ｖｎ （３）となる。Vi-5-β・If・Ri (1) Now R1<
If R2<R3<--.-<Rn (2), then Vl>V2>V3>.-->Vn (3).
従って制御部Ｃ０ＮＴの出力ＰｉをＰｌから順次Ｐ２、
Ｒ３・・・・Ｐｎをハイ・レベルとする。Therefore, the output Pi of the control unit C0NT is sequentially changed from P1 to P2,
R3... Sets Pn to high level.
ゲー１−Ｇはオア・ゲートで、何れかの入力電圧が成る
値（スレッシュ・ホールド値）を越すと出力信号を出す
回路である。ゲートＧの出力Ｖｏｕｔがロー・レベルに
反転するｉを求めれば、電流値Ｉｆを求めることが出来
る。Gate 1-G is an OR gate, which is a circuit that outputs an output signal when any input voltage exceeds a certain value (threshold value). By finding i at which the output Vout of the gate G is inverted to a low level, the current value If can be found.
例えば、ゲートＧのスレッシュ・ホールド値を２゜５■
とすれば、（１）式より
２．５／（β・Ｒｉ） ＜ Ｉ ｆ ＜２．５／ （β
・Ｒｉ）となり、電流値Ｉｆのディジタル変換が可能と
なる。For example, set the threshold value of gate G to 2°5■
Then, from equation (1), 2.5/(β・Ri) < I f <2.5/ (β
・Ri), and digital conversion of the current value If becomes possible.
此の様に制御部Ｃ０ＮＴの出力ＰｉをＰｌから順次Ｐ２
、Ｒ３・・・・Ｐｎをハイ・レベルとし、ゲートＧの出
力Ｖｏｕｔがロー・レベルに反転するｉを求めれば、被
測定電流は、ｉとｉ−１の間にあることが判る。In this way, the output Pi of the control unit C0NT is sequentially changed from P1 to P2.
, R3, . . . Pn are set to a high level, and if i is determined at which the output Vout of the gate G is inverted to a low level, it is found that the current to be measured is between i and i-1.
（ｆｌ、発明のりＪ果
以上詳細に説明した様に本発明によれば、オペ・アンプ
使用しない簡単なＡ／Ｄ変換器が実現出来ると云う大き
い効果がある。(Fl. Results of the Invention) As explained in detail above, the present invention has the great effect of realizing a simple A/D converter that does not use an operational amplifier.
第１図は従来のＡ／Ｄ変換器の一実施例を示すブロフク
図である。
第２図は本発明の一実施例を示す図である。FIG. 1 is a block diagram showing one embodiment of a conventional A/D converter. FIG. 2 is a diagram showing an embodiment of the present invention.
Claims (1)
端を接地し、他端を抵抗の一端に接続し、前記抵抗の他
端をＡ点とし、前記Ａ点と或一定電圧電源の出力端子と
間に、所定の抵抗と半導体スイッチを直列に接続した回
路を複数個並列にして接続し、制御回路を制御して順次
前記半導体スイッチをオンし、前記所定の抵抗と前記半
導体スイッチの接続点の電圧を所定の基準電圧と一定の
スレッシュ・ホールド値を有するオア・ゲートにより比
較することを特徴とするＡ／Ｄ変換器。The current to be measured is passed through the input side of the photocoupler, one end of the output side is grounded, the other end is connected to one end of a resistor, the other end of the resistor is set as a point A, and the output of a constant voltage power source is connected to the point A. A plurality of circuits in which a predetermined resistor and a semiconductor switch are connected in series are connected in parallel between the terminal and a control circuit is controlled to sequentially turn on the semiconductor switches, thereby connecting the predetermined resistor and the semiconductor switch. An A/D converter, characterized in that a voltage at a point is compared with a predetermined reference voltage by an OR gate having a constant threshold value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9354283A JPS59219017A (en) | 1983-05-27 | 1983-05-27 | Analog-digital converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9354283A JPS59219017A (en) | 1983-05-27 | 1983-05-27 | Analog-digital converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59219017A true JPS59219017A (en) | 1984-12-10 |
Family
ID=14085156
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9354283A Pending JPS59219017A (en) | 1983-05-27 | 1983-05-27 | Analog-digital converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59219017A (en) |
-
1983
- 1983-05-27 JP JP9354283A patent/JPS59219017A/en active Pending
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