JPS59212038A - Receiver - Google Patents

Receiver

Info

Publication number
JPS59212038A
JPS59212038A JP8676283A JP8676283A JPS59212038A JP S59212038 A JPS59212038 A JP S59212038A JP 8676283 A JP8676283 A JP 8676283A JP 8676283 A JP8676283 A JP 8676283A JP S59212038 A JPS59212038 A JP S59212038A
Authority
JP
Japan
Prior art keywords
level
tuning circuit
signal
amplification stage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8676283A
Other languages
Japanese (ja)
Other versions
JPH0155790B2 (en
Inventor
Shintaro Gomi
伸太郎 五味
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp, Pioneer Electronic Corp filed Critical Pioneer Corp
Priority to JP8676283A priority Critical patent/JPS59212038A/en
Publication of JPS59212038A publication Critical patent/JPS59212038A/en
Publication of JPH0155790B2 publication Critical patent/JPH0155790B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3052Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver

Landscapes

  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE:To prevent the cross modulation disturbance of an electronic tuning circuit excellently by detecting the RF signal level of an RF amplification stage having the electronic tuning circuit and the signal level passed through the IF amplification stage, and controlling an antenna reception input level according to both detection output and performing AGC. CONSTITUTION:The RF signal level of the RF amplification stage 3 which has the electronic tuning circuit 2 consisting of a varicap and a coil and the level of the signal passed through the IF amplification stage are detected by level detectors 14 and 11 respectively, and AGC is performed so that the level of an antenna reception input is controlled according to the state of both detection outputs, thus obtaining a receiver which has no cross modulation disturbance.

Description

【発明の詳細な説明】 本発明は受信機に明し、特にAGG (自動利得制御)
機能を有する受信機に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to a receiver, in particular an AGG (automatic gain control)
The present invention relates to a receiver having functions.

かかる受信機の一例が米国特許第3.94.7゜771
号明細書に開示されており、第1図はその概略ブロック
図であり、アンテナからの受信RF(高周波)信号は可
変減衰器(ATT)1を介してアンテナ同調回路2へ入
力される。この同調出力はR「アンプ3において増幅さ
れRF同調回路4に入力されて、所甲のR「信号が選択
的に導出される。RF倍信号ミキサ5において、局部発
振器6よりの局発信号と混合され周波数変換される。
An example of such a receiver is U.S. Patent No. 3.94.7°771.
1 is a schematic block diagram thereof, and a received RF (high frequency) signal from an antenna is input to an antenna tuning circuit 2 via a variable attenuator (ATT) 1. This tuned output is amplified by the R amplifier 3 and inputted to the RF tuning circuit 4, where the R signal shown above is selectively derived. mixed and frequency converted.

このミキサ出力がIF(中間周波)同調回路7へ導入さ
れ、I[信号のみが導出される。更にIFフィルタ8を
経てIF増幅機能及び検波機能を有するアンプ9へ入力
されるようになっている。
This mixer output is introduced into an IF (intermediate frequency) tuning circuit 7, and only the I[ signal is derived. Further, the signal is inputted through an IF filter 8 to an amplifier 9 having an IF amplification function and a detection function.

ミキサ5の出力信号レベルをレベル検出器10により検
出し、またT F−BPF8を経たIF信号レベルをレ
ベル検出器11により検出するようになっている。雨検
出出力が2人カゲート12に入力され、このゲート出力
がDCアンプ13により増幅されてATTlの減衰部制
御信号となっている。
A level detector 10 detects the output signal level of the mixer 5, and a level detector 11 detects the IF signal level that has passed through the TF-BPF 8. The rain detection output is input to the two-person gate 12, and this gate output is amplified by the DC amplifier 13 and becomes the attenuation section control signal of ATT1.

かかる構成において、いまアンテナから強い非希望波が
入力されると、フロントエンド部の非直線性に起因して
相互変調が生じ、この相互変調成分が希望波チャンネル
内に混入する。そこで、周波数選択回路である同調回路
7及び狭帯域TF−r3PF8を通らないミキサ5の出
力段からレベル検出器10にJ:り広帯域レベル検出を
行なってアンテナ入力段のATTlの減衰量を制御して
AGCをかけるようにしている。しかし、この場合、非
希望波が一波であっても八〇〇がかかることになり、A
 G Cを必要としないにもかかわらずAGCがかかっ
てしまうという不都合を生じる。
In such a configuration, when a strong undesired wave is input from the antenna, intermodulation occurs due to the nonlinearity of the front end section, and this intermodulation component mixes into the desired wave channel. Therefore, wideband level detection is performed from the output stage of the mixer 5 that does not pass through the tuning circuit 7, which is a frequency selection circuit, and the narrowband TF-r3PF 8 to the level detector 10 to control the attenuation amount of ATTl at the antenna input stage. I am trying to apply AGC. However, in this case, even if there is only one undesired wave, it will cost 800 yen, and A
This causes the inconvenience that AGC is applied even though GC is not required.

従って、狭帯域I F−r3PF8を経たアンプ9の出
力段よりレベル検出器11にてレベル検出を行ない、希
望波チャンネルのレベル検出出力と先の広帯域レベル検
出器10の出力とのレベル状態に応じてATTlの減衰
量制御を行なうようにし、フロントエンド部が直線性を
麗持する範囲まで信号を減衰させ相互変調妨害を妨いで
いるのである。
Therefore, the level detector 11 detects the level from the output stage of the amplifier 9 which has passed through the narrowband I F-r3PF8, and the level is detected according to the level state of the level detection output of the desired wave channel and the output of the wideband level detector 10. The attenuation amount of ATTl is controlled by the front end section, and the signal is attenuated to a range that maintains linearity, thereby preventing intermodulation interference.

この様な相互変調妨害を生じる部分は、主体的にミキサ
5の非直a牲素子であり、第1図のAGC方式によりこ
のミキサ段により生じる相互変調は相当効果的に排除さ
れるものである。
The part that causes such intermodulation interference is mainly the non-direction element of the mixer 5, and the AGC method shown in Fig. 1 can fairly effectively eliminate the intermodulation caused by this mixer stage. .

しかし、近時においては、ミキサ段のダイナミックレン
ジが大幅に改善されており、一方、アンテナ同調回路2
やRF同調回路4に電子同調用可変容量ダイオード(以
下単にバリキャップと称す)が使用されている現状では
、フロントエンドにおいて相互変調に弱い部分はミキサ
段ではなくむしろ上述のバリキャップとなっている。か
かる場合には、第1図のAGC方式では効果的に作用し
ない。なぜならば、バリキャップを使用した電子同調回
路は妨害波がミキサ段に入力されるのを阻止しつつ自分
自身が相互変調を起してしまうからである。
However, in recent years, the dynamic range of the mixer stage has been significantly improved, and on the other hand, the antenna tuning circuit 2
In the current situation where electronic tuning variable capacitance diodes (hereinafter simply referred to as varicaps) are used in the RF tuning circuit 4 and the RF tuning circuit 4, the part vulnerable to intermodulation in the front end is not the mixer stage but rather the varicaps mentioned above. . In such a case, the AGC method shown in FIG. 1 does not work effectively. This is because electronic tuning circuits using varicaps themselves cause intermodulation while blocking interference waves from being input to the mixer stage.

以下に、この電子同調回路の相互変調発生原因につき第
2図を用いて理論的に説明する。第2図はバリキャップ
CにRF信号υとチューニング電圧Voとが重畳して印
加された場合の等価回路であり、バリキャップにおいて
次式が成立する。
Below, the causes of intermodulation in this electronic tuning circuit will be theoretically explained using FIG. 2. FIG. 2 shows an equivalent circuit when the RF signal υ and the tuning voltage Vo are superimposed and applied to the varicap C, and the following equation holds true in the varicap.

Q=C(U+■o )・・・・・・ (1)ここに、Q
は充電電荷である。(1)式において、11+Vo=V
とおいて、高周波電流」を求めると、i =d Q/d
t=d CV/rlt−C−d V/dt+V−d C
/dt−〇−d V/dt十V (d  C/+I V
)(d V/dt) = (C+V・d C/dt)  (d V/dt)・
・・・・・(2) となる。バリキャップ容IC(V)は次式で示される。
Q=C(U+■o)... (1) Here, Q
is the charging charge. In formula (1), 11+Vo=V
Then, to find the high frequency current, i = d Q/d
t=d CV/rlt-C-d V/dt+V-d C
/dt-〇-d V/dt10V (d C/+I V
) (d V/dt) = (C+V・d C/dt) (d V/dt)・
...(2) becomes. The varicap capacity IC(V) is expressed by the following formula.

C(V)=C(0)/(1+V/ψ戸 ・・・・・・(3) ここに、ψ、nは定数、C(0)はV=0の場合の容量
であり、これらはバリキャップの構造により定まる。(
3)式を変形すると、 C(V)= (C(0)/ (1+VO,’φ) )・
(1/ (1+1J/ (Φ+Vo))  )・・・・
・・(4) となり、0〈1J/(φ+Vo )<1であるから、5
− (4)式は次式となる。
C(V)=C(0)/(1+V/ψdoor...(3) Here, ψ and n are constants, C(0) is the capacitance when V=0, and these are Determined by the structure of the varicap. (
3) Transforming the equation, C(V)= (C(0)/(1+VO,'φ))・
(1/ (1+1J/ (Φ+Vo)) )...
...(4) Since 0<1J/(φ+Vo)<1, 5
- Equation (4) becomes the following equation.

C(V)= (C(0)/ (1+Vo/ψ) )−(
1−n  1J /(ψ + Vo  )  +  (
n   (1+  1)/2!)・(’?//(ψ+V
o))?−(n   (n+  1)   (n+  
2)  /3 1  )   ・  (’U/(ψ+V
o))’+・・・・・・〕・・・・・・(5)すなわち
、(5)式の2次、3次、・・・・・・の項が非直線部
分となって相互変調を起こすことになるのである。
C(V)=(C(0)/(1+Vo/ψ))−(
1-n 1J/(ψ + Vo) + (
n(1+1)/2! )・('?//(ψ+V
o))? −(n (n+ 1) (n+
2) /3 1) ・ ('U/(ψ+V
o))'+・・・・・・〕・・・・・・(5) In other words, the quadratic, cubic, etc. terms of equation (5) become non-linear parts and interact with each other. This will cause modulation.

このように、フロントエンド内の電子同調回路を構成す
るバリキャップの非直線に起因して相互変調が発生する
ことから、第1図の如くミキサ段におけるレベル検出を
行なってAGCをかけても当該フロントエンド部におけ
る相互変調を防ぐことはできない。特に、(5)式から
判るようにRF信号Mが大なる場合には当該相互変調の
発生は顕著となる。
In this way, intermodulation occurs due to the non-linearity of the varicaps that make up the electronic tuning circuit in the front end, so even if level detection is performed at the mixer stage and AGC is applied as shown in Figure 1, the problem will not be affected. Intermodulation at the front end cannot be prevented. In particular, as can be seen from equation (5), when the RF signal M becomes large, the occurrence of the intermodulation becomes remarkable.

そこで、本発明はかかる従来例の欠点を除くためになさ
れたもので、その目的とするところは、フロントエンド
内の電子同調回路において生ずる6− 相互変調妨害を自りYに防止することができるAGCシ
ステムを右する受信機を提供することにある。
Therefore, the present invention has been made to eliminate such drawbacks of the conventional example, and its purpose is to automatically prevent intermodulation interference occurring in the electronic tuning circuit in the front end. The object of the present invention is to provide a receiver that supports an AGC system.

本発明による受fM 機はバリキャップ可変容品ダイオ
ード)と]イルとからなる電子同調回路を有するRF増
幅段のRF信号レベルと、1F増幅段を経た信号のレベ
ルとを夫々検出して雨検出出力状態に応じてアンテナ受
信入力のレベルを制御するようにしてΔ〇Gをかけるよ
うにしたことを特徴としている。
The FM receiver according to the present invention detects rain by detecting the RF signal level of the RF amplification stage having an electronic tuning circuit consisting of a varicap variable cap diode) and a 1F amplification stage, and the level of the signal passed through the 1F amplification stage. The antenna is characterized in that the level of the antenna reception input is controlled according to the output state and multiplied by Δ〇G.

以下に本発明につき図面を用いて説明する。The present invention will be explained below with reference to the drawings.

第3図は本発明の実施例のブロック図であり、第1図と
同等部分は同−n8により示されている。
FIG. 3 is a block diagram of an embodiment of the present invention, and portions equivalent to those in FIG. 1 are indicated by -n8.

第1図と異なる部分についてのみ述べるに、本例ではR
「アンプ3の出力段からR[レベルを検出すべくレベル
検出器14を設けている。このRFレベル検出出力と、
■「レベル検出器11の検出出力とが2人カゲート12
02人力となり、このゲート出力がDCアンプ13を介
しτATT1の減衰6)制御のための制御入力となるも
のである。
In this example, R
A level detector 14 is provided to detect the R level from the output stage of the amplifier 3.This RF level detection output and
■“The detection output of the level detector 11 and the two-person gate 12
02 manual power, and this gate output becomes a control input for attenuation 6) control of τATT1 via the DC amplifier 13.

ここで、電子同調回路のQ(尖鋭度)と相互変調との関
係を考察すべく、第4図の等価回路を参照する。電子同
調回路の等価回路は第4図(A>の如くなり、更にその
等価回路を示せば図(B)の如くなる。ここに、Viは
入力電圧、■0は出力電圧、Rは信号源抵抗等を含む一
次抵抗、Cはバリキャップ容量、Yはコイルのアドミッ
タンス、nは同調コイルの変成比を示す。図において、
Vo =n Vi / (1+n 2RY)−(6)と
なる。共振周波数近傍、すなわちYが非常に小なる範囲
では、n2RY<<1であるから(6)式より、 Vo’=n v+ ・・・−(7) となり、iが大なる稈バリキャップCに印加される出力
N圧Voは大となる。そして、nとQとは比例関係にあ
るから、Qが高い程バリキャップ印加電圧は大ぎくなる
ことが判る。
Here, in order to consider the relationship between Q (sharpness) of the electronic tuning circuit and intermodulation, reference is made to the equivalent circuit shown in FIG. 4. The equivalent circuit of the electronic tuning circuit is shown in Figure 4 (A), and the equivalent circuit is shown in Figure (B). Here, Vi is the input voltage, ■0 is the output voltage, and R is the signal source. The primary resistance including resistance, C is the varicap capacitance, Y is the admittance of the coil, and n is the transformation ratio of the tuning coil.In the figure,
Vo =nVi/(1+n2RY)-(6). Near the resonance frequency, that is, in the range where Y is very small, n2RY<<1, so from equation (6), Vo'=n v+ ...-(7), and the culm varicap C with large i. The applied output N pressure Vo becomes large. Since n and Q are in a proportional relationship, it can be seen that the higher Q is, the greater the voltage applied to the varicap becomes.

共振周波数の遠方ではYが非常に大であり、n 2RY
>>1となっているから、(6)式よりVo ’=Vi
 /n RY−・= (8)となり、nが小なる程すな
わちQが低い稈バリキャップに印加される電圧は減衰し
にくいことが判る。
Far from the resonant frequency, Y is very large, and n 2RY
>>1, so from equation (6) Vo'=Vi
/nRY-.=(8), and it can be seen that the smaller n is, that is, the voltage applied to the culm varicap with lower Q is less attenuated.

以上のことから、Qの高い同調回路どQの低い同調回路
とが共存している装置では、各同調回路を構成するバリ
キャップCに夫々上記した(7)。
From the above, in a device in which a high-Q tuning circuit and a low-Q tuning circuit coexist, the varicap C constituting each tuning circuit is described above (7).

(8)式で示される電圧Voが印加され、これにより(
5)式で示す非直線成分が表われることになる。よって
、かかる装置では、Qの古い同調回路の共振周波数近傍
の信8レベルど、Qの低い同調回路の広い周波数範囲に
亘る信号レベルとを双方共に検出して八GCをかけるこ
とが必要となる。
A voltage Vo expressed by the formula (8) is applied, which causes (
5) A non-linear component shown in equation 5 will appear. Therefore, in such a device, it is necessary to detect both the signal level near the resonance frequency of an old tuning circuit with a low Q and the signal level over a wide frequency range of a tuning circuit with a low Q, and apply 8GC. .

実際の受信機では、アンテナ同調回路2はQが低い同調
回路であり、RF同調回路4はQが高い同調回路であり
、アンテナ同調回路20周波数特性は第5図の曲線aの
如くなり、R[同調回路4のそれは曲線りの如くなって
いる。そこで、これら両同調回路2.4によ′る周波数
特性をカバーしてこれら出力信号レベルを検出すべく、
第5図の点線Cで示す如き検出特性を有するレベル検出
回路14をRF増幅段にて設けるようにしたのが第9− 3図の本発明の実施例である。このレベル検出回路14
は第6図の回路の如き構成とされており、RFアンプ3
の増幅用トランジスタQ1のドレイン負荷からカップリ
ンクコンデンサC1を介してレベル検出用アンプA1へ
入力し、このアンプ△1からRFレベル検出出力を得る
ようにしている。
In an actual receiver, the antenna tuning circuit 2 is a tuning circuit with a low Q, the RF tuning circuit 4 is a tuning circuit with a high Q, and the frequency characteristics of the antenna tuning circuit 20 are as shown in curve a in FIG. [The tuning circuit 4 has a curved shape. Therefore, in order to cover the frequency characteristics of both tuning circuits 2 and 4 and detect these output signal levels,
In the embodiment of the present invention shown in FIG. 9-3, a level detection circuit 14 having detection characteristics as shown by the dotted line C in FIG. 5 is provided in the RF amplification stage. This level detection circuit 14
has a configuration similar to the circuit shown in Figure 6, and the RF amplifier 3
The signal is input from the drain load of the amplification transistor Q1 to the level detection amplifier A1 via the coupling capacitor C1, and an RF level detection output is obtained from this amplifier Δ1.

ドレイン負荷としては抵抗R1とコイルL1との直列回
路が用いられており、このコイルLLと電磁結合したコ
イルL2がバリキャップ(図示せず)を有する電子同調
回路4のコイルとなっている。
A series circuit of a resistor R1 and a coil L1 is used as the drain load, and a coil L2 electromagnetically coupled to this coil LL serves as a coil of an electronic tuning circuit 4 having a varicap (not shown).

トランジスタQ1のドレイン抵抗R1の挿入により、レ
ベル検出特性は第5図の点線Cの如くなり、この抵抗R
1の選定により、広帯域レベル検出特性が選択できるこ
とになる。こうすることによって、Qの低いアンテナ同
調回路及びQの高いRF同I!1回路の各バリキャップ
に起因する相互変調成分が略すべで効果的に検出可能と
なる。
By inserting the drain resistor R1 of the transistor Q1, the level detection characteristics become as shown by the dotted line C in FIG.
By selecting 1, a wideband level detection characteristic can be selected. This creates a low Q antenna tuning circuit and a high Q RF tuning circuit! Almost all intermodulation components caused by each varicap in one circuit can be effectively detected.

こうして得られた広帯域レベル検出出力と、狭帯域レベ
ル検出出力とをゲート12へ入力し、これらレベル検出
出力状態に応じてATTlを制御10− してAGCをかけるようにしている。例えば、広帯域レ
ベル検出器140レベル検出出力が所定閾値より大なる
場合に狭帯域レベル検出器11のレベル検出出力に応じ
た八〇Gをかけるようにゲート12等は構成されている
The broadband level detection output and the narrowband level detection output thus obtained are input to the gate 12, and AGC is applied by controlling ATT1 according to the state of these level detection outputs. For example, the gate 12 and the like are configured to apply 80G according to the level detection output of the narrowband level detector 11 when the level detection output of the wideband level detector 140 is larger than a predetermined threshold.

この様に、本発明によれば、へGG制御をなすに際して
広帯域レベル検出を従来と責なり相互変調を起し易い電
子同調回路の特性に応じてなすようにしているので、八
〇〇が効里的となりフロントエンドの相互変調の削減が
可能となる。
As described above, according to the present invention, wideband level detection is performed in accordance with the characteristics of the electronic tuning circuit, which is responsible for conventional GG control and tends to cause intermodulation, so that 800 is effective. This makes it possible to reduce front-end intermodulation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の受信機のa略ブロック図、第2図は電子
同調回路のパリキャップの特性を説明する図、第3図は
本発明の実施例のブロック図、第4図は電子同調回路の
等価回路図、第5図は電子同調回路の周波数特性を示す
図、第6図は第3図のブロックの一部回路図である。 1−型部分の符号の説明 1・・・・・・ATT 2・・・・・・アンテナ同調回路 3・・・・・・RFアンプ 4・・・・・・RF同調回路 9・・・・・・IFアンプ 11・・・・・・IFレベル検出器 12・・・・・・アンドゲート 14・・・・・・R「レベル検出器 出願人   パイオニア株式会社 代理人   弁即士 藤村元彦 (外1名) 224 −ド□ \− 手舵榮ネ1置1正書(自発) 1、事件の表示 昭和584■特7.Jf順第08676282、弁明の
名称 受信装置 3、補正をする省 事件どの関係   特許出願人 住 列   東京都目黒区目出1丁目4番1号名 称 
  (501)  パイオニア株式会社4、代理人 〒
104 イ1 所   東余部中央区銀座3丁目10番9す6、
補正の対τ2   明y1書の「発明の詳fIIlなβ
)明−1の欄′1.・・・1゛・ 7、補正の内容 量書第5頁8行のrV−dC/〔11−1の項をrV−
d C正する。 (2) 同じく第7頁3行〜4行の「バリキャップ可変
容品ダイオード)」を[バリキャップ(可変容量ダイオ
ード)」と訂正する。 (3) 同じく第8頁6行の「コイル」を「同調回路」
と訂正する。 2−
Fig. 1 is a schematic block diagram of a conventional receiver, Fig. 2 is a diagram explaining the characteristics of the pari cap of an electronic tuning circuit, Fig. 3 is a block diagram of an embodiment of the present invention, and Fig. 4 is an electronic tuning circuit. An equivalent circuit diagram of the circuit, FIG. 5 is a diagram showing the frequency characteristics of the electronic tuning circuit, and FIG. 6 is a partial circuit diagram of the block in FIG. 3. Explanation of symbols for type 1 parts 1...ATT 2...Antenna tuning circuit 3...RF amplifier 4...RF tuning circuit 9... ... IF amplifier 11 ... IF level detector 12 ... AND gate 14 ... R "Level detector applicant Motohiko Fujimura (external), representative of Pioneer Co., Ltd. 1 person) 224 -Do□ \- Handsho Eiune 1st place 1st book (self-motivated) 1. Display of the case Showa 584■Special 7.Jf order No. 08676282, defense name receiving device 3, which ministry case to amend Related Patent Applicant Address 1-4-1 Mede, Meguro-ku, Tokyo Name
(501) Pioneer Corporation 4, Agent
104 I1 Address 3-10-96, Ginza, Higashiyobu Chuo-ku,
Pair of amendments τ2 “Details of the invention
) column '1. ...1゛・7, rV-dC/[11-1 term in rV-
d C Correct. (2) Similarly, on page 7, lines 3 and 4, "varicap variable cap diode" is corrected to "varicap (variable capacitance diode)." (3) Similarly, “coil” on page 8, line 6, is “tuned circuit”
I am corrected. 2-

Claims (1)

【特許請求の範囲】[Claims] アンテナ受信信号を入力とする可変減衰手段と、前記可
変減衰手段の出力を入力とし可変容量ダイオードど]イ
ルとからなる電子同調回路を右するRF増幅段と、前記
RF増幅段の出力をI「信号に変換して増幅する■「増
幅段とを含む受信装置であって、前記RF増幅段のRF
倍信号レベルを検出するレベル検出1段と、前記IF増
幅段を経た信号のレベルを検出するレベル検出手段と、
これら両レベル検出手段の検出出力状態に応じて前記可
変減衰手段のための減衰量制御信号を発生する制御信号
発生手段とを右することを特徴とする受信装置。
an RF amplification stage that connects an electronic tuning circuit consisting of a variable attenuation means that receives the antenna reception signal as an input, and a variable capacitance diode that takes the output of the variable attenuation means as an input; A receiving device including an amplification stage that converts into a signal and amplifies the RF
a level detection stage for detecting a double signal level; and a level detection means for detecting the level of the signal that has passed through the IF amplification stage;
and control signal generating means for generating an attenuation amount control signal for the variable attenuation means in accordance with the detection output states of both of the level detection means.
JP8676283A 1983-05-18 1983-05-18 Receiver Granted JPS59212038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8676283A JPS59212038A (en) 1983-05-18 1983-05-18 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8676283A JPS59212038A (en) 1983-05-18 1983-05-18 Receiver

Publications (2)

Publication Number Publication Date
JPS59212038A true JPS59212038A (en) 1984-11-30
JPH0155790B2 JPH0155790B2 (en) 1989-11-27

Family

ID=13895754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8676283A Granted JPS59212038A (en) 1983-05-18 1983-05-18 Receiver

Country Status (1)

Country Link
JP (1) JPS59212038A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0464669A2 (en) * 1990-06-29 1992-01-08 Sanyo Electric Co., Ltd. AGC circuit for radio receiver
JPH0461505A (en) * 1990-06-29 1992-02-27 Sanyo Electric Co Ltd Agc circuit
JPH0465907A (en) * 1990-07-03 1992-03-02 Toshiba Corp Agc circuit for fm front end section
US5390345A (en) * 1990-06-01 1995-02-14 Nippon Telegraph And Telephone Corporation Method for preventing desensitization and radio interference of radio receivers
EP0812066A1 (en) * 1995-12-25 1997-12-10 Matsushita Electric Industrial Co., Ltd. High-frequency device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5390345A (en) * 1990-06-01 1995-02-14 Nippon Telegraph And Telephone Corporation Method for preventing desensitization and radio interference of radio receivers
EP0464669A2 (en) * 1990-06-29 1992-01-08 Sanyo Electric Co., Ltd. AGC circuit for radio receiver
JPH0461505A (en) * 1990-06-29 1992-02-27 Sanyo Electric Co Ltd Agc circuit
JPH0465907A (en) * 1990-07-03 1992-03-02 Toshiba Corp Agc circuit for fm front end section
EP0812066A1 (en) * 1995-12-25 1997-12-10 Matsushita Electric Industrial Co., Ltd. High-frequency device

Also Published As

Publication number Publication date
JPH0155790B2 (en) 1989-11-27

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