JPS59202726A - Protecting system of switching circuit - Google Patents

Protecting system of switching circuit

Info

Publication number
JPS59202726A
JPS59202726A JP58076564A JP7656483A JPS59202726A JP S59202726 A JPS59202726 A JP S59202726A JP 58076564 A JP58076564 A JP 58076564A JP 7656483 A JP7656483 A JP 7656483A JP S59202726 A JPS59202726 A JP S59202726A
Authority
JP
Japan
Prior art keywords
signal
switching element
current
driving
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58076564A
Other languages
Japanese (ja)
Inventor
Chiharu Saito
斎藤　千春
Toshiaki Tsukuni
津国　敏明
Akira Kawaguchi
川口　昭
Katsumi Kitsushiyuu
吉州　克己
「やなぎ」澤　隆一
Ryuichi Yanagisawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58076564A priority Critical patent/JPS59202726A/en
Publication of JPS59202726A publication Critical patent/JPS59202726A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0826—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in bipolar transistor switches

Landscapes

  • Electronic Switches (AREA)

Abstract

PURPOSE:To constitute a titled circuit so that damage does not extend over other circuit configuration members by operating quickly a current limiting operation in accordance with a detecting signal causing no delay, constituted of a circuit element of a high-speed operation. CONSTITUTION:A transistor Q1 supplies a current from Vin to a load 1 through a current control part 4 in accordance with an on-off driving signal sent out by a driving part 2. A pulse generating part 5a and 5b send out search pulses a2, a3 for monitoring an operation of Q1 in synchronization with the on-off driving signal of the driving part 2. When an overcurrent is generated and damage extending to damage of an opening mode is generated in Q1, a signal of each part shown in (b) is obtained, ''1'' is sent out to an output of an AND1, becomes an opening mode alarm, also a latching part executes a holding operation, and its output signal is applied to a current limiting part 4 and the driving part 2. In the same way, when an overcurrent is generated and damage extending to a short circuit mode is generated in Q1, a signal of each part shown in (c) is obtained, a short-circuit mode alarm is sent out, also the latching part 6 executes a holding operation, and its output signal is applied to the current control part 4 and the driving part 2.

Description

【発明の詳細な説明】 （ａ）　　発明の技術分野 本発明はスイッチング回路の保護方法に関する。[Detailed description of the invention] (a) Technical field of the invention The present invention relates to a method for protecting switching circuits.

（ｂ）技術の背景 近年半導体技術の発達に伴いその多くを機械的接点に依
存していた電流の開閉手段は高圧゛または大電流の領域
を除き、小形軽量および高速動作を特徴とする半導体素
子例えばトランジスタあるい（徒シリコン制御整流素子
（ＳＯＲ）等を利用して実現されるようになった。(b) Background of the technology In recent years, with the development of semiconductor technology, current switching means, which have mostly relied on mechanical contacts, have changed to semiconductor devices, which are characterized by small size, light weight, and high-speed operation, except in the areas of high voltage or large current. For example, it has come to be realized using transistors or silicon controlled rectifiers (SOR).

一方電流開閉手段は従来よりその開閉素子例えはリレー
やスイッチングトランジスタの故障によって開閉素子の
周辺における入力電源、負荷を含めた構成部材に２次的
に損傷を及はし被害が拡大する恐れがあるのでこれを防
止する手段が講じら（Ｃ）従来技術と問題点 第１図は従来におけるスイッチング回路のグロ・ツク図
を示す。図において１は負荷、２は駆動部３は演算増幅
器による比較部、４は電流制限部、Ｖｉｎ　　は直流入
力電源、ＱＩはスイ・ソチング素子でこ＼ではトランジ
スタ、ＣＴはカーレントトランス、Ｄはダイオード、Ｃ
はコンデンサ、ＲＩ。On the other hand, in the case of current switching means, failure of the switching element, such as a relay or switching transistor, may cause secondary damage to components surrounding the switching element, including the input power supply and load, and the damage may expand. Therefore, measures have been taken to prevent this. (C) Prior Art and Problems FIG. 1 shows a diagram of a conventional switching circuit. In the figure, 1 is a load, 2 is a drive unit 3 is a comparison unit using an operational amplifier, 4 is a current limiter, Vin is a DC input power supply, QI is a switching element, here is a transistor, CT is a current transformer, and D is a diode, C
is a capacitor, RI.

Ｒ２は抵抗である。トランジスタＱ１は駆動）ル２の送
出するオンオフ駆動信号に従ってＶｉｎ　　からの電流
を直列に接続された電流制限部４を介し負性１に供給す
る９電流制限部４はＱＩの正常動作時においては比較部
３よりの出力信号により作動することはない。ＣＴはそ
の直列配線に流れる電流を検出してＤにより整流した後
Ｃにより積分して比較器３に印加する。比較器３は該検
出信号電圧を基準電圧Ｖｒｅｆと比較して検出信号電圧
がＶｒｅｆｔ上廻ったときは出力信号を電流制限部４に
送出し、電流制限部４は該出力信号に従って通過電流を
抑止または遮断する過電流制御を行う。R2 is a resistance. The current limiter 4 supplies the current from Vin to the negative 1 through the current limiter 4 connected in series in accordance with the on/off drive signal sent from the transistor QI (driving transistor Q1). It is not activated by the output signal from section 3. CT detects the current flowing through the series wiring, rectifies it with D, integrates it with C, and applies it to the comparator 3. The comparator 3 compares the detection signal voltage with the reference voltage Vref, and when the detection signal voltage exceeds Vreft, sends an output signal to the current limiter 4, and the current limiter 4 suppresses the passing current according to the output signal. Or perform overcurrent control to shut off.

このよう（ｒｃ　ＣＴによる過電流検出は微分検出によ
るため積分動作を必要とし積分時定数による遅れを生じ
るため、その出力信号により作動する電流制限部４を半
導体素子により高速化しても、Ｑｌの他負荷ｌ、Ｖｉｎ
　　“または図示省略したがＱＩと連動する他のスイッ
チング素子にも損傷を及はしてシステム全体が停止する
と共にその復旧に経費や時間がか＼る場合が存在する。In this way, since overcurrent detection by rc CT is based on differential detection, it requires an integral operation and causes a delay due to the integral time constant. Load l, Vin
Although not shown, there are cases where other switching elements that operate in conjunction with the QI are damaged, causing the entire system to stop and requiring expense and time to recover.

（、ｉ）　　発明の目的 本発明の目的は上記の欠点を除去するだめ、積分動作に
よる時定数を伴う手段に代えて高速動作の回路素子によ
って構成する遅れの伴わない検出信号に従って速やかｖ
′Ｃ電流制限動作を作動せしめ少くとも負荷ｌ、　Ｖ　
ｉ　ｎ　　等地の回路構成部材に損傷を波及しないスイ
・ノチング回路の保護方式を提供しようとするものでめ
る。(i) Object of the Invention The object of the present invention is to eliminate the above-mentioned drawbacks, and to eliminate the above-mentioned drawbacks, it is an object of the present invention to quickly detect v in accordance with a detection signal without delay, which is constructed by a high-speed operation circuit element instead of a means with a time constant due to an integral operation.
'C Activate current limiting operation and at least load l, V
It is an attempt to provide a protection method for a switch notching circuit that does not spread damage to circuit components located at the same location.

（ｃ３）発明の構成 この目的Ｖまオンオフ駆動する手段により駆動信号をス
イッチング素子に印加して該素子と直列に接続する負荷
の電流を開閉するスイ・ソチング回路において、スイッ
チング回路の両端電圧を検出する手段、該スイッチング
素子のオフオフ駆動悟÷じを並列に受信しそのオン駆動
時に同期して高レベルとなる探索パルスを送出する第１
の・くルス発生手段、そのオフ時に同期して低レベルと
なる別の探索パルスを送出する第２のパルス発生手段、
検出手段と第１パルス発生手段における出力信号の論理
積を得る第１ゲート手段、検出手段および第２パルス発
生手段における出力信号の否定信号を得てその論理積を
得る第２ゲート手段および両ゲート手段の出力における
論理和信号全保持すると共に該信号によりスイッチング
素子に供給する電流を制限する手段を備えてなり、該ス
イ・ノチング素子のオン駆動時における第１ゲート手段
の出力信号によりスイッチング素子の開放モード故障、
オフ時における第２ゲート手段の出力信号により短絡モ
ード故障を検出して各警報信号を送出し電流制限手段を
作動せしめると共に前記駆動手段の作動を抑止してスイ
ッチング素子周辺構成部材への損傷拡大を防止すること
を特徴とするスイ゛ンナング回路の保護方式を提供する
ことによっ−Ｃ達成することが出来る。(c3) Structure of the Invention This object is to detect the voltage across the switching circuit in a switching circuit that applies a drive signal to a switching element using on-off driving means to switch on and off the current of a load connected in series with the element. a first means for receiving the off-off driving signal of the switching element in parallel and sending out a search pulse that becomes high level in synchronization with the on-driving of the switching element;
a second pulse generating means that sends out another search pulse that becomes low level in synchronization with the pulse generating means when the pulse generating means is turned off;
A first gate means for obtaining a logical product of the output signals of the detection means and the first pulse generation means, a second gate means for obtaining a negative signal of the output signals of the detection means and the second pulse generation means and obtaining a logical product thereof, and both gates. means for retaining all OR signals at the output of the means and for limiting the current supplied to the switching element by the signal, and for controlling the switching element by the output signal of the first gate means when the switching element is turned on. open mode failure,
A short-circuit mode failure is detected by the output signal of the second gate means when it is off, and each alarm signal is sent out to activate the current limiting means, and at the same time, the operation of the driving means is inhibited to prevent damage from spreading to components surrounding the switching element. -C can be achieved by providing a protection scheme for the switching circuit that is characterized in that it prevents.

（ｆ）　　発明の実施例 以下図面を参照しつ＼本発明の一実施例Ｖこついて説明
する。第２図は本発明の一実施例におけるスイッチング
回路の保護方式によるプロ・′ツク図および第３図ｔａ
）　＋　（ｂｌ　＋　（ｃ）はそのタイムチャートを示
す。図において１は負荷、２は駆動部、４は電流制限部
、　５ａは第１パルス発生部、５ｂは第２パルス発生部
、６はラッチ部、ＱＩはトランジスタ工ＮＶは否定回路
、ＡＮＤＩ、ＡＮＤ２は論理積回路ｏｆ（は論理和回路
およびｋ（＋、ＲｓＨＲａは抵抗である。本発明の一実
施例における構成部材を示す符号で従来と共通の符号’
ｋｌする部材は従来と共同の機能および特性を有する・ 本発明の実施例においてもトラン７スタＱ、は駆動部２
の送出するオンオフ駆動信号に従ってＶｉｎからの電流
を直列に接続さｆｔだ電流制御部４を介し負荷１に供給
する。こ＼で第１パルス発生部５ａおよび第２パルス発
生部５ｂは駆動部２の出力するオンオフ脇勤信号乞−並
列に受イｒｊｔ、て該ノリペ動信号に同期してＱｌの作
動を監視する第３図（ａ　ｓ　）　　＋　　（ａ　＝　
）　ＶＣ示す探累パルスケ込出する電流制限部４は魅１
の正常動作時においで（ｉ、第３図（ａ）のように各部
の信号が得られてう・ノチ部６よりの出力は低レベルに
維持され作ｌ初することはない、過電流が発生してＱｌ
のスイッチング機能が失われζ１の１７時における内部
抵抗が増加する方向に向いやがては開放モードの破損に
至る損傷が発生したとき、第３図（ｂｌに示すように各
部の信号が得られ即ちＱｌのオン駆動時；（おり′るＶ
ｃｅのレベルが上昇して予め設定されたＲ　ｈ・ｌｆ輸
による分割電圧がＡＮＤ　入力の“１゛レベル件例えば
２．４ｖを越える条件となったときＡ　Ｎ　１）　１の
出力に１が送出されて開放モード警報とすると共にラパ
ノチ部ｆ３ｖＣおいて保持動作を行いその出力信号が電
流制限部４および駆動部２に印加される。同様に過電流
ｔＳ発生してＱ、ｆ　のスイ・ンチング機能が失われＱ
ｌのオフ時における漏洩抵抗が減少する方向となり、や
がては短絡モードに至る損傷が発生したとさ、第３図（
Ｃ）に示すように各部の信号が得られて短絡モード警報
を送出すると共にう・ソチ部６が保持動作を行いその出
力信号が電流制御部４および駆動部２に印加される。従
って何れの場合も電流制限部４によってＶｉｎの印加が
抑止され、駆動部２のオンオフ駆動信号の送出を停止す
る。(f) Embodiment of the Invention An embodiment of the invention will be explained below with reference to the drawings. Figure 2 shows a program diagram of a protection system for a switching circuit according to an embodiment of the present invention, and Figure 3 shows
) + (bl + (c) shows the time chart. In the figure, 1 is the load, 2 is the drive section, 4 is the current limiter, 5a is the first pulse generator, 5b is the second pulse generator, and 6 is the second pulse generator. The latch section, QI is a transistor, NV is an inverting circuit, ANDI, AND2 is an AND circuit of( is a logical sum circuit, and k(+, RsHRa is a resistor. Conventional symbols are used to indicate the components in an embodiment of the present invention. common sign with '
In the embodiment of the present invention, the transistor Q and the drive unit 2 have the same functions and characteristics as the conventional ones.
The current from Vin is supplied to the load 1 via the current controller 4 connected in series in accordance with the on/off drive signal sent by the ft. Here, the first pulse generating section 5a and the second pulse generating section 5b receive the on/off sideline signal output from the driving section 2 in parallel, and monitor the operation of Ql in synchronization with the Noripe movement signal. Figure 3 (a s ) + (a =
) The current limiter 4 that outputs the probe pulse signal indicated by VC is
During normal operation, signals from each part are obtained as shown in Figure 3 (a).The output from the notch 6 is maintained at a low level and no overcurrent occurs. Ql
When the switching function of ζ1 is lost and the internal resistance at 17 o'clock of ζ1 increases, and damage occurs that eventually leads to breakage of the open mode, signals of each part are obtained as shown in Fig. 3 (bl), that is, Ql When driving on; (Original V
When the level of ce rises and the voltage divided by the preset Rh and lf output exceeds the "1" level of the AND input, for example 2.4V, 1 is sent to the output of A N 1) 1. This causes an open mode alarm, and a holding operation is performed in the lap notch section f3vC, and its output signal is applied to the current limiting section 4 and the driving section 2. Similarly, an overcurrent tS occurs and the switching function of Q and f is activated. is lost and Q
As shown in Figure 3 (
As shown in C), signals from each part are obtained and a short circuit mode alarm is sent out, and the false part 6 performs a holding operation and its output signal is applied to the current control part 4 and the drive part 2. Therefore, in either case, the current limiting section 4 suppresses the application of Vin, and stops sending out the on/off drive signal from the driving section 2.

以上のように本発明の実施例では作動するので従来のよ
うに過電流検出の遅れに伴う負荷１の損傷やＶｉｎへの
あるいは図示省略したがｑｌ　と同時に作動する例えは
並列運転する構成部材への損傷波及を防止する保護方式
が得られる。以上はスイッチング素子をｑｌのトランジ
スタによったが他の例えばＳＯＲやゲートターンオフＳ
ＣＲによっても同様に実現出来る。また魅１における過
電流の検出に位相差があっても同様に実現出来るので負
荷１は抵抗負荷ＶＣ限ることはなく、また従来に比較し
て故障の内容を開放モードと短絡モーニド・に・判別し
て把握することが出来る。As described above, since the embodiment of the present invention operates, damage to the load 1 due to a delay in overcurrent detection, or damage to Vin or ql (not shown), which operates at the same time as in the conventional case, may occur to components operating in parallel. This provides a protection method that prevents damage from spreading. In the above, the switching element is a ql transistor, but other types such as SOR or gate turn-off S
This can be similarly achieved by CR. In addition, even if there is a phase difference in overcurrent detection in 1, it can be realized in the same way, so load 1 is not limited to a resistive load VC, and compared to the conventional method, it is possible to distinguish the nature of the failure between open mode and short circuit mode. It can be understood by

（ｑｌ　　発明の詳細 な説明したように本発明によれはスイ・ソテング索子の
作動ｒ（おける過電流を予め設厘したしきい値を越える
条件が発生した時点に積分動作等による遅延要素のない
構成で開放モードよ１こは損鶴別に検出して電流制限回
路を作動せしめて′ｌｔｉ＜入力を抑止すると共に駆動
回路による駆動信号の送出を停止せしめるので従来のよ
うに他′＼の被害が拡大することのないスイ・ノナング
回路の保護方式％式％(ql) As described in detail, the present invention is capable of controlling the operation of the sui-soten rope (r) at the time when a condition occurs in which the overcurrent exceeds a preset threshold value, and the delay element is activated by an integral operation or the like. If there is no configuration in the open mode, it is detected separately and the current limiting circuit is activated to suppress the 'lti< input and stop sending out the drive signal by the drive circuit, so there is no damage to others as in the conventional case. Protection method for the Sui-Nonang circuit that prevents expansion of % formula %

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来におけるスイ・ノナング回路の保憔方式に
よるプロ・ツク図、第２図は本発明の一実施例における
スイ・ンテング回路の保護方式によるグロパノク図およ
び第３図（ａＪ　＋　（ｂＪ　＋　（ｃ）はそのタイム
チャートを示す。 も３囚 （ａン （θ３）　　’ｆｚパル久醪庄都５ｂ戴〃（ｄ４）　　
Ｑｔ　’Ｌ、力　（ｖＣｔ：　）（ｔｈ５ン　　ハｔ）
ＤＩ、ｉススｌ　　　　□（Ｑｔ）ＡＮＤＺ上か　　□
□ （ａ７）　　ラ・途８ｎ世か　　□ （ｂ＋ （ｂＤ駒初θＰ２ポカ （ｂ３１　０］Ｅｆ１（Ｖｃｆ：） （ｂ４）　ｌ＋／ＪＤ　Ｉ劾　−−−−」Ｌ（ｂ５）う
〜・７音陥よ勾FIG. 1 is a block diagram of a conventional protection system for a switching circuit, FIG. 2 is a diagram of a switching circuit according to an embodiment of the present invention, and FIG. 3 (aJ + (bJ + (c) shows the time chart.
Qt 'L, power (vCt: ) (th5n hat)
DI, iSusl □ (Qt) ANDZ top? □
□ (a7) La・do 8n generation? □ (b+ (bD piece first θP2 poka (b31 0) Ef1 (Vcf:) (b4) l+/JD I gai ------" L (b5) U~・7 sounds Fall in love

Claims (2)

【特許請求の範囲】[Claims] （１）　　オンオフ駆動する手段により駆動信号全スイ
ッチング素子に印加して該素子と直列に接続する負荷の
電流を開閉するスイッチング回路においてスイ・リチン
グ素子の両端電圧を検出する手段、該スイッチング素子
のオンオフ駆動信号を並列に受信しそのオン駆動時に同
期して高レベルとなる探索パルスを送出する第１のパル
ス発生手段、そのオフ時に同期して低レベルとなる別の
探索パルスを送出する第２のパルス発生手段、検出手段
と第１パルス発生手段における出力信号の論理積を得る
第１ゲート手段、検出手段および第２パルス発生手段に
おける出力信号の否定信号を得てその論理積を得る第２
ゲート手段および両ゲート手段の出力における論理和信
号を保持すると共に該信号によりスイ・ソテング素子に
供給する電流を制限する手段を備えてなり、該スイッチ
ング素子のオン駆動時における第１ゲート手段の出方信
号によりスイッチング素子の開放モード故障、オフ時に
おける第２ゲート手段の出力信号により短絡モード故障
を検出して各警報信号を送出し電流制限手段を作動せし
めると共に前記駆動手段の作動を抑止してスイ・ソチン
グ素子周辺構成部材への損傷拡大を防止することを特徴
とするスイ・ンテング回路の保護方式。(1) Means for detecting the voltage across a switching element in a switching circuit that applies a drive signal to all switching elements using means for on/off driving to switch on and off the current of a load connected in series with the switching element, and for turning on/off the switching element. A first pulse generating means that receives drive signals in parallel and sends out a search pulse that becomes high level in synchronization when the drive signal is turned on, and a second pulse generation means that sends out another search pulse that becomes low level in synchronization when the drive signal is turned off. A pulse generating means, a first gate means for obtaining a logical product of the output signals of the detecting means and the first pulse generating means, a second gate means for obtaining a negative signal of the output signals of the detecting means and the second pulse generating means and obtaining a logical product thereof.
The gate means and means for holding the logical sum signal at the outputs of both gate means and limiting the current supplied to the switching element by the signal, the output of the first gate means when the switching element is turned on. An open mode failure of the switching element is detected by the second gate signal, and a short circuit mode failure is detected by the output signal of the second gate means when off, and each alarm signal is sent out to activate the current limiting means and suppress the operation of the driving means. A protection method for a switching circuit characterized by preventing the spread of damage to components surrounding the switching element. （２）オンオフ駆動する手段により駆動信号をスイッチ
ング素子に印加して該素子と直列に接続する負荷の電流
を開閉するスイ・ンテング回路においてスイ・ソテング
素子の両端電圧を検出する手段、該スイ・ノチング素子
のメンオフ駆動信号を並列に受信しそのオフ時に同期し
て低レベルとなる探索パルスを送出するパルス発生手段
、検出手段およびパルス発生手段における出力信号の否
定信号を侍でその論理積を得るゲート手段信号を保持す
ると共に該信号によりスイ・ンチング素子に供給する電
流を制限する手段を備えてなり、該スイパノチング素子
のオフ時におけるゲート手段の出力信号により短絡モー
ド故障を検出して警報信号を送出し電流制限手段を作動
せしめると共に前記駆動手段の作動を抑止してスイ・ン
チング素子周辺構成部材への損傷拡大を防止することを
特徴とするスイ・・ノチング回路の保護力式。(2) Means for detecting the voltage across the switching element in a switching circuit that applies a drive signal to the switching element using an on-off driving means to switch on and off the current of a load connected in series with the switching element; The pulse generating means receives the men-off drive signals of the notching element in parallel and sends out a search pulse that becomes low level in synchronization with the notching element's off state, and obtains the logical product of the negative signals of the output signals of the pulse generating means, the detecting means, and the pulse generating means. The gate means has means for holding the signal and limiting the current supplied to the switching element based on the signal, and detects a short circuit mode failure by the output signal of the gate means when the switching element is off, and generates an alarm signal. A protection force type for a switch notching circuit, characterized in that it operates a sending current limiting means and at the same time suppresses the operation of the driving means to prevent damage from expanding to components surrounding the switching element.
JP58076564A 1983-04-30 1983-04-30 Protecting system of switching circuit Pending JPS59202726A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58076564A JPS59202726A (en) 1983-04-30 1983-04-30 Protecting system of switching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58076564A JPS59202726A (en) 1983-04-30 1983-04-30 Protecting system of switching circuit

Publications (1)

Publication Number Publication Date
JPS59202726A true JPS59202726A (en) 1984-11-16

Family

ID=13608728

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58076564A Pending JPS59202726A (en) 1983-04-30 1983-04-30 Protecting system of switching circuit

Country Status (1)

Country Link
JP (1) JPS59202726A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6395721A (en) * 1986-10-13 1988-04-26 Mitsubishi Electric Corp Protection circuit for load switching device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6395721A (en) * 1986-10-13 1988-04-26 Mitsubishi Electric Corp Protection circuit for load switching device

Similar Documents

Publication Publication Date Title
US7787222B2 (en) Over-voltage protection for voltage regulator modules of a parallel power system
GB2268012A (en) IGBT short-circuit protection
US3821630A (en) Commutation failure detection and control for scr inverters
JP2003224968A (en) Switching power circuit
US7265958B2 (en) Overcurrent protection circuit and semiconductor apparatus
JPH07123711A (en) Overload and short-circuit protective device for switching power supply
US7719239B2 (en) Fast field discharge for generator over-voltage control
JP4434510B2 (en) Fault detection method and fault detection apparatus for insulated gate semiconductor device
US20100141149A1 (en) Fault protection methods and apparatus for cold cathode fluorescent lamps
JPH06338776A (en) First transition erasure circuit
KR101025535B1 (en) Switch control circuit for short circuit fault protection
JPS59202726A (en) Protecting system of switching circuit
JPS6084972A (en) Protecting device for inverter
JP3191661B2 (en) Semiconductor element overload protection circuit
JPH0723525A (en) Overcurrent detecting circuit
JP2001320875A (en) Power supply and x-ray ct apparatus using the same
JPH0654867B2 (en) Load control device
JP2857442B2 (en) Power supply low voltage detector
JP3291919B2 (en) DC power supply protection circuit
JP3028889B2 (en) DC semiconductor circuit breaker
JPS63268432A (en) Short-circuit protective circuit
JP2504125B2 (en) Power supply monitoring circuit
JPH0583473B2 (en)
JPH09284109A (en) Gate drive circuit having overcorrect protection function
JP3064131B2 (en) Lighting equipment