JPS59182577A - Manufacture of silicon wafer for solar cell - Google Patents

Manufacture of silicon wafer for solar cell

Info

Publication number
JPS59182577A
JPS59182577A JP58056595A JP5659583A JPS59182577A JP S59182577 A JPS59182577 A JP S59182577A JP 58056595 A JP58056595 A JP 58056595A JP 5659583 A JP5659583 A JP 5659583A JP S59182577 A JPS59182577 A JP S59182577A
Authority
JP
Japan
Prior art keywords
layer
paste
silicon wafer
back side
solar cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58056595A
Other languages
Japanese (ja)
Other versions
JPH0362031B2 (en
Inventor
Yuuji Tawara
裕滋 田原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hoxan Corp
Hokusan Co Ltd
Original Assignee
Hoxan Corp
Hokusan Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hoxan Corp, Hokusan Co Ltd filed Critical Hoxan Corp
Priority to JP58056595A priority Critical patent/JPS59182577A/en
Publication of JPS59182577A publication Critical patent/JPS59182577A/en
Publication of JPH0362031B2 publication Critical patent/JPH0362031B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Silicon Compounds (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To obtain a solar cell having high efficiency by previously forming an impurity diffusion preventive layer to the outer circumferential section of the back of a p type Si wafer before diffusion treatment for forming an n layer and shaping a surface side n<+> layer on the back side and an n<+> layer at the central section of the back side to a divided form. CONSTITUTION:An impurity preventive layer 2 is printed annularly to the outer circumferential section of the back 1' of a p type Si wafer 1 through a screen printing method by using a ceramic group oxide such as SiO2. An n<+> layer is formed on the whole surface except the layer 2 through diffusion treatment by an impurity such as boron. Consequently, a surface side n<+> layer 3 and an n<+> layer 3' at the central section on the back side are shaped. An Si oxide film 4 and the layer 2 are removed by a hydrofluoric acid solution, Al paste 5 is printed on the lower surface of the layer 3', and Al in the paste 5 is diffused up to a p layer in the wafer 1 while penetrating the layer 3' through a baking for 1-5min at 800-900 deg.C in air. An Al paste oxide layer 6 formed to the lower surface of the p<+> layer is removed by HCl, etc., thus manufacturing a solar cell.

Description

【発明の詳細な説明】 本発明はP型シリコンウェハ(こよって、太陽電層(こ
用いられるn”P”P+接合のシリコンウェハを製造す
るための方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing P-type silicon wafers (and thus n"P" P+ junction silicon wafers used for solar photovoltaic layers).

従来から効率のよいB S F (Back 5urf
□aceField )  化されたシリコンウェハが
太陽電池に用いられているが、当該ウェハの製造は、次
の如き工程を経て冥施されている。
Traditionally efficient BSF (Back 5urf)
□aceField) Silicon wafers are used in solar cells, but the production of these wafers is complicated through the following steps.

すなわち第1図の工程説明図が示す通り、先ず(イ)に
あって用意されたP型シリコンウェハに対し、燐、ボロ
ン等の3価の不純物を拡散させることにより、(ロ)の
如くP型シリコンウェハの全表面に、シリコン酸化膜A
により被覆されたn+層が形成されてPn+ 接合を得
る。
That is, as shown in the process diagram of FIG. 1, first, by diffusing trivalent impurities such as phosphorus and boron into the P-type silicon wafer prepared in (a), P-type silicon wafers as shown in (b) are Silicon oxide film A is applied to the entire surface of the mold silicon wafer.
An n+ layer coated with is formed to obtain a Pn+ junction.

次に上記シリコン酸化膜Aを弗化水素溶液にて除去した
後、?層の裏面にAtペーストBをスクリーン印刷し、
これを空気中にて焼成することでAtをn 層からP型
シリコンウェハのP層に拡散させ、これによってP+層
を形成することによりn”PP  接合とするBSF化
処理を行ない、このと蛭上記P 層の下面に付着残存し
ているAt ペースト酸化層CをHCA。
Next, after removing the silicon oxide film A with a hydrogen fluoride solution,? Screen print At paste B on the back side of the layer,
By firing this in air, At is diffused from the n layer to the P layer of the P type silicon wafer, thereby forming a P+ layer and performing BSF processing to form an n''PP junction. HCA the At paste oxide layer C remaining on the bottom surface of the P layer.

NaOH等による溶液に除去するものである。It is removed using a solution such as NaOH.

もちろん、上記のようにして得られたn+PP+接合の
シリコンウェハは、その裏面側に裏面電極を、表面側に
表面電極を形成して太陽電池となるのであるが、第1図
の@に示した上記の状態にあっては、n 層の外周側部
分がP+層と接触したものとなるため、当該接触が太陽
電池としての出力を低下させることになり、このため(
ハ)につき、その外周縁にスピングラインダー等による
機械研磨をかけ、n 層の外周側+ 部分とP層の外周側部分とを削除することにより、(ト
)の如き最終のシ、リコンウエハを得るようにしている
Of course, the n+PP+ junction silicon wafer obtained as described above becomes a solar cell by forming a back electrode on the back side and a front electrode on the front side. In the above state, the outer peripheral part of the n layer comes into contact with the p+ layer, and this contact reduces the output of the solar cell.
For c), the outer periphery is mechanically polished using a spin grinder or the like to remove the outer periphery + part of the n layer and the outer periphery part of the p layer, thereby obtaining the final silicon wafer as shown in (g). That's what I do.

このため従来法によるときは、極めて薄いシリコンウェ
ハの外周縁を研磨するといった面倒な工程を強いられ、
生産性が悪くなると共に、研磨中に当該ウェハを破損す
ることもあり、かつ(ト)の研削端縁りが粗面となって
しまうため太陽電池としての効率も低下してしまうとい
った欠陥があった。
For this reason, when using the conventional method, a tedious process such as polishing the outer periphery of an extremely thin silicon wafer is required.
In addition to poor productivity, the wafer may be damaged during polishing, and (g) the grinding edge becomes a rough surface, resulting in a decrease in efficiency as a solar cell. Ta.

本発明、は上記難点Iこ鑑み、研削手段を施すことなし
に、? 層とP+層との接触なきn”  PP+接合シ
リコンウニ八を製造し得るようになし、もってその生産
性と太陽電池の効率とを向上させようとするもので、そ
の特徴とするところは、P型シリコンウェハの裏面外周
部に、S i02 、TiO2、MgO2等のペースト
による不純物拡散防止層を印刷し、これ(こ燐、ボロン
等による拡散処理を施すこと番こより、当該不純物拡散
防止層を除く全表面に、シリコン酸化膜で覆われたn+
層を形成し、次(こ弗化水素等の溶液処理によって当該
シリコン酸化膜ト前記不純物拡散防止層を除去した後、
その裏面中央部に露呈した裏面側n 層の下面にA4ペ
ーストを印刷し、これを空気中にて焼成することにより
、当該Atペーストを上記裏面中央部の計 層から当該
P型シリコンウェハのP層に拡散させ、これによるP+
層を形成することでn”PP+接合とするBSF化処理
を行ない、さらに上記P+層の下面に形成されているA
Aペースト酸化層をHCt 、NaOH等による溶液処
理によって除去するようにしたことにある。
In view of the above-mentioned difficulty I, the present invention provides ? The purpose is to make it possible to manufacture n'' PP+ junction silicon urchins without contact between the P+ layer and the P+ layer, thereby improving the productivity and efficiency of solar cells. An impurity diffusion prevention layer made of a paste such as Si02, TiO2, MgO2, etc. is printed on the outer periphery of the back surface of the mold silicon wafer, and then a diffusion treatment with phosphorus, boron, etc. is performed to remove the impurity diffusion prevention layer. n+ surface covered with silicon oxide film
After forming a layer and removing the impurity diffusion prevention layer from the silicon oxide film by a solution treatment such as hydrogen fluoride,
By printing an A4 paste on the lower surface of the n layer on the back side exposed at the center of the back side and baking it in the air, the At paste is applied from the n layer at the center of the back side to the P of the P type silicon wafer. diffused into the layer, resulting in P+
By forming a layer, BSF processing is performed to form an n''PP+ junction, and furthermore, A
The oxidized layer of paste A is removed by solution treatment using HCt, NaOH, or the like.

本発明を第2図の工程説明図によって詳記すれば、(イ
)に示す如く例“えば直径3インチ、厚さ300μm1
比抵抗lΩmのP型シリコンウェハ1を用意し、先ず当
該ウェハ1の裏面1′にあって、その外周部に不純物拡
散防止層2を環状にスクリーン印刷法等により印刷する
The present invention will be described in detail with reference to the process diagram of FIG.
A P-type silicon wafer 1 having a specific resistance of 1Ωm is prepared, and first, an impurity diffusion prevention layer 2 is printed in a ring shape on the outer circumference of the back surface 1' of the wafer 1 by screen printing or the like.

この際上記拡散防止層2の素材としては、5102、T
IO□、MgO2等のセラミック系酸化物を用いるのが
よく、印刷に際しては例えば上記5i02を主成分とし
たペーストを用いることになるが、ペーストを得るには
既知の如<、SiO2等がセルロース系有機バインダー
、有機溶剤により調合される。
At this time, the materials for the diffusion prevention layer 2 are 5102, T
Ceramic oxides such as IO□, MgO2, etc. are preferably used, and when printing, for example, a paste containing the above-mentioned 5i02 as a main component is used. It is formulated using an organic binder and an organic solvent.

次ζこ上記(ロ)のものに対し燐、ボロン等の不純物に
よる拡散処理を第1図の(ロ)に示す場合と同じく施す
ことで、f→の通シ上記不純物拡散防止層2を除く全表
面にn十層を形成するのであり、従って当該n中層とし
ては、表面から外周側面にかけての表面側n十層3と裏
面中央部における裏面側n土層3′ とが、分断状に形
成されること\なり、これらn十層3.3′の表面には
シリコン酸化膜4が形成されているのであり、こ\で上
記n十層の面抵抗は50Ω24]、拡散層の深さは02
μmでちった。
Next, by applying the diffusion treatment using impurities such as phosphorus and boron to the above (b) in the same manner as shown in (b) of FIG. n0 layers are formed on the entire surface, and therefore, the n middle layer is divided into the n0 layers 3 on the front side from the front side to the outer peripheral side and the n layer 3' on the back side at the center of the back side. Therefore, the silicon oxide film 4 is formed on the surface of these n0 layers 3 and 3', and the sheet resistance of the n0 layers is 50Ω24], and the depth of the diffusion layer is 02
It was measured in μm.

次に上記のものに対し弗化水素溶液にて処理することf
こより、上記のシリコン酸化膜4と、S i 02等に
よる前記不純物拡散防止層2とを除去することにより、
同図のに)の状態となし、次に(ホ)に示すy口く裏面
側n土層3′の下面にAtペースト6をスクリーン印刷
等の手段lこて印刷するのでありこの際用いられるAj
ペースト6としてfd、350メツシュ以上のアルミニ
ウム粉を主成分となし、前記の5i02ペーストj同じ
よう番こして調合したものを用いることができ、当該印
刷による層厚は20〜40μm とした0 さらに上記のものを空気中にて800℃〜900℃の温
度により、1〜5分間焼成するのであるが、当該処理に
よってAt ペースト5のAt は、裏面側層層3′を
突き破りP型ンリコンウエハ1のP層にまで拡散して行
き、これにより(へ)の如くP層ζこ隣接した1層を形
成することができ、かくしてn”PP+接合とするIj
S F化処理が完結される。
Next, treat the above items with a hydrogen fluoride solution f
Therefore, by removing the silicon oxide film 4 and the impurity diffusion prevention layer 2 made of S i 02 or the like,
In the same figure, the At paste 6 is printed on the lower surface of the soil layer 3' on the back side shown in (e) using a method such as screen printing. Aj
As the paste 6, a paste containing fd, 350 mesh or more aluminum powder as the main component, prepared in the same manner as the above 5i02 paste j, can be used, and the layer thickness by printing is 20 to 40 μm. The wafer is baked in air at a temperature of 800° C. to 900° C. for 1 to 5 minutes, and as a result of this process, the At of the paste 5 breaks through the back side layer 3' and forms the P of the P-type silicon wafer 1. As a result, it is possible to form one layer adjacent to the P layer ζ as shown in (below), thus forming an n''PP+ junction.
The SF processing is completed.

最後−に上記(へ)にあってP+層の下面(こ形成され
ているAtペースト酸化@6をHCl 等により除去す
ることで、太陽電池用シリコンウェハ7が(ト)の如く
製造し得ること\なシ、とのP+層下面に裏面電極を、
表面側n十 層3の上面lこ表面電極を形成し1.さら
に当該電極を反射防止膜により被覆して、太陽電池を得
ること\なる。
Finally, by removing the At paste oxide @ 6 formed on the lower surface of the P+ layer in (g) above with HCl etc., the silicon wafer 7 for solar cells can be manufactured as shown in (g). Place the back electrode on the bottom surface of the P+ layer with \nashi,
1. Forming a surface electrode on the upper surface of the layer 3 on the surface side; Furthermore, the electrode is coated with an antireflection film to obtain a solar cell.

不発明は上記の説示により明らかな通り、n層形成のた
めの拡蔽処理前に、予めP型シリコンウェハの裏面外周
部に不純物拡散防止層を形成しておくようにしたので、
P型シリコンウェハの裏面には表面側n十層と分断状に
、しかもその中央部だけに裏面側n°十中層形成される
こと\lす、この結果n土層とP+層との接触なき製品
が労せずして得られるので、従来法の如き研磨作業は不
要となり作業性を改善できると共に、研磨による粗面も
生じないので効率のよい太陽電池が得られ、作業中にウ
ェハを破損するといった難点も解消される。
As is clear from the above explanation, the non-invention is that an impurity diffusion prevention layer is formed in advance on the outer periphery of the back surface of the P-type silicon wafer before the expansion process for forming the n-layer.
On the back side of a P-type silicon wafer, the n° layer on the front side is separated from the n layer on the front side, and the n° layer on the back side is formed only in the center. As a result, there is no contact between the n layer and the P+ layer. Since the product can be obtained without much effort, there is no need for polishing work as in the conventional method, improving workability, and since there is no rough surface caused by polishing, highly efficient solar cells can be obtained, and wafers are not damaged during work. Such difficulties will also be resolved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図の(イ)〜(ト)は従来の太陽電池用シリコンウ
ェハ製造法を示す工程説明図、第2図の(イ)〜(ト)
は本発明に係る同製造法の工程説明図である。 1・・・・−P2Nシリコンウェハ 2・・・・・不純物拡散防止層 3・・・・・表面側n 層 3′・・・・裏面側層層 4・・・・・シリコン酸化膜 5・・・・−Atペースト 6・・・・・A4ペースト酸化層 mt図 第 2 図
(A) to (G) in Figure 1 are process explanatory diagrams showing the conventional method for manufacturing silicon wafers for solar cells, and (A) to (G) in Figure 2
FIG. 2 is a process explanatory diagram of the manufacturing method according to the present invention. 1...-P2N silicon wafer 2... Impurity diffusion prevention layer 3... Front side n layer 3'... Back side layer 4... Silicon oxide film 5. ...-At paste 6...A4 paste oxide layer mt diagram Fig. 2

Claims (1)

【特許請求の範囲】[Claims] P型シリフンウェハの裏面外周部に−5in2゜TlO
2、MgO□等のペーストによる不純物拡散防止層を印
刷し、これに燐、ボロン等による拡散処理を施すことに
より、当該不純物拡散防止層を除く全表面に、シリコン
酸化膜で覆−われたn+層を形成し、次に弗化水素等の
溶液処理、によって当該シリコン酸化膜と前記不純物拡
散防止層を除去した後、その裏面中央部、に露呈した裏
面11111 n+層の下面にAtペーストを印刷し、
これを空気中にて焼成することにより、当該A′tペー
ストのAt を上記裏面中央部のn+層から当該P型シ
リコンウェハのP層に拡散させ、これ番こよるP+層を
形成することでn+PP+接合とするBSF化処理を行
ない、さらに上記P+層の下面番こ形成されているAt
 ペースト酸化層をHCI 、 NaOH等による溶液
処理ζこよって除去するようにしたことを特徴とする太
陽電池用シリコンウェハの製造方法。
-5in2°TlO on the outer periphery of the back side of the P-type silicon wafer
2. By printing an impurity diffusion prevention layer made of a paste such as MgO□ and performing a diffusion treatment with phosphorus, boron, etc., the entire surface except the impurity diffusion prevention layer is covered with an n+ silicon oxide film. After forming a layer and removing the silicon oxide film and the impurity diffusion prevention layer by treatment with a solution such as hydrogen fluoride, At paste is printed on the lower surface of the back surface 11111 n+ layer exposed at the center of the back surface. death,
By firing this in the air, the At of the A't paste is diffused from the n+ layer at the center of the back surface to the P layer of the P type silicon wafer, thereby forming a highly concentrated P+ layer. BSF processing is performed to form an n+PP+ junction, and the At
A method for manufacturing a silicon wafer for solar cells, characterized in that the paste oxide layer is removed by solution treatment using HCI, NaOH, etc.
JP58056595A 1983-03-31 1983-03-31 Manufacture of silicon wafer for solar cell Granted JPS59182577A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58056595A JPS59182577A (en) 1983-03-31 1983-03-31 Manufacture of silicon wafer for solar cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58056595A JPS59182577A (en) 1983-03-31 1983-03-31 Manufacture of silicon wafer for solar cell

Publications (2)

Publication Number Publication Date
JPS59182577A true JPS59182577A (en) 1984-10-17
JPH0362031B2 JPH0362031B2 (en) 1991-09-24

Family

ID=13031551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58056595A Granted JPS59182577A (en) 1983-03-31 1983-03-31 Manufacture of silicon wafer for solar cell

Country Status (1)

Country Link
JP (1) JPS59182577A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0233980A (en) * 1988-07-22 1990-02-05 Sharp Corp Manufacture of solar cell
WO2001084639A1 (en) * 2000-05-03 2001-11-08 Universität Konstanz Method for producing a solar cell, and solar cell produced according to said method
EP1321446A1 (en) 2001-12-20 2003-06-25 RWE Solar GmbH Method of forming a layered structure on a substrate
JP2013168678A (en) * 2012-01-10 2013-08-29 Hitachi Chemical Co Ltd Mask-forming composition, method for manufacturing solar cell substrate, and method for manufacturing solar cell element
JP2013168677A (en) * 2012-01-10 2013-08-29 Hitachi Chemical Co Ltd Mask-forming composition, method for manufacturing solar cell substrate, and method for manufacturing solar cell element
JP2014112636A (en) * 2012-01-10 2014-06-19 Hitachi Chemical Co Ltd Barrier layer-forming composition, method of manufacturing substrate for solar cell and method of manufacturing solar cell element

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0233980A (en) * 1988-07-22 1990-02-05 Sharp Corp Manufacture of solar cell
WO2001084639A1 (en) * 2000-05-03 2001-11-08 Universität Konstanz Method for producing a solar cell, and solar cell produced according to said method
US7179987B2 (en) 2000-05-03 2007-02-20 Universitat Konstanz Solar cell and method for making
EP1321446A1 (en) 2001-12-20 2003-06-25 RWE Solar GmbH Method of forming a layered structure on a substrate
JP2013168678A (en) * 2012-01-10 2013-08-29 Hitachi Chemical Co Ltd Mask-forming composition, method for manufacturing solar cell substrate, and method for manufacturing solar cell element
JP2013168677A (en) * 2012-01-10 2013-08-29 Hitachi Chemical Co Ltd Mask-forming composition, method for manufacturing solar cell substrate, and method for manufacturing solar cell element
JP2013219372A (en) * 2012-01-10 2013-10-24 Hitachi Chemical Co Ltd Barrier layer forming composition, barrier layer, method for manufacturing solar cell substrate, and method for manufacturing solar cell element
JP2014112636A (en) * 2012-01-10 2014-06-19 Hitachi Chemical Co Ltd Barrier layer-forming composition, method of manufacturing substrate for solar cell and method of manufacturing solar cell element

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