JPS5915143U - Deep switch information check circuit - Google Patents
Deep switch information check circuitInfo
- Publication number
- JPS5915143U JPS5915143U JP11037082U JP11037082U JPS5915143U JP S5915143 U JPS5915143 U JP S5915143U JP 11037082 U JP11037082 U JP 11037082U JP 11037082 U JP11037082 U JP 11037082U JP S5915143 U JPS5915143 U JP S5915143U
- Authority
- JP
- Japan
- Prior art keywords
- check circuit
- switch information
- information check
- deep switch
- control device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Error Detection And Correction (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はディップスイッチの外観図、第2図は情報伝送
回路の一例を示す図、第3図は本考案の一実施例を示す
電気的構成図である。
1・・・ディップスイッチ、2・・・バッファ、3・・
・制御装置、4・・・メモリ。FIG. 1 is an external view of a dip switch, FIG. 2 is a diagram showing an example of an information transmission circuit, and FIG. 3 is an electrical configuration diagram showing an embodiment of the present invention. 1...Dip switch, 2...Buffer, 3...
-Control device, 4...memory.
Claims (1)
する場合において、設定情報をバッファを介して制御装
置に伝送すると共に、第1回目に行われるパリティチェ
ックの結果を格納するメモリを設けたことを特徴とする
ディップスイッチの情報チェック回路。When setting various information using DIP switches and transmitting it to the control device, we have provided a memory that not only transmits the setting information to the control device via a buffer but also stores the results of the first parity check. Features a DIP switch information check circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11037082U JPS5915143U (en) | 1982-07-21 | 1982-07-21 | Deep switch information check circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11037082U JPS5915143U (en) | 1982-07-21 | 1982-07-21 | Deep switch information check circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5915143U true JPS5915143U (en) | 1984-01-30 |
JPH0132143Y2 JPH0132143Y2 (en) | 1989-10-02 |
Family
ID=30256708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11037082U Granted JPS5915143U (en) | 1982-07-21 | 1982-07-21 | Deep switch information check circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5915143U (en) |
-
1982
- 1982-07-21 JP JP11037082U patent/JPS5915143U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0132143Y2 (en) | 1989-10-02 |
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