JPS59127878A - Manufacture of photoelectric conversion device - Google Patents

Manufacture of photoelectric conversion device

Info

Publication number
JPS59127878A
JPS59127878A JP58003155A JP315583A JPS59127878A JP S59127878 A JPS59127878 A JP S59127878A JP 58003155 A JP58003155 A JP 58003155A JP 315583 A JP315583 A JP 315583A JP S59127878 A JPS59127878 A JP S59127878A
Authority
JP
Japan
Prior art keywords
angle
substrate
electrode
sections
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58003155A
Other languages
Japanese (ja)
Other versions
JPH0578195B2 (en
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP58003155A priority Critical patent/JPS59127878A/en
Publication of JPS59127878A publication Critical patent/JPS59127878A/en
Publication of JPH0578195B2 publication Critical patent/JPH0578195B2/ja
Granted legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To improve the conversion efficiency of incident light and quantum efficiency in a short wavelength by forming a sawlike irregular surface in the main surface of a light-transmitting substrate, bringing an angle of the sawlike surface to 70.5 deg. or values (within + or -20 deg.) close to said angle, and irradiating incident light to the interface between the substrate and an antireflection film for a first electrode as a light-transmitting conductive film twice. CONSTITUTION:A photo-resist is applied on the upper surface of a silicon oxide film, a reticulate pattern is formed through a photoetching method, the silicon oxide film in a rectangular section is removed by 1/10 fluoric acid while using the resist film as a mask, and a reticulate silicon oxide film is formed. (111)36 Is formed to a (100) face 35 in a parent material 1 and 70.5 deg. can be obtained as the angle 30 through a bubbling in nitrogen. The main surface of the substrate takes a sawlike shape as projecting sections 13 and recessed sections 14, and the angle is brought to 70.5 deg. or values (within + or -20 deg.) close to said angle. The nose sections of the projecting sections or the bottom sections of the recessed sections have the surfaces of curved surfaces. The pitches are set to 0.1-10mum. The first electrode is constituted along the sawlike surface. That is, a CTF constituting the first electrode is formed along the recessed surfaces 14 and the projecting surfaces 13 through an LPCVD method or a PCVD method on these surfaces.

Description

【発明の詳細な説明】 本発明は、透光性基板の主面上に透光性導電膜（１） よりなる第一の電極と、該電極」二にＰＩＮまたばＰＮ
接合を少なくともひとつ有する。、　１ｕｔｅこより光
起電力を発生ずる非単結晶半導体と、該半導体上に第二
の電極（裏面電極）を有する光電変換装置（以下ｐｖｃ
という）に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention comprises a first electrode made of a transparent conductive film (1) on the main surface of a transparent substrate, and second a PIN or PN electrode.
It has at least one joint. A photoelectric conversion device (hereinafter referred to as PVC) has a non-single crystal semiconductor that generates photovoltaic force from one ute, and a second electrode (back electrode) on the semiconductor.
related to).

本発明はこの透光性基板の主面に鋸状の凹凸表面を有せ
しめることにより、その表面積を大きくし、光に対して
は長光路となり、キャリア特にホールに対しては実質的
に短光路とならしめることに＋す、光照射光面側の光電
変換効率を向」ニさせることを目的としている。The present invention increases the surface area by providing a serrated uneven surface on the main surface of the light-transmitting substrate, thereby providing a long optical path for light and a substantially short optical path for carriers, especially holes. In addition to standardizing this, the objective is to improve the photoelectric conversion efficiency on the side of the light irradiation surface.

本発明はかかる鋸状の凹凸を有せしめるため、特にその
鋸状の角度を７０．５°Ｚまたはその近傍（′ｌ！：２
０′以内）を有し、基板と透光性導電膜である第一の電
極の反射防止膜との界面に入射光が２回照射されること
により、その界面での反射を少なくすることを特徴とし
ている。In order to have such a saw-like unevenness, the present invention particularly sets the saw-like angle to 70.5°Z or its vicinity ('l!:2
0' or less), and by irradiating the interface between the substrate and the anti-reflection film of the first electrode, which is a transparent conductive film, with incident light twice, it is possible to reduce reflection at that interface. It is a feature.

本発明はかかる凸部／凹部は概略ｌとなり、かつそのピ
ッチは０．０１〜１０Ｆ（高低差は０．０５〜７ハ）で
あることを目的としている。The object of the present invention is for the convex/concave portions to be approximately 1 in length and have a pitch of 0.01 to 10F (height difference is 0.05 to 7F).

（２） このようにすることにより、入射光側表面での照射光を
複反対せしめることにより、透光性基板上の第一の電極
を構成する透光性導電Ｉｔ！ｊｉ　（以下ＣＴＦという
）と半導体との界面での反射を少なくし、加えて基板と
ＣＴＦとの界面での反射総量を少なくすることができる
。その結果入射光の反射量をこれまでの２０〜３０％よ
り６〜８％にまで下げることができるようになり、その
ため変換効率を１０〜１５％も向上させることができた
。(2) By doing this, the irradiated light on the surface on the incident light side is reversed, so that the transparent conductive It! ji (hereinafter referred to as CTF) and the semiconductor can be reduced, and in addition, the total amount of reflection at the interface between the substrate and the CTF can be reduced. As a result, it has become possible to reduce the amount of reflected incident light from 20 to 30% to 6 to 8%, thereby improving conversion efficiency by 10 to 15%.

ざらに本発明は半導体中に入射した光の短波長での量子
効率を向上させることを特徴としている。Briefly, the present invention is characterized by improving the quantum efficiency of light incident on a semiconductor at short wavelengths.

ずなわら５００ｎｍ以下の短波長に対する光路を長くし
、かつこの光励起で発生した電子・ホール対のうらの一
方特に好ましくはホールのドリフトする拡散長を短くす
ることにより、キャリアのライフタイムより十分短い時
間にＣＴＦを到達せしめることにより、その量子効率を
４００ｎｍにて従来の６０％、５００ｎｍにて８０％で
あったものを、４００ｎｍにて８５％、５００ｎｍにて
９５％にまで高めることができた。By lengthening the optical path for short wavelengths of 500 nm or less, and particularly preferably by shortening the diffusion length of the electron/hole pair generated by this photoexcitation, the lifetime of the carrier can be sufficiently shortened. By reaching the CTF in time, we were able to increase the quantum efficiency from the conventional 60% at 400nm and 80% at 500nm to 85% at 400nm and 95% at 500nm. .

（３） これらの効果が複合化して従来の構造ではＡＭＩ（１０
０ｍＷ／　ｃ　ｍ２）の照射下で７％までしか得られな
かったものを、−気に１０．３〜１１．８％にまで高め
ることができた。(3) These effects combine to reduce the AMI (10
Under irradiation of 0 mW/cm2), only 7% could be obtained, but this could be increased to 10.3-11.8%.

本発明は（１００）面またはその近傍の面（一般に（１
１ｎ）面を有しｎ≧３例えばｎ＝５においては（，１１
５）であるをもって近傍とする）好ましくは（１００）
面を有する珪素単結晶の表面をＡＰＷ（エチレンジアミ
ン、ピロカテコール、水の混合液）によりエツチングを
することによりＶ型溝を有する、即ち７０．５’　　ま
たはその近傍の角度の鋸状表面を有する母材を作り、こ
の透光性基板の主面の「型」として透光性基板を作るこ
とにより、鋸状の表面を有するとともに、その凹凸はす
べてが概略同一形状の鋸状を有せしめた透光性基板を形
成したものである。The present invention is based on the (100) plane or a plane near it (generally (100)
1n) plane, and n≧3 For example, when n=5, (,11
5) is the neighborhood) preferably (100)
By etching the surface of a silicon single crystal with planes using APW (a mixture of ethylenediamine, pyrocatechol, and water), a matrix having V-shaped grooves, that is, a serrated surface with an angle of 70.5' or around 70.5' is produced. By making a transparent substrate and using it as a "mold" for the main surface of the transparent substrate, it is possible to create a transparent substrate with a serrated surface and all the unevenness of the serrated surface to be approximately the same shape. A photosensitive substrate is formed.

さらに本発明はかかる鋸状の主面に添ってＣＴＦが形成
されるように、このＣＴＦを減圧気相法またはプラズマ
気相法により作製したことを特徴としている。本発明は
かくのごとく被形成面が鋸状（４） の凹凸表面を有するため、その後工程を電子ビーム蒸着
法またはスプレー法等を用いるのではなくプラズマ気相
法（ＰＣＶＤ法という）または減圧気相法（ＬＰＣＶＤ
法という）を用いて、ＣＴＦ従来ＰＶＣは第一図にその
縦断面図を示すが、平坦な表面を有するガラス基板（３
）、上にＣＴＦ（４）をＩＴＯｌＳ　ｎ　Ｏ，等を□、
電子ビーム蒸着法またはスプレー法で、１層または２層
に形成することが知られている。このＣＴＦをスプレー
法で形成する場合、ＩＴＯ（酸化インジューム酸化スズ
化合物）を１５００〜２０００Ａの平均厚さに形成し、
さらにこの上面に酸化スズを２００〜５００Ａの厚さに
形成する。するとこのＣＴＦの表面は０．３〜０．７／
ｖＬの平均粒径を有する凹（１４）　、凸（１３）（但
しその高低差はその粒径の１層４程度しか生しさせるこ
とができな゛い）を構成さセることができる。このため
半導体即ちＰ型半導体例えば５ｉｘＣ＋−ｘ（０＜ｘ＜
１）（５）（５） Ｎ型半導体（７）よりなるＰＩＮ接合を有する非単結晶
半導体（４）を積層して設け、さらに第二の電極（８）
を形成する時、入射光（１０）を半導体中で（２１）の
ごとくに曲げることが可能でを有効に用いることができ
ることが知られている。Furthermore, the present invention is characterized in that the CTF is produced by a reduced pressure vapor phase method or a plasma vapor phase method so that the CTF is formed along the saw-shaped main surface. In the present invention, since the surface to be formed has a serrated (4) uneven surface, the subsequent process is performed using plasma vapor phase method (referred to as PCVD method) or reduced pressure vapor deposition method instead of using electron beam evaporation method or spray method. Phase law (LPCVD)
Figure 1 shows the longitudinal cross-sectional view of the CTF conventional PVC, which is manufactured using a glass substrate (3) with a flat surface.
), CTF (4) on top of ITOlS n O, etc.
It is known to form one or two layers by electron beam evaporation or spraying. When forming this CTF by a spray method, ITO (indium oxide tin oxide compound) is formed to an average thickness of 1500 to 2000A,
Furthermore, tin oxide is formed on this upper surface to a thickness of 200 to 500 Å. Then, the surface of this CTF is 0.3 to 0.7/
Concave (14) and convex (13) having an average grain size of vL (however, the difference in height can only be about 4 layers per layer of the grain size) can be formed. For this reason, a semiconductor, that is, a P-type semiconductor, for example, 5ixC+-x (0<x<
1) (5) (5) A non-single crystal semiconductor (4) having a PIN junction made of an N-type semiconductor (7) is stacked and provided, and a second electrode (8) is provided.
It is known that when forming a semiconductor, it is possible to bend the incident light (10) as shown in (21) in the semiconductor, which can be used effectively.

しかしかかる従来例においては、平坦な表面を有する透
光性基板上に単にスプレー法によるディボジソションの
クラスタでできた凸部表面のなめらかな鱗状（電子顕微
鏡でみると魚の鱗のごとき形状を有するため鱗状という
）の曲面を有するのみであり、凹凸の高低差はその粒径
の１層４程度しか生じさせることができないため、十分
とはいえない。このためさらにこの形状を積極的に用い
ることが求められている。さらにかかる従来方法におい
ては、基板（３）　、ＣＴＦ　（４）界面での反射（２
０）に対してまったく有効でないことが判明した。However, in such conventional examples, the convex surfaces are formed by clusters of deposition simply by spraying on a light-transmitting substrate having a flat surface. However, the difference in height of the unevenness can only be created by about 4 times the grain size per layer, which is not sufficient. Therefore, it is required to use this shape even more actively. Furthermore, in such a conventional method, reflection at the interface between the substrate (3) and the CTF (4) (2
0) was found to be completely ineffective.

かかる従来方法ではその光電変換効率（以下型（６） に効率という）は７％（７〜７．９％）までであり、最
高７．９３％までしか得られなかった。In such a conventional method, the photoelectric conversion efficiency (hereinafter referred to as type (6) efficiency) was up to 7% (7 to 7.9%), and a maximum of only 7.93% could be obtained.

本発明はかかる長波長光を乱反射させることにより、６
００ｎｍ以上の長波長光の量子効率を高めるのみでなく
、短波長光を有効に用い、加えて基板−ＣＴＦ界面、Ｃ
ＴＦ−半導体界面での屈折率の差による反射を複反射せ
しめることによりさらに短波長光による光路長／キャリ
アの拡散長を従来の値１より１．５〜７にまで高めたこ
とを特徴としている。By diffusely reflecting such long wavelength light, the present invention achieves 6.
In addition to increasing the quantum efficiency of long wavelength light of 00 nm or more, short wavelength light is effectively used, and in addition, the substrate-CTF interface, C
It is characterized by increasing the optical path length/carrier diffusion length of short wavelength light from the conventional value of 1 to 1.5 to 7 by making the reflection due to the difference in refractive index at the TF-semiconductor interface double reflection. .

特に３００〜５００ｎｍの短波長光は半導体中で２００
０Ａまで９０％以上が光電変換するが、このうちのキャ
リアであるホｉルは平坦面電極にまで到達することがで
きない。すなわち光路長（オプティカルレングスＯＬ）
／キャリアの拡散長（ディフュージョンレングスＤＬ）
即ちＯ／Ｄ：１においては、光励起されたキャリアはそ
の光が侵入したと同し長さを電極まで拡散しなくてはな
らない。In particular, short wavelength light of 300 to 500 nm has a wavelength of 200 nm in semiconductors.
More than 90% of the photoelectric conversion occurs up to 0 A, but the foil, which is a carrier, cannot reach the flat surface electrode. In other words, optical path length (optical length OL)
/Carrier diffusion length (diffusion length DL)
That is, at O/D:1, photoexcited carriers must diffuse to the electrode by the same length as the light entered.

しかし本発明においては、このＯ／Ｄ＝　１．５（７） 〜７一般には２〜３とすることができるため、結果とし
ての３００〜５００ｎｍにおける量子効率を向上させる
ことが可能となった。However, in the present invention, this O/D can be set to 1.5(7) to 7, generally 2 to 3, so that the resulting quantum efficiency in the range of 300 to 500 nm can be improved.

第二図は本発明のｐｖｃのたて断面図を示している。図
面において透光性基板（１）はここではガラスをもちい
た。さらにこの基板の主面は凸部（１３）　、四部（１
４）の鋸状を有し、その角度は７０．５またはその近傍
（＋２０以内）を有している。さらに凸部の先端部また
は四部の底部は曲面（断面は円形状、曲率半径２００Ａ
〜２Ｐ）の表面を有している。またこのピ、・チは０．
１〜１ＯＩｔ（高低差は０，０５〜２．りを有している
。FIG. 2 shows a vertical sectional view of the PVC of the present invention. In the drawing, glass is used here as the transparent substrate (1). Furthermore, the main surface of this substrate has a convex part (13) and a fourth part (1
4), and its angle is 70.5 or its vicinity (within +20). Furthermore, the tip of the convex part or the bottom of the four parts is a curved surface (the cross section is circular, the radius of curvature is 200A)
~2P) surface. Also, this pi, chi is 0.
1 to 1 OIt (height difference is 0.05 to 2.

さらにこの鋸状の表面にそって第一の電極を構成し、反
射防止膜も兼用したＣＴＦ　（４）を１５００〜２００
０Ａの厚さとし、そのＣＴＦの表面は酸化スズを主成分
としている。Furthermore, CTF (4), which constitutes the first electrode and also serves as an anti-reflection film, is applied along this sawtooth surface at 1500 to 200%.
The thickness of the CTF is 0A, and the surface of the CTF is mainly composed of tin oxide.

さらにこのＣＴＦに密接してＰＣＶＤ法またはＬＰＣＶ
Ｄ法で得られたＰ型非単結晶半導体例えば約１００Ａの
厚さの５ｉｘＣ＋−ｘ（０＜ｘ＜１例えばｘ＝０．８）
　　（６）を有し、この−上面をホウ（８） 素カ月０”ｌ０ｃｍ添加されたＩ型半導体（７）例えば
グロー放電法により作られた水素またはセミアモルファ
ス珪素半導体を平均厚さ０．４〜０．７Ｐを有し、さら
に約１００〜２０ＯＡの厚ざのＮ型の多結晶または微結
晶の珪素半導体（８）よりなるひとつのＰＩＮ接合を有
する非単結晶半導体（５）を有し、さらにこの上面に第
二の電極（９）をＰＣＶＤ法又は電子ビーム蒸着法によ
り第二〇〇ＴＦ　（１１）例えばＩＴＯを９００〜さに
形成し、その上面の反射用電極（１２）はアルミニュー
ムまたは銀を主成分として設けられている。Furthermore, closely related to this CTF, PCVD method or LPCV method
P-type non-single crystal semiconductor obtained by method D, for example, 5ixC+-x with a thickness of about 100A (0<x<1, e.g. x=0.8)
(6), whose top surface is doped with boron (8) (7) hydrogen or semi-amorphous silicon semiconductor made, for example, by a glow discharge method, with an average thickness of 0.4 ~0.7P, and further has a non-single crystal semiconductor (5) having one PIN junction made of an N-type polycrystalline or microcrystalline silicon semiconductor (8) with a thickness of about 100 to 20 OA, Furthermore, a second electrode (9) is formed on this upper surface by PCVD method or electron beam evaporation method using 200 TF (11), for example, ITO, with a diameter of 900~, and the reflective electrode (12) on the upper surface is made of aluminum. Or, it is provided with silver as the main component.

かかる構造において得られた特性を第一図の従来構造と
比較すると以下のごとくである。The characteristics obtained in this structure are compared with the conventional structure shown in FIG. 1 as follows.

従来例　　　　本発明 開放電圧（ＶＩ　　　　　　０．　８２　　　０．　９
２短絡電流（ｍＡ／ｃｍＮ４．９　　　　２０．９（９
） 曲線因子（％）　　　　　　　６０．３　　６７．０変
換効率（％”）　　　　　　　　７．３７　１２．７４
上記効率は面積１．０５ｃｍ　（３，５ｍｍ７３ｃｍ）
においてＡＭ　１　　（１００ｍＷ／　ｃ　ｍ”）の照
射光を照射した場合の特性である。このことより本発明
においては、従来よりも７３％もその効率を向上させ墨
ことができるという大きな特徴を有する。Conventional example Invention open circuit voltage (VI 0.82 0.9
2 Short circuit current (mA/cmN4.9 20.9 (9
) Fill factor (%) 60.3 67.0 Conversion efficiency (%”) 7.37 12.74
The above efficiency is for an area of 1.05cm (3.5mm 73cm)
This is the characteristic when the irradiation light of AM 1 (100 mW/cm") is irradiated at .

第三図は本発明の効果を示す概要である。Figure 3 is a summary showing the effects of the present invention.

図面においてガラス基板（３）の主面が鋸状の凸部（１
３）、四部（Ｉ４）を有し、その上面にＣ’ｒＦ＜４）
　、ＰＭ　（６）　、１層（７）　、Ｎ層（８）よりな
るＰ■Ｎ接合を少なくともひとつ有する半導体（５）、
裏面電極（９）を有する。In the drawing, the main surface of the glass substrate (3) has a serrated convex portion (1
3), has a quadripartite (I4) and C'rF<4) on its upper surface.
, PM (6), a semiconductor (5) having at least one P■N junction consisting of a single layer (7) and an N layer (8),
It has a back electrode (9).

図面において入射光（１０）は基１（３）−ＣＴＦ（４
）界面にて第一の反射（２０）をするが、再び他のガラ
ス（３）−ＣＴＦ　（４）界面に致り、第二の反射（２
３）をする。この二面の照（１０） おき、半導体中に９３％以上の光を入射させてしまうこ
とができた。すなわら反射は大気−ガラス界面の（２６
）のみに実質的にすることができる。In the drawing, the incident light (10) is the group 1 (3)-CTF (4
) The first reflection (20) occurs at the interface, but it again reaches the other glass (3)-CTF (4) interface, and the second reflection (2
Do 3). With this two-sided illumination (10), more than 93% of the light was able to enter the semiconductor. In other words, the reflection is caused by the (26
) can be made substantially only.

この基板をその凹凸の鋸状（鋸の歯状）の角度をすべて
同じとし、その角度を約７０．５とするため、入射光は
すべて二面入射することにより、従来例のごとく制御さ
れた凹凸を有さない一部のみの入射光が乱反射するのに
比べて、きわめて照射光の利用効率が高いという大きな
特徴を有する。In order to make this substrate have the same sawtooth (sawtooth) angle of the unevenness, and the angle is approximately 70.5, all incident light is incident on two sides, and is controlled as in the conventional example. It has the great feature of being extremely efficient in utilizing the irradiated light, compared to a case where only a portion of the incident light that has no irregularities is diffusely reflected.

さらに本発明構造は、この鋸状の形状が制御されている
ため、上下の電極間がショートして歩留りを低下させる
ことがないという他の特徴を有する。Furthermore, the structure of the present invention has another feature in that since the sawtooth shape is controlled, short-circuits between the upper and lower electrodes will not occur, which will reduce the yield.

またＣＴＦ　（４）に入った光ばＣＴ　Ｆ−半導体界面
で反射（２２）しても結局より高い屈折率の半導体中（
２１）にはいりこんでしまう。Furthermore, even if the light that enters the CTF (4) is reflected at the CTF-semiconductor interface (22), it will end up in the semiconductor with a higher refractive index (
21).

また半導体中では光励起によって発生した電子（１６）
ホール（１７）対のうち、電子は凹部（１４）の中央部
（１５）を通って（最も安定なエネルギーレベル）第二
の電極に致る。電子は拡散長がホールに比べて１０００
倍もあるため、１層（６）が平均０．３〜０．８Ｐ例え
ば０．５１あっても、そのドリフトは問題ない。さらに
この電子は裏面（９）の凹部（１４）に敗るため、その
ドリフト距離を実効的にさらに短くすることができた。Also, in semiconductors, electrons generated by photoexcitation (16)
Among the hole (17) pairs, the electrons pass through the center (15) of the recess (14) (the most stable energy level) and reach the second electrode. The diffusion length of electrons is 1000 times longer than that of holes.
Therefore, even if one layer (6) has an average of 0.3 to 0.8P, for example, 0.51, there is no problem with the drift. Furthermore, since these electrons are lost to the recess (14) on the back surface (9), the drift distance can be effectively further shortened.

他方電子の１／１０００程度しかないホールはそのドリ
フト距離が（２７）とＣＴＦのすぐ近くにあるため、結
果として再結合中心に捕獲され、消滅することがまぬが
れる。このためＯＬ／Ｄ　Ｌ〉１特に２〜１０とする本
発明はきわめて重要なものであることがわかった。On the other hand, holes, which are only about 1/1000 of electrons, have a drift distance of (27) and are very close to the CTF, so they are captured by the recombination center and are prevented from disappearing. For this reason, it has been found that the present invention in which OL/D L>1, especially 2 to 10, is extremely important.

すなわちこの基板の表面が鋸状を有することは、ホール
にとっても電子にとっても、そのドリフト長をともに短
くすることができ、さらにその電極との接触面積を大き
くすることにより電極−半導体界面での接触抵抗を少な
くすることができるという他の特徴をも有する。In other words, the serrated surface of this substrate can shorten the drift length of both holes and electrons, and furthermore, by increasing the contact area with the electrode, contact at the electrode-semiconductor interface can be made. It also has the other feature of being able to reduce resistance.

さらにこの基板での凹凸の表面がプラズマＣＶＤまたは
ＬＰＧＶＤで作られる半導体（４）の表面（半導体（７
）−電極（８）界面）をも合わせて凹凸を誘発し、この
凹凸面が５００′Ａ〜７Ｆ一般には０．１〜ＩＩＡ−も
の高低差を有するため、裏面での長波長光（２４）、　
（２４’）の反射光（２５）。Furthermore, the uneven surface of this substrate is the surface of the semiconductor (4) made by plasma CVD or LPGVD (semiconductor (7)
) and the electrode (8) interface) to induce unevenness, and since this uneven surface has a height difference of 500'A to 7F, generally 0.1 to IIA-, long wavelength light (24) on the back surface ,
(24') reflected light (25).

（２５’）もその光路を長くすることができる。このた
め裏面電極での凹凸は、結果的にさらにすぐれた効果の
向上を促すことができる。特に６００ｎｍ以上の長波長
光をより長時間（長光路）半導体中にとじこめておくこ
とができ、長波長領域でのＵ手動率の向」二を促すこと
ができた。(25') can also lengthen the optical path. Therefore, the unevenness on the back electrode can ultimately promote further improvement of the effect. In particular, it was possible to confine long wavelength light of 600 nm or more in the semiconductor for a longer time (long optical path), and it was possible to improve the U manual efficiency in the long wavelength region.

また基板（３）の鋸状（鋸の歯状）の角度（３３）は、
母材を（１００’）を有する珪素基板の角度選択エッチ
を行うため、約７０．５と一定であり、またそのピンチ
（３３）、高低差（３４）を基板のすべてにおいてほぼ
一様とすることができる。Also, the sawtooth angle (33) of the substrate (3) is
Since the angle selective etching is performed on a silicon substrate having a base material (100'), the angle is constant at approximately 70.5, and the pinch (33) and height difference (34) are approximately uniform over the entire substrate. be able to.

このため一部の凸部が極端に大きく、そこでの上下電極
間のショウトによる歩留り低下がないという他の特徴を
有する。Therefore, some of the protrusions are extremely large, and another feature is that there is no reduction in yield due to shorts between the upper and lower electrodes there.

裏面電極（９）として金属を用いずＣＴＦのみとすると
長波長光を裏面より外部に放出せしめることができ、こ
の裏面上方に太陽熱利用の装置を（１３） 併用することが他の重要な応用として工業上効果的であ
る。If only CTF is used without using metal as the back electrode (9), long-wavelength light can be emitted from the back surface to the outside, and another important application is to use a solar heat utilization device (13) above the back surface. Industrially effective.

この長波長光に関しては、第二図に示すごとく裏面電極
をＣＴＦと反射用電極とすることによりさらにその反射
効率を高めることができるの当然である。As for this long wavelength light, it is natural that the reflection efficiency can be further increased by using the back electrode as a CTF and a reflecting electrode as shown in FIG.

第４図は本発明のｐｖｃを作るための製造工程を示した
ものである。FIG. 4 shows the manufacturing process for making the PVC of the present invention.

図面での本発明の実施例としての製造工程を示す。1 shows a manufacturing process as an embodiment of the invention in the drawings.

母材（１）は（１００）面を有する珪素単結晶をもうい
た。さらにこの上面を十分清浄とし、自然不純物を除去
した。さらにこの上面に選択的に酸化珪素をドツト状ま
たは網目状に形成させた。The base material (1) contained a silicon single crystal having a (100) plane. Furthermore, this upper surface was thoroughly cleaned to remove natural impurities. Furthermore, silicon oxide was selectively formed on the upper surface in the form of dots or networks.

ドツト状に形成させるには、塗付法にもちいられるガラ
ス（酸化珪素ガラス）溶液をアルコールにて希釈して、
スプレー法にて飛散塗付し、各ドツトがその大きさを１
００λ〜０．３Ｆ例えば５００人の半球粒とし、この粒
間隔（ピッチ０．０１〜０．５パ例えば約１０００’Ａ
として形成した。さく１４） らにこれを５００〜６００°Ｃの空気中で焼成して酸化
珪素粒としたｇ この後この焼成を経ても粒のない部分の１０〜５０Ａの
厚さの酸化珪素膜を１／１０弗酸（弗酸を１０倍の水で
希釈したもの）にて除去して出発材料とした。To form dots, dilute the glass (silicon oxide glass) solution used in the coating method with alcohol.
The dots are applied by scattering using the spray method, and each dot has a size of 1
00λ~0.3F, for example, 500 hemispherical grains, and the grain interval (pitch 0.01~0.5p, for example, about 1000'A)
Formed as. 14) This is then fired in air at 500-600°C to form silicon oxide grains. After this, even after this firing, the silicon oxide film with a thickness of 10-50A in the part without grains is reduced to 1/2 This was removed with 10 hydrofluoric acid (hydrofluoric acid diluted 10 times with water) to obtain a starting material.

また網目状に形成させるには、以下のごとくとした。す
なわち網の幅０．５〜２．５７Ａ、矩形鋸歯の開穴は１
〜１０．、Ａとし、この網目は＜１１０＞方向に配向さ
せた。すなわち（１００）面の珪素基板の表面を清浄に
した後、ｌ１００Ｃの酸素中で熱酸化して、５００〜１
００ＯＡの厚さの酸化珪素膜を形成した。この後この上
面にフォトレジス）・を塗付し、フォトユソチング法に
て網目状のパターンを形成した。さらにこのレジス１〜
膜をマスクとして、短形部の酸化珪素膜を１／１０弗酸
にて除去した。かくして網が＜１１０＞に配向して、網
目状の酸化珪素膜を形成した。Further, to form a mesh shape, the following procedure was performed. In other words, the width of the net is 0.5 to 2.57A, and the opening of the rectangular sawtooth is 1
~10. , A, and the mesh was oriented in the <110> direction. That is, after cleaning the surface of the (100) plane silicon substrate, it is thermally oxidized in oxygen at 100C to form a 500-1
A silicon oxide film with a thickness of 0.00 OA was formed. Thereafter, a photoresist (photoresist) was applied to the upper surface, and a mesh pattern was formed using a photoresisting method. Furthermore, this Regis 1~
Using the film as a mask, the silicon oxide film on the rectangular portion was removed with 1/10 hydrofluoric acid. In this way, the mesh was oriented in <110> direction, forming a mesh-like silicon oxide film.

かくして選択的に酸化珪素のマスクが形成された珪素母
材をＡＰＷにて異方性エツチングを行なった。The silicon base material on which the silicon oxide mask was selectively formed was anisotropically etched using APW.

すなわちたとえばエチレンジアミン１７ｃｃ、ピロカテ
コール３ｇｒ’、水８ｃｃの溶液中、約１００Ｃ±５Ｃ
にて１０分〜１時間加熱し、窒素中でバブルすることに
より、第４図（Ａ）における母材（１）は（Ｉ　ＯＯ）
面（３５）に対し、（ｌｌ’１）（３６）を有し、その
角度（３０）は７０．５を得ることができた。（１００
）の方位が少しずれると、この角度は７０．５’よりも
ずれ７０．５近傍の角度を有する。That is, for example, in a solution of 17 cc of ethylene diamine, 3 gr' of pyrocatechol, and 8 cc of water, about 100 C ± 5 C.
By heating for 10 minutes to 1 hour and bubbling in nitrogen, the base material (1) in FIG.
With respect to the plane (35), we had (ll'1) (36), and the angle (30) was able to obtain 70.5. (100
) is slightly shifted, this angle has an angle closer to the shift 70.5 than 70.5'.

さらにこのＡＰＷを水洗した後、マスクの酸化珪素を弗
酸液にて除去した。この後必要に応じてマスク部の平坦
部を除去するため、０．１〜２分ＡＰＷ液中にて再びエ
ツチングをしてもよい。After washing this APW with water, the silicon oxide on the mask was removed with a hydrofluoric acid solution. After this, if necessary, etching may be performed again in the APW solution for 0.1 to 2 minutes to remove the flat portion of the mask portion.

次ぎに第一図においてはこの母材上に離形体を。、０１
〜。、３４（７）厚さ８．け７せどした。。。Next, in Figure 1, a mold release body is placed on this base material. ,01
~. , 34 (7) thickness 8. However, I did. . .

形材としてはこの実施例では金属スズを真空蒸着した。In this example, metal tin was vacuum-deposited as the shape material.

もちろんＳ　ｎ　Ｃ１４のＬＰＣＶＤまたはＰＣＶＤ法
にて金属スズをこの凹（１４）凸（１３）にそってさら
に一様に形成してもいい。金属スズは融点＜ＭＰ）が２
３１．８４°ｃであるため、亜鉛（３２７，４°Ｃ）７
７チモン（６３０，り’Ｃ）（ｎ　（１５６，４°Ｃ）
等を用イテも、マタコレラのいずれかとの混合物を用い
ることにより、離形材の表面張力を〆ＩＭ整することは
、ガラスの質を異Ｍ’ｔせた場合の、軟化点、融点が変
化することに対する１Ｊｌｉｌｌｌの可能性を大きくし
て有効である。Of course, metal tin may be further uniformly formed along the concave portions (14) and convex portions (13) by the LPCVD or PCVD method of S n C14. Metallic tin has a melting point <MP) of 2
Since the temperature is 31.84°C, zinc (327,4°C)7
7 Timon (630, ri'C) (n (156,4°C)
It is also possible to adjust the surface tension of the mold release material by using a mixture with Mata cholera, which will change the softening point and melting point if the quality of the glass is changed. It is effective because it increases the possibility of 1 Jlill for what happens.

かくして離形材ここでは金属スズが鋸状（鋸の凹凸の歯
状）の表面全面にわたって被覆形成させた。この後この
上面に透光性基板例えば白板ガラス厚さ０．０４〜２ｍ
ｍ例えば１．２ｍｍ　（３）を配置した。この母材（１
）、離形材（２）、ガラス基板（３）を不活性雰囲気炉
中にて６００〜７００’Ｃにて加熱した。この温度は基
板の軟化温度具」二であればいい。この時母材側を下側
にしてもまた母材側を上側にしても、またそれを上下交
互に行っても有効である。かかる温度ではスズは液化し
ているため、液滴にならないような前記厚さとし、かつ
その表面張力により鋸状表面のすべてにわたって存在せ
しめることが重要である。In this way, metal tin was coated over the entire surface of the release material, which had a sawtooth shape. After that, a transparent substrate such as a white plate glass with a thickness of 0.04 to 2 m is placed on the upper surface.
For example, 1.2 mm (3) was placed. This base material (1
), mold release material (2), and glass substrate (3) were heated at 600 to 700'C in an inert atmosphere furnace. This temperature should be the temperature at which the substrate softens. At this time, it is effective whether the base metal side is placed on the bottom side, the base metal side is placed on the top side, or alternately up and down. Since the tin is liquefied at such temperatures, it is important that the thickness is such that it does not form into droplets and that its surface tension allows it to be present over the entire serrated surface.

（１７） さらにこの第４図（Ａ）の構造を３００〜３５０°Ｃに
加熱して金属スズを溶融した後基板を母材よ、り分離し
た。(17) Further, the structure shown in FIG. 4(A) was heated to 300 to 350°C to melt the metal tin, and then the substrate was separated from the base material.

かくして透光性基板（３）の−面を鋸状の凹（１４）凸
（１３）表面を有し、かつその角度を７０．５またはそ
の近傍にすることができた。In this way, the negative side of the light-transmitting substrate (3) could be made to have a saw-shaped concave (14) and convex (13) surface, and the angle thereof could be set to 70.5 or around 70.5.

第４図（、Ｂ）は透光性基板であってかつその主面が７
０．５′またはその近傍の角度を有するものである。ま
たこの凹（１４）、凸（］３）の表面上には、ＬＰＣＶ
Ｄ法またはＰＣＶＤ法により第一の電極を構成するＣＴ
Ｆをその面にそって形成させた。Figure 4 (,B) shows a transparent substrate whose main surface is 7
It has an angle of 0.5' or around 0.5'. Moreover, on the surface of this concave (14) and convex (]3), there is a LPCV
CT forming the first electrode by D method or PCVD method
F was formed along the surface.

すなわちＬ　Ｐ　ＣＶ　Ｄ法においては、３００〜５５
０’Ｃの温度にてＩ　ｎ　ＣＩ、とＳｎ’ＣＩ、７たは
Ｓ　ｂ　Ｃ１，とをインジューム、スズ、またはアンチ
モンの反応性気体としてもちいた。例えば酸化スズを作
るには、Ｓ　ｎ　ＣＩ４と酸化物気体である空気とを混
合し、０．１〜１Ｑｔｏｒｒ例えばｌ　ｔｏｒｒに保持
された反応炉中に基板を配置した。この基板ヲ３００〜
６００’Ｃ９１Ｊ工Ｌ；Ｊ：　４５０’Ｃニ加ＢＬ、Ｔ
（１８） 前記した反応性気体を流した。かくすると減圧下である
ため、反応性気体の平均自由行程は大きくなり、鋸状表
面の側部分にも均一に酸化スズ膜を１０００〜３０００
Ａの厚さに作ることができた。That is, in the L P CV D method, 300 to 55
I n CI, and Sn'CI, 7 or S b C1, were used as indium, tin, or antimony reactive gases at a temperature of 0'C. For example, to make tin oxide, S n CI4 and air, which is an oxide gas, are mixed and the substrate is placed in a reactor maintained at 0.1 to 1 Q torr, eg, l torr. This board is 300~
600'C91J machining L; J: 450'C machining BL, T
(18) The above-mentioned reactive gas was flowed. Since the pressure is reduced, the mean free path of the reactive gas becomes large, and the tin oxide film is evenly formed on the side portions of the saw-shaped surface.
I was able to make it to the thickness of A.

ＩＴＯ（酸化スズが５％添加された酸化インジューム）
においては、反応性気体として塩化インジュームを塩化
スズと２０：１とし同時に加えてもよい。ITO (indium oxide with 5% tin oxide added)
In this case, indium chloride may be added simultaneously with tin chloride in a ratio of 20:1 as a reactive gas.

この圧力は２０ｔｏｒｒ以上においては、平均自由行程
が少なくなるため不均一性が目立ち特に大気圧でのＣＶ
Ｄ法では本発明の鋸状の表面に均一なＣＴＦを作ること
はできなかった。また０、　　１ｔｏｒｒ以下では被膜
の成長速度が小さく実用化にとぼしかった。At pressures above 20 torr, the mean free path decreases, so non-uniformity becomes noticeable, especially in CV at atmospheric pressure.
In Method D, it was not possible to create a uniform CTF on the serrated surface of the present invention. Moreover, below 0.1 torr, the growth rate of the film was too low to put it into practical use.

ＰＣＶＤ法を行う場合には、０．０１〜２ｔｏｒｒとし
、ＬＰＣＶＤ法と同じ出発材料を室温〜１６０Ｃにて高
周波例えば１３．５６ＭＨｚにてくわえた。When performing the PCVD method, the pressure was set to 0.01 to 2 torr, and the same starting material as in the LPCVD method was added at room temperature to 160 C with a high frequency, for example, 13.56 MHz.

かくして鋸状表面に均一な膜厚にて作ることができた。In this way, it was possible to form a film with a uniform thickness on the serrated surface.

このＣＴＦはこの後４００〜６００’Ｃ例えば５００″
Ｃにて空気中での焼成をすることはその電気伝導度をた
かめるために有効であった。This CTF is then 400~600'C, for example 50''
Firing in air at C was effective for increasing the electrical conductivity.

ＰＣＶＤ法においても２ｔｏｒｒ以上または０．０１ｔ
ｏｒｒ以下では放電がおきにくくなり０．０１〜２ｔＯ
ｒｒの圧力が有効であった。Even in the PCVD method, the pressure is 2 torr or more or 0.01 t.
Below orr, discharge is difficult to occur and 0.01 to 2tO
A pressure of rr was effective.

かくしてＰＣＶＤ法においては、塩化インジュームと塩
化スズとを酸化物気体と互いに反応炉内に導入して、１
３．５６ＭＨｚの電気エネルギーを加えてグロー放電を
用、い、プラズマ反応で０．　１ｔｏｒｒの圧力にて行
い、１０００〜２００ＯＡの膜厚に形成した。さらにこ
の形成膜を真空中で３００〜５００Ｃで加熱し、さらに
このＩＴＯの上面に２００〜５００Ａの厚さに酸化スス
を主成分とするＣＴＦを同様のＰＣＶＤ法にて形成せし
めた。Thus, in the PCVD method, indium chloride and tin chloride are introduced into a reactor together with an oxide gas, and 1
Using glow discharge by applying electrical energy of 3.56 MHz, a plasma reaction of 0. The film was formed at a pressure of 1 torr to have a thickness of 1000 to 200 OA. Further, this formed film was heated at 300 to 500 C in a vacuum, and furthermore, a CTF whose main component was soot oxide was formed on the upper surface of this ITO to a thickness of 200 to 500 A by the same PCVD method.

このＣＴＦの形成にはＣＦ、Ｂｒを含有した５ｎＣＩを
酸化物気体とともに４５０〜６００″Ｃ↑ 例えば５００’Ｃでｌ　−３ｔ　ｏ　ｒ　ｒで１０００
〜２５０ＯＡの厚さに形成してもよい。To form this CTF, 5nCI containing CF and Br is mixed with oxide gas at 450 to 600"C↑ For example, at 500'C and 1000" at l -3t or r.
It may be formed to a thickness of ~250 OA.

さらにその後第４図（Ｃ）に示すごとく、プラズマ気相
法により、シランとメタンを主成分としてＰ型のＳ　ｉ
　ｘｃ＋−ｘ　（０＜ｘ＜　１）を約１０ＯＡの厚さに
形成した。さらにＢ、　Ｈ，を０．５〜ＩＰＰＭ添加し
てシランを公知のプラズマ気相法で平均膜厚０．４〜０
．８ハ例えば平均０．５Ｆの厚さに形成した。この時非
単結晶半導体（７）の裏面は曲面を有し、その高低差は
１００ＯＡ近くになっていた。さらにＮ型半導体をＰＨ
／５ｉＨ＝１％Ｓ　ｉ　Ｔ（、／　Ｈ，＞　ｌ　Ｏとし
てプラズマ気相法で１００〜３００Ａの厚さに微結晶化
してつくった。Furthermore, as shown in FIG. 4(C), P-type Si containing silane and methane as main components was then produced using a plasma vapor phase method.
xc+-x (0<x<1) was formed to a thickness of about 10 OA. Furthermore, 0.5~IPPM of B, H, and silane were added to form a silane film with an average film thickness of 0.4~0 using a known plasma vapor phase method.
．． For example, 8 pieces are formed to have an average thickness of 0.5F. At this time, the back surface of the non-single crystal semiconductor (7) had a curved surface, and the difference in height was nearly 100 OA. Furthermore, the N-type semiconductor is PH
/5iH=1%S i T(, /H, > l O) and was microcrystallized to a thickness of 100 to 300A by plasma vapor phase method.

この後第二のＣＴＦ（９）をＩＴＯを公知の電子ビーム
蒸着法または第一〇ＣＴＦと同様のＰＣＶＤまたはＬＰ
ＣＶＤ法で９００〜１３００′Ａ例えば平均１０５０Ａ
の厚さに形成させた。さらに必要に応じこのＣＴＦ上に
反射用のアルミニュームを主成分とする電極（１９）を
真空蒸着法またはＴＭＡ　（）リメチルアルミニューム
）を用いてＬＰＣＶＤ法により形成させた。After this, the second CTF (9) is applied to the ITO using a known electron beam evaporation method or by PCVD or LP similar to the first CTF.
CVD method: 900-1300'A, for example, average 1050A
It was formed to a thickness of . Furthermore, if necessary, a reflective electrode (19) mainly composed of aluminum was formed on this CTF by vacuum evaporation or LPCVD using TMA (remethylaluminum).

かくのごとくして、第４図（Ｃ）の構造をえた。In this way, the structure shown in Figure 4 (C) was obtained.

この第４図（Ｃ）で得られた特性を第二図に対応して示
しである。The characteristics obtained in FIG. 4(C) are shown in correspondence with FIG. 2.

（２１） 以上の説明で明らかなごとく、本発明は透光性基板上に
鋸状の凹凸を作るため、母材を珪素の異方性エッチを用
いて作り、この母材をスタンプのごとくにして離形材を
介在させてガラス基板表面に転写せしめることにより、
入射光面側の基板それ自体に凹凸面を有せしめることが
できた。(21) As is clear from the above explanation, in order to create saw-like irregularities on a transparent substrate, the base material is made using anisotropic etching of silicon, and this base material is shaped like a stamp. By transferring it to the surface of the glass substrate using a release material,
The substrate itself on the incident light surface side could have an uneven surface.

本発明やこおいてＰＩＮをひとつ有する半導体ではなく
、ＰＩＮＰＩＮ・・・・ＰＩＮ接合を有するタンデム構
造としても有効である。In the present invention, instead of a semiconductor having one PIN, a tandem structure having PIN junctions is also effective.

また半導体はプラズマ気相法による珪素を主成分とする
非単結晶半導体とした。しかし３　ｉ　ｘ　Ｇ　ｅｒＫ
（０≦Ｘ≦１）、Ｓ　ｉ　Ｘ５ｎＩ−ｘ　（０＜ｘ＜　
１）、ｓ　ｉ、Ｎ４−ｘ（３＜Ｘ＜４）としてもよい。The semiconductor was a non-single-crystal semiconductor whose main component was silicon by plasma vapor phase method. But 3 i x G erK
(0≦X≦1), S i X5nI-x (0<x<
1), s i, N4-x (3<X<4).

以上の説明より明らかなように、本発明は透光性基板と
して０．５〜３ｍｍの厚さのガラス板をもちいた。しか
しこの基板として０．１〜１峡ｕの厚さの可曲性のガラ
ス又は石英を用いても有効である。さらにこの基板とし
て透光性のポリイミド、ポリアミド等の有機樹脂であっ
てもよい。As is clear from the above description, the present invention uses a glass plate with a thickness of 0.5 to 3 mm as a transparent substrate. However, it is also effective to use flexible glass or quartz with a thickness of 0.1 to 1 mm as this substrate. Furthermore, this substrate may be made of a transparent organic resin such as polyimide or polyamide.

【図面の簡単な説明】[Brief explanation of the drawing]

（２２） 第−図は従来の光電変換装置の縦断面図をしめす。 第２図は本発明の光電変換装置の縦断面図を示す。 第３図は本発明の光電変換装置の原理を示す縦断面図を
しめす。 第４図は本発明の光電変換装置の作製方法を示す。 特許出願人 株式会社半導体エネルギー研究所 ヰ２（ｆｌ ５ ）３ω(22) Figure - shows a longitudinal sectional view of a conventional photoelectric conversion device. FIG. 2 shows a longitudinal cross-sectional view of the photoelectric conversion device of the present invention. FIG. 3 shows a longitudinal sectional view showing the principle of the photoelectric conversion device of the present invention. FIG. 4 shows a method for manufacturing a photoelectric conversion device of the present invention. Patent applicant Semiconductor Energy Research Institute Co., Ltd. ヰ2(fl 5) 3ω

Claims (1)

【特許請求の範囲】[Claims] １．７０．５’またはその近傍の角度の鋸状表面を有す
る母材の前記表面上に離形材被膜を形成する工程と、該
被膜」二に透光性ガラス材を膜状に形成する工程と、前
記ガラス材を固化または熔融固化して基板　を形成する
工程と、該ガラス基板を前記母材より離間する二［程と
を有せしめることにより、７０．５”またはその近傍の
角度の鋸状表面を有する透光性基板を形成する工程と、
該基板表面に透光性導電膜の第一の電極を形成する工程
と、該導電膜」二に光照射により光起電力を発生ざ廿る
非単結晶半導体を形成する工程と、該半導体上に第二の
電極を形成する工程とを有することを特徴とする光電変
換装置作製方法。1. Forming a release material coating on the surface of the base material having a serrated surface with an angle of 70.5' or around 70.5', and forming a transparent glass material in the form of a film on the coating. a step of solidifying or melting and solidifying the glass material to form a substrate; and a step of separating the glass substrate from the base material, thereby forming an angle of 70.5" or around 70.5". forming a translucent substrate having a serrated surface;
a step of forming a first electrode of a transparent conductive film on the surface of the substrate; a step of forming a non-single crystal semiconductor that generates a photovoltaic force upon irradiation with light on the conductive film; 1. A method for manufacturing a photoelectric conversion device, comprising: forming a second electrode.
JP58003155A 1983-01-12 1983-01-12 Manufacture of photoelectric conversion device Granted JPS59127878A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58003155A JPS59127878A (en) 1983-01-12 1983-01-12 Manufacture of photoelectric conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58003155A JPS59127878A (en) 1983-01-12 1983-01-12 Manufacture of photoelectric conversion device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP4179181A Division JPH05198830A (en) 1992-06-12 1992-06-12 Method of manufacturing photoelectric transducer

Publications (2)

Publication Number Publication Date
JPS59127878A true JPS59127878A (en) 1984-07-23
JPH0578195B2 JPH0578195B2 (en) 1993-10-28

Family

ID=11549458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58003155A Granted JPS59127878A (en) 1983-01-12 1983-01-12 Manufacture of photoelectric conversion device

Country Status (1)

Country Link
JP (1) JPS59127878A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04127579A (en) * 1990-09-19 1992-04-28 Hitachi Ltd Corrugated solar cell
JPH05198830A (en) * 1992-06-12 1993-08-06 Semiconductor Energy Lab Co Ltd Method of manufacturing photoelectric transducer
WO2012014723A1 (en) * 2010-07-26 2012-02-02 浜松ホトニクス株式会社 Method for manufacturing light-absorbing substrate and method for manufacturing die for manufacturing light-absorbing substrate

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04127579A (en) * 1990-09-19 1992-04-28 Hitachi Ltd Corrugated solar cell
JPH05198830A (en) * 1992-06-12 1993-08-06 Semiconductor Energy Lab Co Ltd Method of manufacturing photoelectric transducer
WO2012014723A1 (en) * 2010-07-26 2012-02-02 浜松ホトニクス株式会社 Method for manufacturing light-absorbing substrate and method for manufacturing die for manufacturing light-absorbing substrate
JP5508533B2 (en) * 2010-07-26 2014-06-04 浜松ホトニクス株式会社 Manufacturing method of light absorbing substrate and manufacturing method of mold for manufacturing the same
US9108269B2 (en) 2010-07-26 2015-08-18 Hamamatsu Photonics K. K. Method for manufacturing light-absorbing substrate and method for manufacturing mold for making same

Also Published As

Publication number Publication date
JPH0578195B2 (en) 1993-10-28

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