JPS59124713A - Liquid phase epitaxial growth method - Google Patents
Liquid phase epitaxial growth methodInfo
- Publication number
- JPS59124713A JPS59124713A JP23375082A JP23375082A JPS59124713A JP S59124713 A JPS59124713 A JP S59124713A JP 23375082 A JP23375082 A JP 23375082A JP 23375082 A JP23375082 A JP 23375082A JP S59124713 A JPS59124713 A JP S59124713A
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- Prior art keywords
- growth
- layer
- substrate
- solution
- liquid phase
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02623—Liquid deposition
- H01L21/02628—Liquid deposition using solutions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Lasers (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Abstract
Description
【発明の詳細な説明】 （１）発明の技術分野 本発明は液相エピタキシャル成長方法に関する。[Detailed description of the invention] (1) Technical field of the invention The present invention relates to a liquid phase epitaxial growth method.
特に、半導体基板上に形成されたエピタキシャル層の厚
さがウェーハ内において不均一となることが防止されて
いる液相エピタキシャルＩｉ５．長方法の改良に関する
。Particularly, the liquid phase epitaxial Ii5. Concerning improvements in the long method.
（２）技術の背景
液相エピタキシャル成長方法（ＬＰＥ方法）とは、台部
とスライダ部とよりなる成長用ボードを使用し、その台
部に設けられた深さ３００［μｍ］程度の凹部に基板を
載置するとともに、スライド部に設けられた複数の開口
、すなわち、溶液溜に相異なる成長溶液を収容し、これ
らの成長溶液を順次基板表向に所望の時間汝触させるこ
とによって、基板上に積層体を実現する成長方法をいい
、この方法においては、台部に設けられた凹部に載置さ
れたウェーハと成長溶液とが接触するようにスライダを
順次移動させ、かつ、予め設定された温度プログラムに
もとづいてそれぞれの結晶を成長させるが、このとき、
エピタキシャル層の成長速度は周囲温度によって一義的
に決定される。このＬＰＥ方法にあっては、製造歩留り
を向上させるためにそれぞれの層の厚さは基板面内にお
いて均一であることが望ましい。(2) Background of the technology The liquid phase epitaxial growth method (LPE method) uses a growth board consisting of a pedestal part and a slider part, and a recess with a depth of about 300 [μm] provided in the pedestal part is placed on the substrate. At the same time, a plurality of openings provided in the slide section, that is, solution reservoirs contain different growth solutions, and these growth solutions are sequentially brought into contact with the surface of the substrate for a desired period of time. In this method, a slider is sequentially moved so that a wafer placed in a recess provided in a stage comes into contact with a growth solution, and a preset Each crystal is grown based on a temperature program, but at this time,
The growth rate of the epitaxial layer is primarily determined by the ambient temperature. In this LPE method, it is desirable that the thickness of each layer be uniform within the substrate surface in order to improve manufacturing yield.
（３）従来技術と問題点
ところが、従来技術において、Ｉ、ＰＥ方法を使用して
半導体基板上にエピタキシャル層を成長させる際、原因
は必ずしもつまびらかではないが、成長面内における層
の厚さが不均一となる場合が多（、所望の層厚に対する
ばらつきが、かなり大きいという不利益が存在すること
が確認された。(3) Conventional technology and problems However, in the conventional technology, when an epitaxial layer is grown on a semiconductor substrate using the I, PE method, the cause is not necessarily that it is thin, but the thickness of the layer within the growth plane is It has been confirmed that there is a disadvantage that the layer thickness is often non-uniform (and the variation with respect to the desired layer thickness is quite large).
多層構造を有する半導体装置の製造工程において特に、
（イ）一連の成長工程が複数回に分かれて行なわれる場
合や、（ロ）特に、成長工程と、成長工程との中間にエ
ツチング等の異種の工程が実行される場合、具体的な例
を挙げれば、埋め込み型半導体レーザの多層構造の形成
工程にあっては、最初の成長工程によって形成された層
と、その後の成長工程によって形成された層との相対的
位置を正確に制御するために、各層の厚さのばらつきは
、所望の層厚例えば２ 〔μＩｎ）に対し±０．１〔μ
Ｉｎ〕程度以下であることが必須である。Especially in the manufacturing process of semiconductor devices having a multilayer structure,
(a) When a series of growth steps is divided into multiple steps, or (b) When a different process such as etching is performed between the growth steps, specific examples are shown below. For example, in the process of forming a multilayer structure of an embedded semiconductor laser, it is necessary to accurately control the relative positions of the layers formed in the first growth process and the layers formed in the subsequent growth process. , the variation in the thickness of each layer is ±0.1 [μIn] for a desired layer thickness, for example, 2 [μIn].
In] or less is essential.
しかしながら、従来技術におけるばらつきは、この値を
はるかに越えるものであり、ＬＰＥ方法の改良に対する
要請が高まっている。However, the variations in the prior art far exceed this value, and there is an increasing demand for improvements in LPE methods.
（４）光間の目的
不発明の目的は、この要請に応えることにあり、基板上
に均一な厚さの成長層を形成することを可能とする、液
相エピタキシャル成長方法を提供することにある。(4) Purpose of the invention The purpose of the invention is to meet this demand, and to provide a liquid phase epitaxial growth method that makes it possible to form a growth layer of uniform thickness on a substrate. .
（５）欠間の構成
上記の目的は、液相成長用基板裏面と保持部材間に融解
金属を介在させて液相成長を行なうことを特徴とする液
相エピタキシャル成長方法により達成される。(5) Structure of gap The above object is achieved by a liquid phase epitaxial growth method characterized in that liquid phase growth is performed by interposing molten metal between the back surface of a substrate for liquid phase growth and a holding member.
従来技術において、基板は成長用ボートの台部に設けら
れた凹部に単に・載置されているにすぎないので、例え
ば、基板裏面の一部領域に凹凸が存在する場合等におい
ては、基板の裏面と四部の底面とは、必ずしもすべての
領域において完全にかつ、均一に接触しているとは限ら
ない。このような場合、台部に接触している領域と接触
していない領域とでは伝熱効果に差を生ずるから、当然
のことながら、基板の各領域に温度差が生じ、この不均
一な温度分布にもとづいて、エピタキシャル層の成長速
度が不均一となり、結果として定められた成長時間にお
いて、層厚に不均一性が生じるということが考えられる
。In the conventional technology, the substrate is simply placed in a recess provided in the stand of the growth boat. The back surface and the bottom surfaces of the four parts are not necessarily in complete and uniform contact in all areas. In such a case, there will be a difference in the heat transfer effect between the area that is in contact with the base and the area that is not, so naturally there will be a temperature difference in each area of the board, and this non-uniform temperature Based on the distribution, it is conceivable that the growth rate of the epitaxial layer is non-uniform, resulting in non-uniformity in the layer thickness over a given growth time.
そこで、不発明においては、基板と凹部の底面との間に
、凹部から基板への熱伝導の媒体となるような物質を介
在させることとなし、具体的には。Therefore, in the present invention, a substance that acts as a medium for heat conduction from the recess to the substrate is interposed between the substrate and the bottom surface of the recess, specifically.
基板の裏面に低融点を有し、かつ、熱伝導性の高い金属
よりなる層を雨着形成しておき、この基板を凹部に載置
して通常のＬＰＥ方法を使用した成長工程を実行するこ
ととした。この工程によれば、成長系の温度上昇（通常
のＬ ｆ） Ｅ方法では５００〜７００ ＋：’ｃ）
）に伴って基板裏面に形成された低融点金属層は融解し
、この溶融液は、基板裏面と四部底面との間に間・隙を
生じることなく均一にゆきわたり、これをもって凹部下
面から基板へ均一に熱が伝導され、結果として、均一な
厚さのエピタキシャル層が形成されるという大きな利益
を有する。A layer made of a metal with a low melting point and high thermal conductivity is formed on the back surface of the substrate, and this substrate is placed in the recess to perform a growth process using a normal LPE method. I decided to do so. According to this process, the temperature rise in the growth system (normal L f) is 500 to 700 +:'c) in the E method.
), the low melting point metal layer formed on the back surface of the substrate melts, and this molten liquid spreads uniformly between the back surface of the substrate and the bottom surface of the four parts without creating any gaps, and this melts from the bottom surface of the concave to the substrate. This has the great benefit of uniformly conducting heat to the substrate, resulting in the formation of an epitaxial layer of uniform thickness.
なお、上記の成長用ボードにおいて、基板周囲と凹部の
側面とは、はとんど間隙が生じないように設計されてい
ることが一般であるから、基板と凹部底面との間に介在
する低融点金属の溶融液と基板上面に接触している成長
溶液とが接触する可能性はないため、成長溶液がコンタ
ミネートされる等の不利益は全く存在しない。In addition, in the above-mentioned growth board, since it is generally designed so that there is almost no gap between the periphery of the substrate and the side surface of the recess, there is no gap between the substrate and the bottom of the recess. Since there is no possibility that the molten liquid of the melting point metal will come into contact with the growth solution that is in contact with the upper surface of the substrate, there are no disadvantages such as contamination of the growth solution.
また、上記の構成において、低融点金属よりなる層を基
板裏面に雨着形成する方法としては、単に塗布するか、
又は、真空蒸着法、電気メツキ法等が使用可能である。In the above structure, the method for forming a layer made of a low melting point metal on the back surface of the substrate includes simply coating it,
Alternatively, a vacuum evaporation method, an electroplating method, etc. can be used.
（６）先明の実施例
以下図面を参照しつつ、不発明の一実施例に係る液相エ
ピタキシャル成長方法について説明し、本発明の構成と
特有の効果とを明らかにする。(6) Embodiment of the Invention A liquid phase epitaxial growth method according to an embodiment of the invention will be explained below with reference to the drawings, and the structure and unique effects of the present invention will be clarified.
−例として、ｎ型インジウムリン（ｎＩｎＰ）よりなり
裏面の一部領域に凹凸を有する基板上に、ｎ型インジウ
ムリン（ｎＩｎＰ）よりなる第１層とｎ型インジウムリ
ン（ｐＩｎＰ）よりなる第２層とアンドープのインジウ
ムガリウムヒ素リン（Ｉｎ（３ａＡｓＰ）よりなる第３
層とよりなる積層体を形成する工程について述べる。- As an example, a first layer made of n-type indium phosphide (nInP) and a second layer made of n-type indium phosphide (pInP) are placed on a substrate made of n-type indium phosphide (nInP) and having unevenness on a part of the back surface. A third layer made of undoped indium gallium arsenide phosphide (In(3aAsP))
The process of forming a laminate consisting of layers will be described.
第１図参照
ｎ型インジウムリン（ｎＩｎＰ）よりなり、厚さが２５
０〔μＩｎ）程度の基板１の裏面に真空蒸着法を使用し
て、例えば、融点が１５７℃程度であるインジウム（■
０）よりなり、厚さが５０〔μｌｎｌ程度である層２を
形成する。Refer to Figure 1. Made of n-type indium phosphide (nInP), with a thickness of 25 mm.
For example, indium (■
0) and has a thickness of about 50 μlnl.
第２図参照
上記の工程により得られた基板１を通常の成長用ボート
に載置することにより、それぞれの層を順次成長させる
。第２図は、本実施例において使用された成長用ボート
の側方断面図であり、図において、１１は台部であり、
１２は台部１１に設けられた四部の底面であり、２１は
スライダ部であり、２２は、スライダ部に設けられた溶
液溜のカバーであり、３１．３２．３３はそれぞれ上記
せる第１層、第２層及び第３層用の成長溶液である。Refer to FIG. 2 The substrate 1 obtained through the above steps is placed on a normal growth boat to grow each layer in sequence. FIG. 2 is a side sectional view of the growth boat used in this example, and in the figure, 11 is a platform;
12 is the bottom surface of the four parts provided on the table part 11, 21 is the slider part, 22 is a cover for the solution reservoir provided in the slider part, and 31, 32, and 33 are the above-mentioned first layers, respectively. , the growth solution for the second and third layers.
この工程は、まず成長溶液溶質が溶媒とともに各溶液溜
に装入されている成長装置全体を高純度の水素ガス（Ｈ
２）雰囲気中において６７０〔℃〕程度で約２時間放置
したのち、０．５ （℃／＋ｎｉｎ：ｌの冷却速度を
もって冷却し、６６０［’ｃ、］になった時点でスライ
ダ部２１を矢印Ａの方向ヘスライダさせ第１層用成長溶
液３１を基板１の表面に接触させ、更に６５０〔℃〕に
なった時点で再びスライダ部２１を移動させ第２層用成
長溶液３２を、同様に６４５〔℃〕になった時点で第３
層用成長溶液３３をそれぞれ基板裏面に償触させ６４０
〔℃〕１こなった時点で第３層の成長を終了し、目的と
する積層体を完成した。In this process, the entire growth apparatus, in which the growth solution solute and solvent are charged into each solution reservoir, is heated using high-purity hydrogen gas (H
2) After leaving it in an atmosphere at about 670 [°C] for about 2 hours, cool it at a cooling rate of 0.5 (°C/+nin:l), and when the temperature reaches 660 ['c, ], move the slider part 21 with the arrow. The slider section 21 is moved in the direction of A to bring the first layer growth solution 31 into contact with the surface of the substrate 1, and when the temperature reaches 650 [°C], the slider section 21 is moved again to bring the second layer growth solution 32 into contact with the surface of the substrate 1. When the temperature reaches [℃], the third
The layer growth solution 33 is brought into contact with the back surface of each substrate 640
When the temperature reached 1 [°C], the growth of the third layer was completed, and the desired laminate was completed.
この工程において、基板１の表面に形成されていたイン
ジウム（Ｉｎ）層２は、すみやかに溶融し、この溶融液
は、基板裏面と凹部底面１２との間に間隙を生ずること
なく均一にゆきわたり、これをもって、成長期間中に、
凹部屈曲１２から基板１へ均一な熱伝導が可能となり、
均一な厚さのエピタキシャル層が形成されることとなる
。In this step, the indium (In) layer 2 formed on the surface of the substrate 1 melts quickly, and this melt spreads uniformly between the back surface of the substrate and the bottom surface 12 of the recess without creating a gap. , with this, during the growth period,
Uniform heat conduction from the concave bend 12 to the substrate 1 becomes possible,
An epitaxial layer of uniform thickness will be formed.
なお、上記の工程により完成された基板の断面をスティ
ンエツチング法をもって観察した結果、厚さの面内分布
は、２ 〔μｍ口〕程度の厚さ、及び４〔μｍ口〕程度
の厚さに対し、共に±０．１〔μｍ〕以下であることが
確認された。すなわち、２５ ［＋ｎ＋ｎ］角のウェー
ハを５〔１旧ｎ〕の間隔をもって縦横に細分し、上方か
ら第１行第２行・・・・・・と命名し、左方から第１列
第２列・・・・・・と命名した場合、第１行第１列、第
１行第２列、第３行第３列・・・・・・の順をもって計
測した厚さは、基準厚さ４ 〔μ＋ｎ）に対し、それぞ
れ、４．０．３．９．４．０．４．０．４．１．４０．
４．１．４．１．４．０．４，１．４．０．３．９．３
．９．４．０．３．９．４，０であり、又、基準厚さ２
〔μｍｎ〕に対し、（７）
それぞれ、２，１．２．０．１，９．２゜■、２．０．
２．０．２．０、２．０、２．１、 ■、９、２．０、
■、９、１．９．２．０．２．０．２．０．１．９で
あった。一方、これらの値と比較するために、従来技術
、すなわち、本実施例と全く同一条件を使用し、ただ、
インジウム（Ｉｎ）層の形成されておらない基板に対し
、上記の積層体を形成した場合における厚さの面内分布
を調べたところ、２ 〔μ＋ｎ）程度の厚さに対して±
０．５〔μ＋ｎ）程度、４ 〔μＩｎ）程度の厚さに対
して±０．９〔μ＋ｎ〕のばらつきが観察された。すな
わち、上記と同様の計測順序をもって計測した場合の厚
さは、基準厚さ２ 〔μｍ口〕に対し、２．１．１．７
．１．５．１，５．２．２．２．５．１．８．２．５．
１，７．１．８．２．０．１．５．１．５．２．０．２
．１．２．３であり、基準厚さ４〔μ＋ｎ）に対し、４
．０．４．２．４．８．５．０．４．１．３．３．３．
６．４．１．３，５．３．７．３．９．４．３．３．７
．３５．４．３．４．１であ、った。かくの如く、本発
明においては、面内のばらつきの大幅な改善がなされて
いることが明らかになった。In addition, as a result of observing the cross section of the substrate completed by the above process using the stain etching method, the in-plane thickness distribution was found to be approximately 2 [μm] thick and 4 [μm] thick. On the other hand, it was confirmed that both values were within ±0.1 [μm]. In other words, a 25 [+n+n] square wafer is subdivided vertically and horizontally at intervals of 5 [1 old n], and is named 1st row, 2nd row, etc. from the top, and 1st column, 2nd row, etc. from the left. If the columns are named, the thickness measured in the order of 1st row, 1st column, 1st row, 2nd column, 3rd row, 3rd column, etc. is the standard thickness. 4 [μ+n), respectively, 4.0.3.9.4.0.4.0.4.1.40.
4.1.4.1.4.0.4, 1.4.0.3.9.3
．． 9.4.0.3.9.4,0, and the standard thickness is 2
For [μmn], (7) 2, 1.2.0.1, 9.2°■, 2.0.
2.0.2.0, 2.0, 2.1, ■, 9, 2.0,
■, 9, 1.9.2.0.2.0.2.0.1.9. On the other hand, in order to compare with these values, we used the prior art, that is, using exactly the same conditions as this example, but
When we investigated the in-plane thickness distribution when the above laminate was formed on a substrate on which no indium (In) layer was formed, we found that ± for a thickness of about 2 [μ+n]
A variation of ±0.9 [μ+n] was observed for the thickness of about 0.5 [μ+n] and about 4 [μIn]. In other words, the thickness when measured using the same measurement order as above is 2.1.1.7 for the standard thickness 2 [μm].
．． 1.5.1, 5.2.2.2.5.1.8.2.5.
1,7.1.8.2.0.1.5.1.5.2.0.2
．． 1.2.3, and for the standard thickness 4 [μ+n], 4
．． 0.4.2.4.8.5.0.4.1.3.3.3.
6.4.1.3, 5.3.7.3.9.4.3.3.7
．． It was 35.4.3.4.1. As described above, it has become clear that in the present invention, in-plane variations are significantly improved.
更に、このような層成長の行なわれたウェーハ（８）
にｖ溝を形成したところ、各成長層の厚さが均一である
のでＶ溝の深さ、開口の幅等も従来技術に比してはるか
にばらつきが低減された。また、この■溝に再びＬＰＢ
方法を使用することによって層成長を行ないＶ情理め込
み構造Ｖ ８ Ｂ （Ｖｇｒｏｏｖ、ｅｄＳｕｂｓｔｒ
ａｔｅ Ｂｕｒｉｅｄ Ｄｏｕｂｌｅ ｈｅｔｅｒｏ
５ｔｒｕｃｔｕｒｅ ）を有する半導体レーザを製造し
たところ、素子特性の面内ばらつきの少ない良質なウェ
ーハが得られた。Furthermore, when a V-groove was formed on a wafer (8) on which such layer growth had been performed, the thickness of each grown layer was uniform, so the depth of the V-groove, the width of the opening, etc. were also smaller than in the conventional technology. The variation was much reduced. Also, LPB again in this groove
By using a layer growth method, a Vgroov structure V8B (Vgroov, edSubstr
ate Buried Double hetero
When a semiconductor laser having a diameter of 5.5structure was manufactured, a high-quality wafer with little in-plane variation in device characteristics was obtained.
（力発明の詳細
な説明せるとおり、本発明によれば、基板上に均一な厚
さの成長層を形成することを可能とする、液相エピタキ
シャル成長方法を提供することができる。(As described in detail, the present invention can provide a liquid phase epitaxial growth method that makes it possible to form a growth layer with a uniform thickness on a substrate.
第１図は、本発明の要旨である低融点金属層の形成され
た基板の断面図であり、第２図は、本実施例において使
用されるＬＰＥ装置の側方断面図である。
１・・・・・・基板（ｎＩｎＰ） 、２・・・・・・イ
ンジウム（Ｉｎ） Ｗ、１１・・・・・・成長用ボート
の台部、１２・・・・・・台部に設けられた四部の底面
、２１・・・・・・成長用ボートのスライダ部、２２・
・・・・・スライダ部に設けられた溶液溜のカバー、３
１．３２．３３・・・・・・成長溶液。
（１１）
第１図
莞２図FIG. 1 is a sectional view of a substrate on which a low melting point metal layer, which is the gist of the present invention, is formed, and FIG. 2 is a side sectional view of an LPE apparatus used in this embodiment. 1...Substrate (nInP), 2...Indium (In) W, 11...Setting part of the growth boat, 12...Provided on the stand part Bottom surface of the four parts, 21...Slider part of the growth boat, 22.
・・・・・・Cover of the solution reservoir provided in the slider part, 3
1.32.33...Growth solution. (11) Figure 1, Figure 2
Claims (1)
て液相成長を行なうことを特徴とする、液相エピタキシ
ャル成長方詠。A liquid phase epitaxial growth method characterized in that liquid phase growth is performed by interposing molten metal between the back surface of a substrate for liquid phase growth and a holding member.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23375082A JPS59124713A (en) | 1982-12-29 | 1982-12-29 | Liquid phase epitaxial growth method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23375082A JPS59124713A (en) | 1982-12-29 | 1982-12-29 | Liquid phase epitaxial growth method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59124713A true JPS59124713A (en) | 1984-07-18 |
Family
ID=16959986
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23375082A Pending JPS59124713A (en) | 1982-12-29 | 1982-12-29 | Liquid phase epitaxial growth method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59124713A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6686607B2 (en) * | 2001-05-22 | 2004-02-03 | Rohm Co., Ltd. | Structure and method for mounting a semiconductor element |
| JP2008106449A (en) * | 2006-10-23 | 2008-05-08 | Mitsuba Corp | Power window system with ventilatory function |
-
1982
- 1982-12-29 JP JP23375082A patent/JPS59124713A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6686607B2 (en) * | 2001-05-22 | 2004-02-03 | Rohm Co., Ltd. | Structure and method for mounting a semiconductor element |
| JP2008106449A (en) * | 2006-10-23 | 2008-05-08 | Mitsuba Corp | Power window system with ventilatory function |
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