JPS59124079A - Write protecting circuit of magnetic bubble memory device - Google Patents

Write protecting circuit of magnetic bubble memory device

Info

Publication number
JPS59124079A
JPS59124079A JP57233701A JP23370182A JPS59124079A JP S59124079 A JPS59124079 A JP S59124079A JP 57233701 A JP57233701 A JP 57233701A JP 23370182 A JP23370182 A JP 23370182A JP S59124079 A JPS59124079 A JP S59124079A
Authority
JP
Japan
Prior art keywords
write
bubble memory
circuit
magnetic bubble
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57233701A
Other languages
Japanese (ja)
Inventor
Motohiko Fukuhara
福原 元彦
Osamu Hirakawa
修 平川
Masashi Irie
入江 正志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57233701A priority Critical patent/JPS59124079A/en
Publication of JPS59124079A publication Critical patent/JPS59124079A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To obtain a write protecting circuit which inhibits the writing operation of information securely by turning off a write current supply circuit for a magnetic bubble generator during write protection. CONSTITUTION:A switch S is turned off in response to a write protection signal and the supply of a write current to the magnetic bubble generating gate 8 of a bubble memory device 7 through a bubble generating gate driving circuit 5 is stopped. This write protection which is not based upon the program control of a CPU that malfunctions in case of an instantaneous break of an electric power supply, etc., is employed to obtain the write protecting circuit which inhibits the information writing operation securely.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は磁気バブルメモリ装置のライトプロテクト回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a write protect circuit for a magnetic bubble memory device.

(2)技術の背景 磁気バブルメモリは機械的駆動要素を全く含まない固体
素子で構成され、消費電力少なく、不揮発性でかつ高密
度に記録できる利点を有し、近年情報処理装置の記録媒
体をして増々利用されるようになっている。ところで一
度記録した情報を保存しておく必要のある場合は、誤っ
て新しい情報を書込んで以前の情報を消去しないよう書
込禁止(ライトプロテクト)回路が設けられている。こ
の方法は一般には端子のストラップ等により発生したラ
イトプロテクト信号を磁気バブルメモリコントローラへ
転送し、コントローラでは内部のC−PUのプログラム
によって書込みの禁止をしている。
(2) Background of the technology Magnetic bubble memory is composed of a solid-state element that does not contain any mechanical driving elements, and has the advantages of low power consumption, non-volatility, and high-density recording, and has recently become a popular recording medium for information processing devices. It is becoming increasingly used. By the way, if it is necessary to preserve the information once recorded, a write protect circuit is provided to prevent erroneously writing new information and erasing the previous information. In this method, a write protect signal generated by a terminal strap or the like is generally transferred to a magnetic bubble memory controller, and writing is prohibited in the controller by an internal CPU program.

第1図に示すものは磁気バブルメモリカセットにおける
従来のライトプロテクト回路の例であり、カセット体1
上部にスライド可能に設けられたライトプロテクトキー
3により簡単にライトプロテクトが行えるようになって
いる。
What is shown in Figure 1 is an example of a conventional write protect circuit in a magnetic bubble memory cassette.
Write protection can be easily performed using a write protection key 3 that is slidably provided at the top.

ライトプロテクトキー3を矢印方向にスライドした状態
にしてバブルカセット体1をカセットホルダ2に差込む
と、マイクロスイッチ4が動作して、ライトプロテクト
信号がコントローラ6に転送されるようになっている。
When the bubble cassette body 1 is inserted into the cassette holder 2 with the write protect key 3 slid in the direction of the arrow, the microswitch 4 is operated and the write protect signal is transferred to the controller 6.

(3)従来技術と問題点 従来のライトプロテクト回路では前述したようにライト
プロテクト信号をコントローラ6に転送し、コントロー
ラ6内のCPUのプログラムによって書込み禁止が行わ
れている。
(3) Prior Art and Problems In the conventional write protect circuit, as described above, the write protect signal is transferred to the controller 6, and writing is prohibited by the program of the CPU in the controller 6.

゛しかしながら従来の方法では装置の電源オン/オフ時
、あるいは電源の瞬断があるとCPUの動作保証されな
い状態が発生し、謂ゆるCP’Uが暴走する。
However, in the conventional method, when the power of the device is turned on and off, or when there is a momentary interruption of the power supply, a state occurs in which the operation of the CPU is not guaranteed, and the so-called CPU'U runs out of control.

この場合板にライトプロテクト信号がオンになっている
状態でも、誤って書込みを行ってしまい、この結果以前
の情報が消えてし才うということが起る。
In this case, even if the write protect signal is on the board, writing may be performed by mistake, resulting in the previous information being erased.

(4)発明の目的 本発明の目的はこのような従来の問題点を解消するもの
で、情報の書込み動作の禁止が確実に遂行できるライト
プロテクト回路を提供するものである。
(4) Object of the Invention An object of the present invention is to solve the above-mentioned conventional problems, and to provide a write protect circuit that can reliably inhibit the writing operation of information.

(5)発明の構成 上記本発明の目的は磁気バブルメモリに対するライトプ
ロテクト時に、コントローラ側から該バブルメモリの磁
気バブル発生器に対する書込電流供給回路を遮断するこ
とを特徴とする磁気バブルメモリ装置のライトプロテク
ト回路により達成される。
(5) Structure of the Invention The object of the present invention is to provide a magnetic bubble memory device, characterized in that when writing protection is applied to a magnetic bubble memory, a write current supply circuit to a magnetic bubble generator of the bubble memory is cut off from the controller side. This is achieved by a write protection circuit.

(6)発明の実施例 次に図面により本発明の詳細な説明する。(6) Examples of the invention Next, the present invention will be explained in detail with reference to the drawings.

第2図は本発明の第1の実施例回路図である。FIG. 2 is a circuit diagram of a first embodiment of the present invention.

バブルメモリにおける情報書込みはバブルメモリデバイ
ス7のチップ上に形成されたバブル発生ゲート8にバブ
ル発生ゲート駆動回路5から電流を流すことにより行わ
れる。第1図の回路ではこのバブル発生ゲート駆動回路
5とデバイス7間にスイッチSを挿入し、ライトプロテ
クト時にこのスイッチをオフしている。なおライトプロ
テクト信号は従来通りコントローラ6に入力され、ライ
トプロテクト動作が行われる。
Information writing in the bubble memory is performed by passing current from the bubble generation gate drive circuit 5 to the bubble generation gate 8 formed on the chip of the bubble memory device 7. In the circuit shown in FIG. 1, a switch S is inserted between the bubble generation gate drive circuit 5 and the device 7, and this switch is turned off during write protection. Note that the write protect signal is input to the controller 6 as before, and a write protect operation is performed.

第3図は本発明の第2の実施例回路図であり、バブルメ
モリカセット装置に応用したものである。
FIG. 3 is a circuit diagram of a second embodiment of the present invention, which is applied to a bubble memory cassette device.

ライトプロテクト時にマイクロスイッチ4が動作すると
、この信号がコントローラ6に入力されると同時にバブ
ル発生ゲート駆動回路5とカセットの端子10間に接続
されているトランジスタ9をオフとする。
When the microswitch 4 operates during write protection, this signal is input to the controller 6 and simultaneously turns off the transistor 9 connected between the bubble generation gate drive circuit 5 and the terminal 10 of the cassette.

なおりセット端子1oはカセット1が接続されるとカセ
ット1内部のバブルメモリチップのバブル発生ゲートに
接続される。
When the cassette 1 is connected, the set terminal 1o is connected to the bubble generation gate of the bubble memory chip inside the cassette 1.

従ってライトプロテクト時はカセット1内のバブルメモ
リチップのバブル発生ゲートに電流が流れることはない
Therefore, during write protection, no current flows to the bubble generation gate of the bubble memory chip in the cassette 1.

なおトランジスタ9の代りに例えばリレー等の機械接点
を使用してもよい。
Note that a mechanical contact such as a relay may be used instead of the transistor 9.

(7)発明の詳細 な説明したように本発明のライトプロテクト回路による
と、バブルメモリのコントローラが異常動作してもバブ
ル発生ゲートに誤って電流が流れることがないのでライ
トプロテクト時に間違って情報を消してしまうことが完
全防止できる利点があり、バブルメモリを使用した情報
処理装置の信頼度向上が図れる。
(7) As described in detail, according to the write protection circuit of the present invention, even if the controller of the bubble memory operates abnormally, current will not erroneously flow to the bubble generation gate, so information will not be erroneously transmitted during write protection. This has the advantage that erasure can be completely prevented, and the reliability of information processing devices using bubble memory can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のライトプロテクト回路図例、第2図、第
3図は本発明の実施例によるライトプロテクト回路を示
す。 図において1はバブルカセット、2はホルダ、3はライ
トプロテクトキー、4はマイクロスイッチ、5はバブル
発生ゲート駆動回路、6はコントローラ、8はバブル発
生ゲート、9はトランジスタを示す。 Li−・〕ン、ゼ□1 垢 l 図 拓2図 Vce 第3 図 491−
FIG. 1 shows an example of a conventional write protect circuit, and FIGS. 2 and 3 show write protect circuits according to embodiments of the present invention. In the figure, 1 is a bubble cassette, 2 is a holder, 3 is a write protect key, 4 is a microswitch, 5 is a bubble generation gate drive circuit, 6 is a controller, 8 is a bubble generation gate, and 9 is a transistor. Li-・]n, ze□1 Grain l Illustration 2 Figure Vce No. 3 Figure 491-

Claims (1)

【特許請求の範囲】[Claims] 磁気バブルメモリにおけるライトプロテクト時に、コン
トローラ側から該バブルメモリの磁気バブル発生器に対
する書込電流供給回路を遮断するこ吉を特徴とする磁気
バブルメモリ装置のライトプロテクト回路。
A write protect circuit for a magnetic bubble memory device, characterized in that, during write protection in a magnetic bubble memory, a write current supply circuit to a magnetic bubble generator of the bubble memory is cut off from the controller side.
JP57233701A 1982-12-29 1982-12-29 Write protecting circuit of magnetic bubble memory device Pending JPS59124079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57233701A JPS59124079A (en) 1982-12-29 1982-12-29 Write protecting circuit of magnetic bubble memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57233701A JPS59124079A (en) 1982-12-29 1982-12-29 Write protecting circuit of magnetic bubble memory device

Publications (1)

Publication Number Publication Date
JPS59124079A true JPS59124079A (en) 1984-07-18

Family

ID=16959187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57233701A Pending JPS59124079A (en) 1982-12-29 1982-12-29 Write protecting circuit of magnetic bubble memory device

Country Status (1)

Country Link
JP (1) JPS59124079A (en)

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