JPS5912311A - Capacitor type converter - Google Patents
Capacitor type converterInfo
- Publication number
- JPS5912311A JPS5912311A JP12099382A JP12099382A JPS5912311A JP S5912311 A JPS5912311 A JP S5912311A JP 12099382 A JP12099382 A JP 12099382A JP 12099382 A JP12099382 A JP 12099382A JP S5912311 A JPS5912311 A JP S5912311A
- Authority
- JP
- Japan
- Prior art keywords
- pulse width
- voltage
- width signal
- capacitance
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
- G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
- G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
- G01D5/24—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
- G01D5/241—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance by relative movement of capacitor electrodes
- G01D5/2417—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance by relative movement of capacitor electrodes by varying separation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measuring Fluid Pressure (AREA)
- Transmission And Conversion Of Sensor Element Output (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、圧力、差圧等の被測定量に応じて可動電極が
変位し容量が変化する可変コンデンサを用いた容量式変
換器に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a capacitive transducer using a variable capacitor whose movable electrode is displaced and whose capacitance changes depending on a measured quantity such as pressure or differential pressure.
一般に容量式変換器においては、可変コンデンサに並列
に存在するストレイ容量の影響を受けて直線性が悪い欠
点があった。また圧力変換器のように可動電極が被測定
量に応じて変位する金属ダイヤスラムの場合には、被測
定量と容量との関係が双曲線で表わせるものが多く、被
測定量と出力とが非直線になっていた。In general, capacitive converters have the disadvantage of poor linearity due to the influence of stray capacitance that exists in parallel with the variable capacitor. In addition, in the case of metal diaphragms such as pressure transducers in which the movable electrode is displaced according to the measured quantity, the relationship between the measured quantity and the capacitance is often expressed as a hyperbola, and the measured quantity and output are often expressed as a hyperbola. It was non-linear.
本発明は、被測定量に応じて容量が変化する可変コンデ
ンサと容量が一定な基準コンデンサを用い、基準コンデ
ンサと可変コンデンサの容量の差に応じたデユティレシ
オの第１のパルス幅信号およびいずれか一方の容量に応
じたデユティレシオの第２のパルス幅信号を得、第１の
パルス幅信号で設定電圧をオンオフした後平滑して出力
電圧を得るとともに、この出力電圧の一部を基準電圧に
加算し、この加算電圧に第２のパルス幅信号のデユティ
レシオの逆数を乗じた値を設定電圧とすることによって
、上述の如き非直線性を有効に補償できる容量式変換器
を実現したものである。The present invention uses a variable capacitor whose capacitance changes depending on a measured quantity and a reference capacitor whose capacitance is constant, and generates a first pulse width signal with a duty ratio corresponding to the difference in capacitance between the reference capacitor and the variable capacitor, and either one of the first pulse width signals and the other. A second pulse width signal with a duty ratio corresponding to the capacitance is obtained, the set voltage is turned on and off using the first pulse width signal, and then smoothed to obtain an output voltage, and a part of this output voltage is added to the reference voltage. By setting the set voltage to a value obtained by multiplying this added voltage by the reciprocal of the duty ratio of the second pulse width signal, a capacitive converter that can effectively compensate for the above-mentioned nonlinearity is realized.
第１図は本発明変換器の一実施例を示す接続図である。FIG. 1 is a connection diagram showing an embodiment of the converter of the present invention.
図において、Ｃ４は可変コンデンサで、圧力等の被測定
量に応じて変位する可動電極１０とこの可動電極１０に
対向配置されている固定電極１１とで構成されている。In the figure, C4 is a variable capacitor, which is composed of a movable electrode 10 that is displaced according to a measured quantity such as pressure, and a fixed electrode 11 that is disposed opposite to the movable electrode 10.
ｃ２ｔ−ｉ容量が一定な基準コンデンサである。ｃ／ｐ
は容量パルス幅変換回路で、可変コンデンサＣ４と基準
コンデンサＣ２の容量変化を検出し、Ｃ１の容１″に応
じたデュテ１
イレシオ下のパルス幅信号ＰＷ、と、Ｃ２の容量ｔ２
・
に応じたデユティレシオ−〒−のパルス幅信号ＰＷ２お
よびＣ２とＣ１の容量の差に応じたデユティレジｔ２−
ｔ１ ・
オー７−のパルス幅信号ＰＷ３を出力するものである。c2t-i is a reference capacitor with constant capacitance. c/p
is a capacitance pulse width conversion circuit that detects the capacitance change of the variable capacitor C4 and the reference capacitor C2, and converts the pulse width signal PW under the duty 1 ratio according to the capacitance 1'' of C1, and the capacitance t2 of C2.
- Duty ratio according to the pulse width signal PW2 of 〒- and duty register t2- according to the difference in capacitance between C2 and C1.
It outputs a pulse width signal PW3 of t1 and 7-.
ｃ／ｐの具体的な構成の一例を第２図に示す。第２図に
おいて、ｓｗ、、、ｓｗ、２はそれぞれコンデ／すＣ，
、Ｃ２に並列に接続された電界効果トランジスタ等のス
イッチ、ＰＧは周期Ｔおよび時間幅ｔ。An example of a specific configuration of c/p is shown in FIG. In Fig. 2, sw, , sw, 2 are respectively conde/suC,
, C2 are connected in parallel to a switch such as a field effect transistor, and PG has a period T and a time width t.
が一定なパルスＰ、ヲ出力するパルス発生器、８人、、
ＢＡ２は各々バッファアンプ、ｃｐｌ、ｃｐ２は各々コ
ンパレータ、Ｇ、 、 Ｇ２． Ｇ、 は各々ノアゲ
ート、 ＩＶはインバータである。ｓｗｌ、、ｓｗ、２
はＰＧからの第３図（イ）に示す如き一定周期Ｔで一定
パルス幅ｔ８のパルスＰ、によって同時に駆動され、１
ｓ の期間オンになる。オンになるとＣ，、Ｃ２に充電
されていた電荷が放電し、オフになると抵抗Ｒ１１１Ｒ
＋２を介して直流電源ｖａよυの電流でＣ４゜Ｃ２が充
電される。その結果Ｃ，，Ｃ２の充電電圧■。１＋Ｖｃ
２（ｄ第３図（ロ）に示すようになる。コンパレータＣ
Ｐ、、ＣＰ２でＢＡ、、ＢＡ２を介して与えられるｖｃ
ｌ、 ｖｃ２ を監視し、ｖｃ７． ｖｃ２ が一
定値Ｖｂに達するとｃｐ、、ｃｐ２の出力が第３図（ハ
）、に）に示すように反転する。Ｖｃ４． Ｖ、 が■
５ に達するまでの時間をｉ、＋ｔ２とすると、ノア
ゲートＧ、、Ｇ２゜Ｇ５ の出力端にはそれぞれ第３
図（ホ）、（へ）、（ト）に示すようにデユティレシオ
がｔｔ、、 ｔｚ−９ｔｚ−ｔ＞なるＴＴ
Ｔ
パルス幅信号ｐｗ、 、 Ｐｗ２． ｐｗ、が生ずる。A pulse generator that outputs a constant pulse P, 8 people,
BA2 is a buffer amplifier, cpl, cp2 is a comparator, G, , G2. G and are respectively Noah gates, and IV is an inverter. swl,,sw,2
are simultaneously driven by a pulse P of a constant period T and a constant pulse width t8 as shown in FIG. 3(a) from the PG, and 1
It is turned on for a period of s. When it turns on, the charge charged in C, C2 is discharged, and when it turns off, the resistor R111R
C4°C2 is charged with the current of the DC power supply va through υ via +2. As a result, the charging voltage of C, C2 is ■. 1+Vc
2 (d) as shown in Figure 3 (b). Comparator C
P, , vc given via BA, , BA2 at CP2
l, monitor vc2, vc7. When vc2 reaches a constant value Vb, the outputs of cp and cp2 are inverted as shown in FIG. Vc4. V, is ■
If the time it takes to reach 5 is i, +t2, then the output terminals of the NOR gates G, , G2 and G5 each have a third gate.
As shown in Figures (E), (F), and (G), the duty ratio is tt, tz-9tz-t>TT.
T pulse width signals pw, , Pw2. pw is generated.
そして、ｊ１ｓｔ２ は抵抗Ｊ１ ＋ ”１２の値を
Ｒ，、＝ Ｒ，２： Ｒとすると、
ｔ、 ＝ ｋ Ｃ，、、、、、、山（１）ｔ、 ＝ ｋ
Ｃ２・・曲・・・（２）ただし、ｋ＝ ” ｔｎ （
１−Ｖｂ／Ｖ＆）で与えられるので、ｐｗ、 、 Ｐｗ
２． ｐｗＢのデユティレシオはそれぞれＣ１の容量、
Ｃ２の容量およびＣ２とＣ５の容量の差に応じたものと
なる。Then, j1st2 is the resistance J1 + "12, and if the value of it is R,, = R,2: R, then t, = k C,,,,,,,,mountain (1) t, = k
C2...Song...(2) However, k= ” tn (
1-Vb/V&), so pw, , Pw
2. The duty ratio of pwB is the capacity of C1,
This depends on the capacitance of C2 and the difference between the capacitances of C2 and C5.
再び第１図において、ＳＷｌ、ＳＷ２は各々スイッチで
、ＳＷはパルス幅信号ＰＷ２で駆動され、ＳＷ２はパル
ス幅信号ｐｗ３で駆動されてそれぞれ設定電圧ｖｒをオ
ンオフするものである。なおスイッチｓｗ、 、 ｓｗ
２としては電界効果トランジスタ等の電子スイッチが好
適である。ＩＣに演算増幅器ｏｐ。Referring again to FIG. 1, SWl and SW2 are switches, SW is driven by a pulse width signal PW2, and SW2 is driven by a pulse width signal pW3 to turn on and off the set voltage vr, respectively. Note that the switches sw, , sw
2 is preferably an electronic switch such as a field effect transistor. Operational amplifier op in IC.
を用いた積分回路で、入力←）に抵抗Ｒ１を介して加え
られる設定電圧Ｖ をスイッチＳＷ、でオンオフした電
圧と、抵抗Ｒ２ｆ、介して加えられる出力電圧Ｖ。と、
抵抗Ｒ３を介して加えられる基準電圧ｖ８．とを加算積
分して設定電圧ｖｒを得るものである。ＦＣは演算増幅
器″６Ｐ２を用いたフィルタ回路で、ＳＷ２でオンオフ
された電圧を平滑して出力電圧ｖ０を得るものである。This is an integrator circuit that uses a set voltage V applied to the input ←) via a resistor R1, which is turned on and off by a switch SW, and an output voltage V applied via a resistor R2f. and,
Reference voltage v8. applied via resistor R3. The set voltage vr is obtained by adding and integrating the values. FC is a filter circuit using an operational amplifier 6P2, which smoothes the voltage turned on and off by SW2 to obtain an output voltage v0.
このように構成した本発明変換器において、Ｐｗ２の周
期Ｔが積分回路ＩＣの時定数ＣＩＲ，に比較し十分に短
かく、定常状態に達しているときの積分回路ＩＣの出力
電圧の直流分をｖｒ とすると、積分回路ＩＣの平均入
力電流は零となるので、フィルタ回路ＦＣの出力電圧の
直流分をＶ とすると次式の関係が成立する。In the converter of the present invention configured as described above, the period T of Pw2 is sufficiently short compared to the time constant CIR of the integrating circuit IC, and the DC component of the output voltage of the integrating circuit IC when the steady state is reached is vr, the average input current of the integrating circuit IC is zero, so if the DC component of the output voltage of the filter circuit FC is V, the following relationship holds true.
ｔ
ニー、２ ｊＬＬユ。０ ・・曲（３）Ｒ，Ｔ
Ｒ２Ｈ。t nee, 2 jLL yu. 0...Song (3) R, T
R2H.
同様にパルス幅信号ｐｗｓの周期Ｔがフィルタ回路ＦＣ
の時定数ＣＦＲ５に比較し十分に短かいので、定常状態
に達しているときのフィルタ回路ＦＣの出力電圧の直流
分Ｖ は
Ｒｓｔ２−ｔｌ
ｖｏ＝−頁°７°ｖｒ 、、、、“（４）とな
る。（３）式と（４）式からＶ は、６
ただし、 Ａ１Ｒ４
となる。このようにｖｏはＰｗ、のパルス幅（１２−１
，）に大きく依存しているので、ｊ２＝＝ｉ、 のと
きの出力の点（零点）はスイッチｓｗ、、ｓｗ２の浮遊
容量。Similarly, the period T of the pulse width signal pws is the filter circuit FC.
Since the time constant CFR5 is sufficiently short compared to the time constant CFR5, the DC component of the output voltage of the filter circuit FC when the steady state is reached is Rst2−tl vo=−page°7°vr ). From equations (3) and (4), V is 6, where A1R4 is obtained. In this way, vo is the pulse width of Pw (12-1
, ), the output point (zero point) when j2==i, is the stray capacitance of the switches sw, , sw2.
抵抗Ｒ，、Ｒ２，Ｒ，、Ｒ４，Ｒ５の温度変化などの影
響を受けず、零点の安定性がよい。またパルスＰ。It is not affected by temperature changes in the resistors R, R2, R, R4, and R5, and has good zero point stability. Also Pulse P.
の周期Ｔが変化してもその影響を受けない。（５）式に
（１）式と（２）式を代入すると、ｖＵ次式で表わすこ
とができる。Even if the period T of is changed, it is not affected by the change. By substituting equations (1) and (2) into equation (5), vU can be expressed as the following equation.
一方可変コンデンサＣ１の容量は変位量Ｘに対し）初期
容量をＣ８，可動電極１０と固定電極１１間の基準間隔
をｄ（ｘ＝ｏのとき）およびストレイ容量をＣ８とする
と、
の関係で変化する。よって出力電圧Ｖ は、・・・・・
・（８）
となる。ここで、
を満足するように可変抵抗Ｒ５の抵抗値を調整すれば、
出力電圧Ｖ。は、
・・・・・・ＯＩ
となシ、Ｃｏ ＋ ”２ ＊ Ｃｓ ＊ ”２ ＊ Ｒ
５＊ ｄ ＋ ｖｓｌ は一定値であるので、出力電
圧Ｖ。は変位量ｘに正確に対応したものとなる。なお、
基準コンデンサｃ２の容ｉｆ、Ｃ２＝Ｃｏ＋Ｃ，に選べ
ば、出力電圧Ｖ。は、Ｒ１１Ｚ
。 ８３． ・・ °°曲ａ”となる
。On the other hand, the capacitance of the variable capacitor C1 changes with respect to the amount of displacement do. Therefore, the output voltage V is...
・(8) becomes. Here, if the resistance value of variable resistor R5 is adjusted to satisfy the following,
Output voltage V.・・・・・・OI Tonashi, Co + ”2 * Cs * ”2 * R
5* d + vsl is a constant value, so the output voltage V. corresponds accurately to the amount of displacement x. In addition,
If the capacity of the reference capacitor c2 is chosen as C2=Co+C, the output voltage will be V. is R11Z. 83.・・・°°song a”.
が大きくなる程増加しＲ，＞ Ｃ２Ｃｓ になるよう
２
に調整すれば、変位量２が大きくなる程増加率が減少す
るようになり、人出方関係を非直線にできる。しかもそ
の非直線性の大きさは抵抗値Ｒ３の値を変えることによ
って設定できる。したがって、例えば金属ダイヤスラム
で差圧や圧力を変位に変換する場合には、被測定量と可
動電極１０の変位量Ｘとの非直線を補正できる。すなわ
ちリニアライズができる。If the displacement amount 2 is adjusted to 2 so that it increases as the displacement amount 2 increases, and becomes R,>C2Cs, the increase rate decreases as the displacement amount 2 increases, and the relationship in the number of people can be made non-linear. Moreover, the magnitude of the nonlinearity can be set by changing the value of the resistance value R3. Therefore, when converting differential pressure or pressure into displacement using a metal diaphragm, for example, non-linearity between the amount to be measured and the amount of displacement X of the movable electrode 10 can be corrected. In other words, linearization is possible.
なお上述では、スイッチＳＷ、をパルス幅信号ｐｗ２で
駆動する場合を例示したが、第４図に示すようにパルス
幅信号ＰＷ、で駆動するようにしてもよい。この場合Ｖ
。は、
・・・・・・ａり
となり、Ｒ５の値を調整することによってリニアライズ
ができる。また上述では可変抵抗Ｒ３を調整する場合を
例示したが、第５図に示すように出力電圧Ｖｆ分圧抵抗
器ＲＶで分圧した後バッファアンプＢＡ、および抵抗Ｒ
５ヲ介して積分回路ＩＣに与えるようにしてもよい。こ
の場合は、分圧抵抗器ＲＶの分圧比をｎとすると、
となり、分圧比ｎｆ：調整することによってリニアライ
ズができる。さらに第５図に示すように基準電圧■８゜
を抵抗Ｒ６を介してフィルタ回路ＦＣの入力に与えれば
、抵抗Ｒ６の値を選ぶことによって零点を移動させるこ
とができる。なお第４図および第５図においてスイッチ
Ｓ’ｔＶ、 、 ＳＷ２の一端と基準点間に接続した抵
抗ｒ、 、 ｒ２１ｄ ８Ｗ、 、 ｓｗ２ の素子
や配線の浮遊容量の影響を除くためのものである。なお
抵抗ｒ１＊ｒ２ の代りにｓｗ、 、 ｓｗ２ と逆位
相でオンオフするスイッチとしてもよく、またｓｗ、
、 ｓｗ２ をトランスファスイッチとしてもよい。In the above description, the switch SW is driven by the pulse width signal pw2, but the switch SW may be driven by the pulse width signal PW as shown in FIG. In this case V
. is as follows, and linearization can be performed by adjusting the value of R5. In addition, although the case where the variable resistor R3 is adjusted is illustrated above, as shown in FIG.
Alternatively, the signal may be applied to the integrating circuit IC through the circuit 5. In this case, if the voltage dividing ratio of the voltage dividing resistor RV is n, then the voltage dividing ratio nf: can be linearized by adjusting it. Further, as shown in FIG. 5, if a reference voltage of 8 DEG is applied to the input of the filter circuit FC via a resistor R6, the zero point can be moved by selecting the value of the resistor R6. In addition, in Figures 4 and 5, the resistors r, , r21d 8W, , sw2 connected between one end of the switch S'tV, , SW2 and the reference point are used to eliminate the influence of stray capacitance of the elements and wiring. . Note that instead of the resistor r1*r2, a switch that turns on and off in the opposite phase to sw, , and sw2 may be used, or sw,
, sw2 may be a transfer switch.
以上説明したように本発明においては、被測定量に応じ
て容量が変化する可変コンデンサと容量が一定な基準コ
ンデンサを用い、基準コンデンサと可変コンデンサの容
量の差に応じたデュテイレジオの第１のパルス幅信号お
よびいずれか一方の容９に応じたデユティレシオの第２
のパルス幅信号を得て、第１のパルス幅信号で設定電圧
をオンオンした後平滑して出力電圧を得るとともに、こ
の出力電圧の一部を基準電圧に加算し、この加算電圧に
第２のパルス幅信号のデユティレシオの逆数を乗じ次位
を設定電圧とするようにしているので、簡単な構成で有
効に非直線性を補正できる容量式変換器が得られる。As explained above, in the present invention, a variable capacitor whose capacitance changes depending on the amount to be measured and a reference capacitor whose capacitance is constant are used, and the first pulse of the duty ratio is set according to the difference in capacitance between the reference capacitor and the variable capacitor. The second duty ratio according to the width signal and either capacity 9
Obtain a pulse width signal of Since the pulse width signal is multiplied by the reciprocal of the duty ratio and the next order is set as the set voltage, a capacitive converter that can effectively correct nonlinearity can be obtained with a simple configuration.
第１図は本発明変換器の一実施例を示す接続図、゛ 第
２図は本発明変換器に用いる容量パルス幅変換回路の具
体的な結成の一例を示す接続図、第３図はその動作説明
のための波形図、第４図および第５図は本発明変換器の
他の実施例を示す接続図である。Fig. 1 is a connection diagram showing one embodiment of the converter of the present invention, Fig. 2 is a connection diagram showing an example of a specific configuration of a capacitive pulse width conversion circuit used in the converter of the present invention, and Fig. 3 is its connection diagram. Waveform diagrams for explaining the operation, and FIGS. 4 and 5 are connection diagrams showing other embodiments of the converter of the present invention.
Claims (1)
量が一定な基準コンデンサと、基準コンデンサと可変コ
ンデンサの容量の差に応じたデユティレシオの第１のパ
ルス幅信号およびいずれか一方の容量に応じ几デユティ
レシオの第２のパルス幅信号を得る回路と、前記第１の
パルス幅信号で設定電圧をオンオンした後平滑して出力
電圧を得る手段と、この出力電圧の一部を基準電圧に加
算し、この加算電圧に前記第２のパルス幅信号のデユテ
ィレシオの逆数を乗算し次位を前記設定電圧とする手段
とを有する容量式変換器。A variable capacitor whose capacitance changes according to the measured quantity, a reference capacitor whose capacitance is constant, a first pulse width signal of a duty ratio according to the difference in capacitance between the reference capacitor and the variable capacitor, and a first pulse width signal according to the capacitance of either one. a circuit for obtaining a second pulse width signal with a duty ratio; a means for turning a set voltage on and off using the first pulse width signal and then smoothing it to obtain an output voltage; , means for multiplying the added voltage by the reciprocal of the duty ratio of the second pulse width signal to obtain the set voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12099382A JPS5912311A (en) | 1982-07-12 | 1982-07-12 | Capacitor type converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12099382A JPS5912311A (en) | 1982-07-12 | 1982-07-12 | Capacitor type converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5912311A true JPS5912311A (en) | 1984-01-23 |
Family
ID=14800120
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12099382A Pending JPS5912311A (en) | 1982-07-12 | 1982-07-12 | Capacitor type converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5912311A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62211533A (en) * | 1986-03-13 | 1987-09-17 | Yokogawa Electric Corp | Capacity type converting device |
| JP2018040711A (en) * | 2016-09-08 | 2018-03-15 | 株式会社デンソーテン | Capacitor capacity diagnostic device and capacitor capacity diagnostic method |
-
1982
- 1982-07-12 JP JP12099382A patent/JPS5912311A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62211533A (en) * | 1986-03-13 | 1987-09-17 | Yokogawa Electric Corp | Capacity type converting device |
| JPH0545171B2 (en) * | 1986-03-13 | 1993-07-08 | Yokogawa Electric Corp | |
| JP2018040711A (en) * | 2016-09-08 | 2018-03-15 | 株式会社デンソーテン | Capacitor capacity diagnostic device and capacitor capacity diagnostic method |
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