JPS59114616A - Dc constant-voltage circuit - Google Patents
Dc constant-voltage circuitInfo
- Publication number
- JPS59114616A JPS59114616A JP22454882A JP22454882A JPS59114616A JP S59114616 A JPS59114616 A JP S59114616A JP 22454882 A JP22454882 A JP 22454882A JP 22454882 A JP22454882 A JP 22454882A JP S59114616 A JPS59114616 A JP S59114616A
- Authority
- JP
- Japan
- Prior art keywords
- operational amplifier
- voltage
- units
- output
- constant voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/59—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
Description
【発明の詳細な説明】 (a) 発明の技術分野 本発明は直流定電圧回路の改良に関する。[Detailed description of the invention] (a) Technical field of the invention The present invention relates to improvements in DC constant voltage circuits.
(b)−技術の背景
従来よシミ気構器における直流電源供給用として直流定
電圧回路による電源装置が広く利用されているが、他の
多くの電気機器や部品類における同一属性内の体系と同
様に、その保守性、信頼性および経済性を向上させるた
め該電源装置はその出力容量の区分に従って標準化およ
び系列化した体系として提供されている。(b) - Background of the technology Conventionally, power supplies using DC constant voltage circuits have been widely used to supply DC power to air conditioners, but they are also used in systems with the same attributes in many other electrical devices and parts. Similarly, in order to improve maintainability, reliability, and economic efficiency, the power supply devices are provided as standardized and series-based systems according to their output capacity classifications.
(c) 従来技術と問題点
従来より大容量の定電圧電源装置システムを構成する場
合は第1図に示す従来の直流定電圧電源装置におけるブ
ロック図のように、複数の同一仕様による低容量ユニッ
トを並列接続運用例えばと\では並列3ユニツトを充当
すると共に容量規格を低減使用して冗長度により信頼性
の向上を計る手段が慣用されている。(c) Prior art and problems When configuring a constant voltage power supply system with a larger capacity than the conventional one, as shown in the block diagram of a conventional DC constant voltage power supply shown in Figure 1, multiple low capacity units with the same specifications are used. For example, in parallel connection operation, it is customary to allocate three units in parallel and reduce the capacity standard to improve reliability through redundancy.
図においてla 、lb 、lcは直流定電圧ユニット
、2は負荷およびEは直流入力電源である。更に11は
第1演算増幅器、12は第2演算増幅器、13は第3演
算増幅器、Qは出力電流制御用トランジスタ、zDはツ
ェナダイオード、DIはダイオードおよびR8,!。、
4は抵抗である。ユニット1a+lb*lcは同一特性
の機能を備えて並列接続され同一の負荷2へ出力電流を
供給する。ユニットla 、lb 、lcは共通の構成
で同一特性に設定されているが各ユニット相互の定電圧
設定の僅小な誤差によって出力電流の負担が大きく片寄
ってV3ずつの平衝が崩れたことKよる信頼度低下を防
ぐため、第3演算器13による各ユニット間における出
力電流の均等化を計っている。ユニット1aにおける出
力電流検出抵抗R1の電圧降下によって得られた検出信
号を第2演算増幅器12は検出信号に比例した電圧の増
幅出力信号S1、を送出するが該増幅出力信号S1を第
3演算増幅器13の反転入力端子に入力すると共に、例
えば信号Slを他のユニッ)lbにおける第3演算増幅
器13の非反転端子に、また同ユニ、ト1bにおける増
幅出力信号S、を図示省略したがユニッ)lcにおける
第3演算増幅器13の非反転端子に、更にユニット1c
における増幅信号S、をユニッ)laの第3増幅増幅器
13の非反転端子に印加入力するようにして隣接ユニッ
トの出力電流における検出電圧に比例する増幅出力信号
とこ\ではSlとS、の比較動作を行わせれば組合せと
なる全ユニット間において各演算増幅器13の出力信号
中正相差、即ち各演算増幅器13の反転端子に得られる
自己ユニットの第2演算増幅器12よりの増幅出力信号
SIが非反転端子に得られる他ユニットよシの増幅出力
信号を下廻るときに得られる比較出力信号をダイオード
D、により抵抗R3に印加する。この抵抗R4は定電圧
制御のためツェナダイオードZDにより形成された電圧
が抵抗R3+R4に印加されているので第1演算増幅器
の非反転端子には基準電圧が印加されると共に抵抗R4
には電流制御のだめの比較出力信号による電流も加算さ
れ、抵抗R1→演算増幅器12の増幅出力信号が増加す
るように帰還し、演算増幅器13の比較出力信号がO即
ち反転および非反転端子への入力信号が等しくなるよう
に作動して自己ユニットにおける出力電流を制御するこ
とにより、各ユニット間における出力電流を平衝せしめ
る手段を備えている。しかし複数のユニット中1個が故
障して例えばユニッ)laにおける出力電流が無くなっ
た場合は例えば演算増幅器12の増幅出力信号S、と他
のS、を受信して出力電流を均等化負担制御していたユ
ニット1bの演−算増幅器13以降の機能が成立しなく
なシ、並列接続運用における出力電流の均等化負担制御
の目的を果すことが出来なくなる欠点を備えていた。In the figure, la, lb, and lc are DC constant voltage units, 2 is a load, and E is a DC input power source. Furthermore, 11 is a first operational amplifier, 12 is a second operational amplifier, 13 is a third operational amplifier, Q is an output current control transistor, zD is a Zener diode, DI is a diode, and R8,! . ,
4 is resistance. Units 1a+lb*lc have functions with the same characteristics, are connected in parallel, and supply output current to the same load 2. Units la, lb, and lc have a common configuration and are set to the same characteristics, but due to a slight error in the constant voltage settings of each unit, the load on the output current is greatly biased, and the equilibrium of each V3 is disrupted. In order to prevent a decrease in reliability due to this, the third arithmetic unit 13 equalizes the output current between each unit. The second operational amplifier 12 sends out an amplified output signal S1 with a voltage proportional to the detected signal, which is obtained by a voltage drop across the output current detection resistor R1 in the unit 1a. At the same time, for example, the signal Sl is input to the non-inverting terminal of the third operational amplifier 13 in another unit) lb, and the amplified output signal S in the same unit, lb is also input to the inverting input terminal of the third operational amplifier 13 (although not shown in the figure). The unit 1c is further connected to the non-inverting terminal of the third operational amplifier 13 in the lc.
The amplified signal S, in the unit) is applied to the non-inverting terminal of the third amplification amplifier 13 of the unit la, and the amplified output signal proportional to the detected voltage in the output current of the adjacent unit is compared with Sl and S in this case. If this is done, the positive phase difference in the output signal of each operational amplifier 13 between all the units forming the combination, that is, the amplified output signal SI from the second operational amplifier 12 of the own unit obtained at the inverting terminal of each operational amplifier 13 will be the non-inverting terminal. A comparison output signal obtained when the amplified output signal obtained from the other unit is lower than the amplified output signal obtained from the other unit is applied to the resistor R3 by the diode D. This resistor R4 has a voltage formed by a Zener diode ZD applied to the resistor R3+R4 for constant voltage control, so a reference voltage is applied to the non-inverting terminal of the first operational amplifier and the resistor R4
The current due to the comparison output signal of the current control device is also added to the resistor R1, and the amplified output signal of the operational amplifier 12 is fed back to increase, and the comparison output signal of the operational amplifier 13 is output to O, that is, the inverting and non-inverting terminals. Means is provided for equalizing the output currents between each unit by operating to equalize the input signals and controlling the output currents in the own units. However, if one of the plurality of units fails and the output current in unit (a) disappears, for example, the amplified output signal S of the operational amplifier 12 and the other S are received to control the output current by equalizing the load. The function of the unit 1b after the operational amplifier 13 is no longer established, and the purpose of output current equalization load control in parallel connection operation cannot be achieved.
(d) 発明の目的
本発明の目的は上記の欠点を除去するため正常時は勿論
複数のユニットの内1個が故障して電流供給機能を失っ
た場合でも残シのユニットが電流供給における均等化負
担動作を失うことなく作動する直流定電圧回路を提供し
ようとするものである。(d) Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks, and in order to eliminate the above-mentioned drawbacks, even when one of the plurality of units breaks down and loses its current supply function, the remaining units can provide an equal current supply. The present invention aims to provide a DC constant voltage circuit that operates without losing its load-bearing operation.
(e) 発明の構成
この目的は複数の直流定電圧電源ユニットを並列接続運
用する直流定電圧電源システムにおいて、該直流定電圧
電源ユニットは基本電圧と電源ユニ、トにおける出力電
圧を比較して出力制御トランジスタを帰還制御する第1
演算増幅器、出力回路に挿入した直列抵抗による出力電
源検出電圧を増幅する第2演算増幅器および自己ユニッ
トにおける該増幅出力信号と全ユニットにおける増幅出
力信号の論理和による最大電圧信号とを比較する第3演
算増幅器を備えてなり、第1演算増幅器は出力電圧を帰
還して定電圧制御すると共に、該第3演算増幅器による
比較出力信号を基準電圧による入力信号に、重量加算し
て、並列接続する相互ユニット間に・おける電流負荷を
均等化制御することを特徴とする直流定電圧回路を提供
することによって達成することが出来る。(e) Structure of the Invention The object of the present invention is to compare the basic voltage with the output voltage of the power supply units and output voltages in a DC constant voltage power supply system in which a plurality of DC constant voltage power supply units are connected and operated in parallel. A first circuit that performs feedback control on the control transistor.
an operational amplifier, a second operational amplifier that amplifies the output power detection voltage by a series resistor inserted in the output circuit; and a third operational amplifier that compares the amplified output signal in its own unit with the maximum voltage signal obtained by the logical sum of the amplified output signals in all units. The first operational amplifier feeds back the output voltage to perform constant voltage control, and adds the comparison output signal from the third operational amplifier to the input signal based on the reference voltage by weight, and connects the two in parallel. This can be achieved by providing a DC constant voltage circuit that is characterized by equalizing current loads between units.
(f) 発明の実施例
以下図面を参照しつ\本発明の一実施例について説明す
る。第2図は本発明の一実施例における直流定電圧装置
によるブロック図を示す。図においてlaa m lb
b、iceは直流定電圧ユニット、2は負荷およびEは
直流入力電源である。更に11は第1演算増幅器、12
は第2演算増幅器、13は第3演算増幅器、Qは出力電
流制御用トランジスタ、zDはツェナダイオード、D、
、D、はダイオードおよびR1+2 +8 +4は抵抗
である。本発明の一実施例における部材構成の符号で従
来の符号と共通の部材は従来におけるそれと機能および
特性も共通である。従って本発明の一実施例においても
ダイオードD2に関連する出力電流均等化負担動作を除
いては出力電圧とツェナダイオードZDによる基準電圧
とを比較増幅して演算増幅器llがトランジスタQを制
御して単独ユニット時における定電圧機能を行うことに
は従来と変シない。(f) Embodiment of the Invention An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 shows a block diagram of a DC voltage regulator according to an embodiment of the present invention. In the figure laa m lb
b, ice is a DC constant voltage unit, 2 is a load, and E is a DC input power source. Furthermore, 11 is a first operational amplifier, 12
is the second operational amplifier, 13 is the third operational amplifier, Q is the output current control transistor, zD is the Zener diode, D,
, D, are diodes and R1+2 +8 +4 are resistors. The members in the embodiment of the present invention that have the same reference numerals as those in the conventional system also have the same functions and characteristics as those in the conventional system. Therefore, in one embodiment of the present invention, except for the output current equalization burden operation related to the diode D2, the output voltage and the reference voltage by the Zener diode ZD are compared and amplified, and the operational amplifier ll controls the transistor Q and independently There is no difference in performing the constant voltage function during unit operation.
しかし本発明の一実施例では従来の各抵抗R1の電流検
出信号を各演算増幅器12を介して得た増幅出力信号S
1. St 、 Ss・・・をそれぞれ他のユニ、トに
送出して、S、は+3と、+2はS、と、5sdS2・
・・のように各第3演算増幅器13において差動増幅を
行わせていたのと異り、第3演算増幅器130反転端子
には自己ユニットにおける増幅出力信号を印加すると共
に、非反転端子には各第2演算増幅器において得られた
+3.S、、S、・・・をダイオードD2により得る論
理和信号として印加する。このようにすれば各第3演算
増幅器13は自己ユニットにおける第2演算増幅器12
からの増幅出力信号を論理和信号S。即ちアナログ的に
は該増幅出力信号中の最大電圧値信号S0と比較動作を
行い、その結果得られた最大電圧信号S。との不足差分
信号をり、を介して第1演算増幅器の様の手法で印加す
れば、複数の直流定電圧ユニ。However, in one embodiment of the present invention, an amplified output signal S obtained from the conventional current detection signal of each resistor R1 via each operational amplifier 12 is used.
1. Send St, Ss... to other units, S, +3, S, +2, and 5sdS2.
Unlike the case where differential amplification was performed in each third operational amplifier 13 as shown in FIG. +3. obtained in each second operational amplifier. S, , S, . . . are applied as a logical sum signal obtained by the diode D2. In this way, each third operational amplifier 13 becomes the second operational amplifier 12 in its own unit.
The amplified output signal from the OR signal S. That is, in analog terms, a comparison operation is performed with the maximum voltage value signal S0 in the amplified output signal, and the maximum voltage signal S obtained as a result is obtained. If the missing difference signal is applied via a method similar to the first operational amplifier, multiple DC constant voltage units can be applied.
トlaa * lbb 、iceを並列接続運用によっ
て負荷2に従来通り直流定電圧を供給すると共に、本発
明の一実施例においてはダイオードD、による論理和動
作で得る最大電圧値信号S。を基準に各ユニットにおけ
る負荷電流を均等化するように、制御する。またこの本
発明の一実施例における負荷電流均等化制御動作は従来
と異り全ユニット中側れかの1ユニツトが故障によシ脱
落しても最大電圧信号Soは他のユニットによって必ず
保証されるので残るユニットで負荷電流の均等化制御が
継続され電流供給における平衝動作を失うことはない。The maximum voltage value signal S is obtained by supplying a constant DC voltage to the load 2 as usual by connecting the transistors laa*lbb and ice in parallel, and by performing an OR operation using a diode D in one embodiment of the present invention. Control is performed to equalize the load current in each unit based on. Furthermore, unlike the conventional load current equalization control operation in this embodiment of the present invention, even if one unit among all the units falls out due to a failure, the maximum voltage signal So is guaranteed by the other units. Therefore, equalization control of the load current is continued in the remaining units, and the average impulse operation in the current supply is not lost.
尚以上は定電圧制御機能をトランジスタQによる電圧降
下式によったが他の例えばスイッチング方式に適用して
も同様に実現出来ることはいう迄もない。また第2演算
増幅器12の出力信号について論理和を得る手段は単に
並列接続を行えば良いのでユニットの増設、削除が従来
に比較して容易に碌る。Although the constant voltage control function has been described above using the voltage drop method using the transistor Q, it goes without saying that it can be similarly achieved by applying other methods such as switching methods. Furthermore, since the means for obtaining the logical sum of the output signals of the second operational amplifier 12 can be simply connected in parallel, the addition or deletion of units can be done more easily than in the past.
(g) 発明の詳細
な説明したように本発明によれば、複数の直流定電圧ユ
ニットを並列接続運用によって電源装置を構成するに際
し、構成ユニットの何れかが故障した場合でも、従来の
ように残りのユニットが電流供給に平衝を失うことなく
、容易に均等化負担動作を行う直流定電圧回路を提供す
ることが出来る。(g) As described in detail, according to the present invention, when configuring a power supply device by connecting a plurality of DC constant voltage units in parallel, even if any of the constituent units fails, the system can be operated as in the conventional case. It is possible to provide a DC constant voltage circuit that easily performs an equalizing load operation without causing the remaining units to lose balance in current supply.
第1図は従来における直流定電圧電源装置によるブロッ
ク図、第2図は本発明の一実施例における直流定電圧電
源装置によるブロック図を示す。
図においてla # laa Hlb g lbb H
lc g iccは直流定電圧ユニット、2は負荷およ
びEは直流入力電源、1は第1演算増幅器、12は第2
演算増幅器、13は第3演算増幅器、Qはトランジスタ
、zDはツェナダイオード、D、 I D2はダイオー
ドおよびRI$2+Il*4は抵抗である。FIG. 1 is a block diagram of a conventional DC constant voltage power supply, and FIG. 2 is a block diagram of a DC constant voltage power supply according to an embodiment of the present invention. In the diagram la # laa Hlb g lbb H
lc g icc is a DC constant voltage unit, 2 is a load and E is a DC input power supply, 1 is a first operational amplifier, 12 is a second
13 is a third operational amplifier, Q is a transistor, zD is a Zener diode, D, ID2 is a diode, and RI$2+Il*4 is a resistor.
Claims (1)
定電圧電源システムにおいて、該直流定電圧電源ユニッ
トは基準電圧と電源ユニットにおける出力電圧を比較し
て出力制御トランジスタを帰還制御する第1演算増幅器
、出力回路に挿入した直列抵抗による出力電流検出電圧
を増幅する第2演算増幅器および自己ユニットにおける
該増幅出力信号と全ユニットにおける増幅出力信号の論
理和による最大電圧信号とを比較する第3演算増幅器を
備えてなり、第1演算増幅器は出力電圧を帰還して定電
圧制御すると共に、該第3演算増幅おける電流負荷を均
等化制御することを特徴とする直流定電圧回路。
□In a DC constant voltage power supply system in which a plurality of DC constant voltage power supply units are connected and operated in parallel, the DC constant voltage power supply unit includes a first operational amplifier that performs feedback control of an output control transistor by comparing a reference voltage with an output voltage in the power supply unit; a second operational amplifier that amplifies the output current detection voltage by a series resistor inserted in the output circuit; and a third operational amplifier that compares the amplified output signal in its own unit with a maximum voltage signal obtained by the logical sum of the amplified output signals in all the units. A direct current constant voltage circuit, characterized in that the first operational amplifier feeds back the output voltage to perform constant voltage control, and also performs equalization control on the current load in the third operational amplifier.
□
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22454882A JPS59114616A (en) | 1982-12-21 | 1982-12-21 | Dc constant-voltage circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22454882A JPS59114616A (en) | 1982-12-21 | 1982-12-21 | Dc constant-voltage circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59114616A true JPS59114616A (en) | 1984-07-02 |
Family
ID=16815513
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22454882A Pending JPS59114616A (en) | 1982-12-21 | 1982-12-21 | Dc constant-voltage circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59114616A (en) |
-
1982
- 1982-12-21 JP JP22454882A patent/JPS59114616A/en active Pending
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