JPS5911209A - Manufacture of ceramic substrate - Google Patents

Manufacture of ceramic substrate

Info

Publication number
JPS5911209A
JPS5911209A JP9933883A JP9933883A JPS5911209A JP S5911209 A JPS5911209 A JP S5911209A JP 9933883 A JP9933883 A JP 9933883A JP 9933883 A JP9933883 A JP 9933883A JP S5911209 A JPS5911209 A JP S5911209A
Authority
JP
Japan
Prior art keywords
sheet
ceramic
wiring
circular
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9933883A
Other languages
Japanese (ja)
Inventor
寛治 大塚
元 村上
英治 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9933883A priority Critical patent/JPS5911209A/en
Publication of JPS5911209A publication Critical patent/JPS5911209A/en
Pending legal-status Critical Current

Links

Landscapes

  • Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はセラミック基板の製造法に関するもので、主と
してデジタル腕時計に用いるセラミック多層配線基板の
製造法を対象とするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a ceramic substrate, and is primarily directed to a method for manufacturing a ceramic multilayer wiring board used in a digital wristwatch.

一般にIC(集積回路装置)に用いる配線基板は、未焼
成セラミツクシー ト上面に高融点金属からなる導体ペ
ーストを印均した梱々の配線シートを数枚積層し、これ
を一体として焼成して多数個分のセラミック多層配線基
板を形成り、−ヒ紀基板表面に側出する配線層に対l−
てメッキな施し、然る後各基板を区別する縦横の境界線
に沿って直線状の分離溝を形成し、この線に沿って蘭々
の方形の配線基板に切断分離することにより形成するつ
ところで、デジタル腕時計は円形のセラミック配線基板
が用いられるが、このような円形セラミック配線基板は
、焼成後セラミックシートを各基板に分割する分離溝に
沿って切断分離しようとしても分離溝が曲線であるため
、切断応力がこの溝に集中しにくくウェハを損傷するこ
となく切断分離することは困難であ・ろうしたがって、
一般には未焼成シートの状態で打抜き切断により切断分
離し各独立した円形の基板に形成していた。
In general, wiring boards used in ICs (integrated circuit devices) are made by laminating several wiring sheets with a conductive paste made of a high-melting point metal imprinted on the top surface of an unfired ceramic sheet, and then firing them as one unit. Form individual ceramic multilayer wiring boards,
After that, linear separation grooves are formed along the vertical and horizontal boundaries that distinguish each board, and the wiring boards are cut and separated into square wiring boards along these lines. , Digital watches use circular ceramic wiring boards, but even if you try to cut and separate such circular ceramic wiring boards along the separation grooves that divide the ceramic sheet into each board after firing, the separation grooves are curved. Therefore, it would be difficult to cut and separate the wafer without damaging the wafer because the cutting stress would be difficult to concentrate in this groove.
Generally, the unfired sheet is cut and separated by punching and cutting to form each independent circular substrate.

しかし、未焼成セラミツク配線基板の状態で独立した基
板にした場合には、その後の焼成及びメッキ処理等の作
業は各基板がばらばらになっていることから、一体で同
時に処理ができず、また、処理を施すのに、ばらばらな
ものを一旦整列してから行う必要があり工程が複雑にな
る。、特に配線層へのメッキ処理は電気メッキが困難で
無1!解メツキ法によらなければならず、メッキ作業が
複雑になる。
However, if the unfired ceramic wiring board is made into an independent board, the subsequent firing and plating processing cannot be done simultaneously because each board is separated. In order to perform the treatment, it is necessary to arrange the pieces in a row, which complicates the process. In particular, plating the wiring layer is difficult and impossible with electroplating! A deplating method must be used, which complicates the plating work.

また、上記製造法の場合には、各基板の各配線層が独立
していることから、断線、シv)の検査が煩雑になり、
焼成及びその後の処理も一つ一つ個別に行なわれること
から、工数が大幅にかかるという問題があった。
In addition, in the case of the above manufacturing method, since each wiring layer of each board is independent, inspection for disconnection and shiv) becomes complicated.
Since the firing and subsequent treatments are performed individually one by one, there is a problem in that the number of man-hours is large.

本発明の目的は直線で分離切断しにくい曲面を有する形
状のセラミック基板を容易に形成すること、および」二
H己セラミック基板におけるセラミックの欠け、損傷を
防止することにある。
An object of the present invention is to easily form a ceramic substrate having a curved surface that is difficult to separate and cut in a straight line, and to prevent chipping and damage of the ceramic in the 2H ceramic substrate.

本発明の前記ならびにそのほかの目的と新規な特徴は1
.本明細書の記述および添付図面から明らかになるであ
ろう。
The above and other objects and novel features of the present invention are as follows:
.. It will become clear from the description herein and the accompanying drawings.

−E記目的を達成するための本発明の基本構成は。- The basic structure of the present invention for achieving the object described in E is as follows.

複数の所定形状の基板に分離されるべき未焼成セラミツ
クシートを形成し、このシートを打抜き切断することに
よって1分離されるべき各基板の前記所定形状の一部を
決定し、かつ1分離されるべき前記所定形状の他の部分
を決定するための分離用の溝を形成1.、その後このシ
ートを焼成し、しかる後、前記分離用の尚に沿って焼成
シートを切断分離することを特徴とする。
Forming an unfired ceramic sheet to be separated into a plurality of substrates with predetermined shapes, punching and cutting this sheet to determine a portion of the predetermined shape of each substrate to be separated into one piece, and separating into one piece. 1. Forming a separation groove for determining the other portion of the predetermined shape to be processed. The method is characterized in that the sheet is then fired, and then the fired sheet is cut and separated along the separation grooves.

以下本発明の一実施例を図面を参照しながら具体的に説
明する。
An embodiment of the present invention will be specifically described below with reference to the drawings.

第1図は本発明デジタル時計用の円形状セラミック配線
基板の製造を工程順に示したものである。
FIG. 1 shows the manufacturing process of a circular ceramic wiring board for a digital watch according to the present invention in the order of steps.

lal  グリーンシート(未焼成セラミツクシート)
を数枚用意する。これらノートには必要に応じて円形又
は方形の孔を形成する。各シートの表面にW、Mo等の
ごとき高融点金属ペーストを1:11刷塗布【2てそれ
ぞれ所定のパターンの配線層を形成し。
lal green sheet (unfired ceramic sheet)
Prepare several sheets. These notebooks are provided with circular or square holes as required. A high melting point metal paste such as W, Mo, etc. was applied on the surface of each sheet by a 1:11 printing process [2] to form a wiring layer in a predetermined pattern.

これらシートを積層して未焼成セラミツク配線シート1
を作る。
These sheets are laminated to form an unfired ceramic wiring sheet 1.
make.

この未焼成セラミツク配線シートlは形成しようとする
円形の基板2が隣り合う円形基板と相互に接し、かつ各
基板が縦横の直線X、yで区分される領域内に配置され
るように各基板を形成する。
This unfired ceramic wiring sheet l is arranged so that the circular substrates 2 to be formed are in contact with adjacent circular substrates, and each substrate is arranged within an area divided by vertical and horizontal straight lines X and y. form.

各円形基板2が形成される位置には1例えば。For example, one is placed at the position where each circular substrate 2 is formed.

電池を収納する円形の四部3.LSI (大集積回路装
置)を取付ける方形の四部4.コンデンサを取付けるコ
ンデンサ取付配線部5.水晶発振子を取付ける発振子取
付配線部6がそれぞれ形成される。
Four circular parts that house the batteries 3. Four rectangular parts for mounting LSI (Large Integrated Circuit Device) 4. Capacitor mounting wiring section for mounting the capacitor 5. Oscillator attachment wiring portions 6 to which crystal oscillators are attached are respectively formed.

なお、各円形基板の表面に露出する配線層及び内部配線
層はシート1内部の配線層を介して相互に接続し、さら
にシート側部表面に配設された共通のメッキ用を極配線
層7に接続している。
The wiring layers and internal wiring layers exposed on the surface of each circular board are connected to each other via the wiring layer inside the sheet 1, and the common plating layer provided on the side surface of the sheet is connected to the polar wiring layer 7. is connected to.

tbl  次に打抜き切断により円形基板2が残存する
ように不良部分を除去する。この時、形成しようとする
各円形基板が相互に縦横に接続して連結するようにする
tbl Next, the defective portion is removed by punching and cutting so that the circular substrate 2 remains. At this time, the circular substrates to be formed are connected to each other vertically and horizontally.

IC1次に各基板毎に分離9ノ断するため、相互に接す
る各基板間の表面にIIt線状の分離溝8を前記X。
IC 1 Next, in order to separate each substrate into 9 sections, a line-shaped separation groove 8 is formed on the surface between the mutually contacting substrates as described above.

yにそって形成する。なお、この分離溝を形成しても各
円形基板2は1分離1118が形成されている連結部の
ソート内部の配線層により電気的にも接続されている。
Form along y. Note that even if this separation groove is formed, each circular substrate 2 is still electrically connected by the wiring layer inside the sort of connection portion in which one separation 1118 is formed.

その後、この積層シート1を13110C〜1700C
で焼成し、未焼成積層セラミックシートを焼成種層セラ
ばツクシートにする。
After that, this laminated sheet 1 was heated to 13110C to 1700C.
The unfired laminated ceramic sheet is made into a fired seed layered ceramic sheet.

(di  積層シート1のメッキ用電極配線層7をメッ
キ用電極の−を極として電気メツキ法により積層シート
1表面に露出する配線層表面に例えばAuメッキを施す
(di) For example, Au plating is applied to the surface of the wiring layer exposed on the surface of the laminate sheet 1 by electroplating using the plating electrode wiring layer 7 of the laminate sheet 1 with the - terminal of the plating electrode as the pole.

このメッキにより露出する配線層がメッキされない部分
があるときは、その配線層はメッキ用電極層7に接続さ
れてないことを示すものであり断線であることが証明で
きる。したがって、このメッキ処理により積層シートの
検査を同時に行な得る。
If there is a portion of the wiring layer exposed by this plating that is not plated, this indicates that the wiring layer is not connected to the plating electrode layer 7, and it can be proven that there is a disconnection. Therefore, by this plating process, the laminated sheet can be inspected at the same time.

iel  その後各基板2毎に分離切断する分離溝8に
沿って、切断応力を加えて分離し円形セラミック配線基
板を得る。
After that, cutting stress is applied to each substrate 2 along the separation groove 8 to obtain a circular ceramic wiring board.

上記実施例で説明したような本発明によれば。According to the invention as explained in the above embodiments.

未焼成セラミツクシートの状態であらかじめ外形打抜き
して不要な部分を取除いて形成しようとする円形基板が
直線で分割できるようにしておき。
The outline of the unfired ceramic sheet is punched out and unnecessary parts are removed so that the circular substrate to be formed can be divided along straight lines.

その後焼成することから、焼成後単に各基板が接してい
る直線状接線に沿って分離切断することにより形成しに
くい円形基板を容易に形成することができる。
Since firing is then performed, it is possible to easily form circular substrates that are difficult to form by simply separating and cutting the substrates along the linear tangents that are in contact with each other after firing.

また1本発明によれば、上記分離溝は未焼成状態のセラ
ミックに形成されるので、焼成後のセラミックに分離溝
を形成する際発生するセラミックの欠け、損傷を防止で
きる。
Furthermore, according to the present invention, since the separation groove is formed in the unfired ceramic, it is possible to prevent chipping and damage to the ceramic that would occur when forming the separation groove in the fired ceramic.

また1本発明によれば、H終工程まで各基板を電気的機
械的に接続しておくから、焼成及びメッキ処理、その他
の処理を一体の状態で処理でき。
Furthermore, according to the present invention, since each substrate is electrically and mechanically connected until the final H process, firing, plating, and other treatments can be performed in an integrated manner.

これらの処理作業が極めて簡単になる。特に配線層への
メッキ処理は電気メツキ法によりメッキを施すことがで
きるようになりメッキ作業を極めて簡単にすることがで
きる。
These processing operations become extremely simple. In particular, the wiring layer can be plated by electroplating, making the plating work extremely simple.

さらに本発明は基板の配線層の検査も一体になった伏爬
で検査を行なわれるから、配線層の断線。
Furthermore, in the present invention, since the wiring layer of the board is inspected using an integrated folding mechanism, there is no possibility of disconnection in the wiring layer.

シl−トの検査が容易になり、検査作業工数の大幅な低
減が図れる。
It becomes easy to inspect the silt, and the number of inspection work steps can be significantly reduced.

第2図は本発明の他の実施例である。FIG. 2 shows another embodiment of the invention.

この場合、相互に接する各基板間の間隔を広くし−て、
各基板間を接続する配線層を設けやすく構造したもので
ある、この場合には各基板に分離切断するための分離溝
8は平行して二本形成する必要がある。
In this case, the distance between each board in contact with each other is widened,
The structure is such that it is easy to provide a wiring layer that connects each substrate. In this case, it is necessary to form two parallel separation grooves 8 for separating and cutting each substrate.

上記実施例においては、いずれも円形セラミック配線基
板の製造法を説明したが、円形基板に限らず、一般に曲
面を有するセラミック基板の製造をする場合にも同様な
方法で製造できるものである。
In each of the above embodiments, a method for manufacturing a circular ceramic wiring board has been described, but not only a circular board but also a ceramic board having a curved surface in general can be manufactured by the same method.

また、本発明はセラミック配線基板に限らず。Further, the present invention is not limited to ceramic wiring boards.

配線層がない単なるセラミック基板の製造の場合にも適
用できるものである。
It can also be applied to the production of a simple ceramic substrate without a wiring layer.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示したもので、(a1〜i
61は各工程の平面図、第2図は本発明の他の実施例の
一工程の平面図である。 1・・・配線シート、2・・・円形基板、3・・・凹部
、4・・・LSI取付凹部、5・・・コンデンサ取付配
線部、6・・・発振子取付配線部、7・・・メッキ用電
極配線層。 8・・・分離溝。 代理人 弁理士  高 橋 明 失 策  1  図 第  1  図
FIG. 1 shows an embodiment of the present invention, in which (a1 to i
61 is a plan view of each step, and FIG. 2 is a plan view of one step of another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Wiring sheet, 2... Circular board, 3... Recessed part, 4... LSI mounting recessed part, 5... Capacitor mounting wiring part, 6... Oscillator mounting wiring part, 7...・Electrode wiring layer for plating. 8... Separation groove. Agent Patent Attorney Akira Takahashi Mistake 1 Figure 1

Claims (1)

【特許請求の範囲】[Claims] 複数の所定形状の基板に分離されるべき未焼成セラミツ
クシートを形成し、このシートを打抜き切断することに
よって1分離されるべき各基板の前記所定形状の一部を
決定し、かつ1分離されるべき前記所定形状の他の部分
を決定するための分離用の溝を形成し、その後このシー
トを焼成し、しかる後、前記分離用の溝に沿って焼成シ
ートを切断分離することを特徴とするセラミック基板の
製造法。
Forming an unfired ceramic sheet to be separated into a plurality of substrates with predetermined shapes, punching and cutting this sheet to determine a portion of the predetermined shape of each substrate to be separated into one piece, and separating into one piece. The method is characterized in that a separation groove is formed to determine the other part of the predetermined shape to be processed, and then the sheet is fired, and then the fired sheet is cut and separated along the separation groove. Ceramic substrate manufacturing method.
JP9933883A 1983-06-06 1983-06-06 Manufacture of ceramic substrate Pending JPS5911209A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9933883A JPS5911209A (en) 1983-06-06 1983-06-06 Manufacture of ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9933883A JPS5911209A (en) 1983-06-06 1983-06-06 Manufacture of ceramic substrate

Publications (1)

Publication Number Publication Date
JPS5911209A true JPS5911209A (en) 1984-01-20

Family

ID=14244837

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9933883A Pending JPS5911209A (en) 1983-06-06 1983-06-06 Manufacture of ceramic substrate

Country Status (1)

Country Link
JP (1) JPS5911209A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4830653A (en) * 1971-08-23 1973-04-23
JPS502604A (en) * 1973-05-01 1975-01-11

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4830653A (en) * 1971-08-23 1973-04-23
JPS502604A (en) * 1973-05-01 1975-01-11

Similar Documents

Publication Publication Date Title
US6630881B1 (en) Method for producing multi-layered chip inductor
US4289575A (en) Method of making printed wiringboards
JPS63128699A (en) Light-sensitive glass-ceramic multilayer interconnection board
JP5777997B2 (en) Wiring board for electronic component inspection apparatus and manufacturing method thereof
JPS59363B2 (en) Ceramic substrate manufacturing method
JPS5911209A (en) Manufacture of ceramic substrate
US6221193B1 (en) Defect reduction method for screened greensheets and article produced therefrom
JPS6424446A (en) Printed board and manufacture thereof
JP2005210028A (en) Multi-molded wiring board
JP2737712B2 (en) Chip carrier, method of manufacturing the same, and method of mounting element
JP2007173586A (en) Wiring mother board provided with a plurality of wiring patterns, and inspecting method therefor
JPS5911210A (en) Manufacture of ceramic substrate
JPH0685465A (en) Board for smd module and manufacture thereof
JPS6155280B2 (en)
JP3994312B2 (en) Printed wiring board, manufacturing method thereof, and interposer substrate
JPH02267989A (en) Ceramic circuit substrate and manufacture thereof
JPH1117061A (en) Ic package
JP3569923B2 (en) Manufacturing method of laminated hybrid integrated circuit component
JP2617518B2 (en) Ceramic package and method of manufacturing the same
JPH0750462A (en) Electronic circuit board
JPS57193051A (en) Multilayer circuit board
WO2011072990A2 (en) Multi-tiered circuit board and method of manufacture
JP3610821B2 (en) Processing method of ceramic green sheet
JP2739123B2 (en) Manufacturing method of electronic component mounting board
JPS6167999A (en) Method of producing printed board