JPS59111068U - Printed board - Google Patents

Printed board

Info

Publication number
JPS59111068U
JPS59111068U JP470283U JP470283U JPS59111068U JP S59111068 U JPS59111068 U JP S59111068U JP 470283 U JP470283 U JP 470283U JP 470283 U JP470283 U JP 470283U JP S59111068 U JPS59111068 U JP S59111068U
Authority
JP
Japan
Prior art keywords
printed board
view
recess
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP470283U
Other languages
Japanese (ja)
Inventor
稔 佐藤
白石 潔
Original Assignee
クラリオン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by クラリオン株式会社 filed Critical クラリオン株式会社
Priority to JP470283U priority Critical patent/JPS59111068U/en
Publication of JPS59111068U publication Critical patent/JPS59111068U/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面はこの考案の一実施例を示し、第1〜4図はプリン
ト基板の作り方の一例を示すものであって、第1図は基
板貼合せ前の要部の斜視図、第2図は第1図のものの貼
合せ後の断面図、第3図は第2図のものの凹所に無電解
銅めっきを施した状態の断面図、第4図は第3図の無電
解銅めっきの表面にクリームはんだを印刷してはんだ付
は用ランドを形成した状態の断面図、第5図は第4図の
プリント基板の使用状態を示す断面図である。 1.3:絶縁基板、2:孔、4:凹所、5:無電解銅め
っき、6:めっきレジスト、7:クリームはんだ、8:
はんだ付は用ランド、9:端子、10:隔壁。
The drawings show one embodiment of this invention, and Figs. 1 to 4 show an example of how to make a printed circuit board. Fig. 1 is a perspective view of the main part before bonding the board, and Fig. Figure 1 is a cross-sectional view of the item in Figure 2 after lamination, Figure 3 is a cross-sectional view of the item in Figure 2 with electroless copper plating applied to the recess, and Figure 4 is a cross-sectional view of the item in Figure 3 with electroless copper plating applied to the surface. FIG. 5 is a cross-sectional view showing a state in which cream solder is printed to form soldering lands, and FIG. 5 is a cross-sectional view showing the printed circuit board of FIG. 4 in use. 1.3: Insulating substrate, 2: Hole, 4: Recess, 5: Electroless copper plating, 6: Plating resist, 7: Cream solder, 8:
Land for soldering, 9: terminal, 10: bulkhead.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フラットパック部品等の端子のはんだ付は用ランドが、
前記端子を位置決め可能に凹設されてなるプリント基板
The land used for soldering terminals of flat pack parts, etc.
A printed circuit board having a recess that allows the terminal to be positioned.
JP470283U 1983-01-19 1983-01-19 Printed board Pending JPS59111068U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP470283U JPS59111068U (en) 1983-01-19 1983-01-19 Printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP470283U JPS59111068U (en) 1983-01-19 1983-01-19 Printed board

Publications (1)

Publication Number Publication Date
JPS59111068U true JPS59111068U (en) 1984-07-26

Family

ID=30136298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP470283U Pending JPS59111068U (en) 1983-01-19 1983-01-19 Printed board

Country Status (1)

Country Link
JP (1) JPS59111068U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0476987A (en) * 1990-07-19 1992-03-11 Matsushita Electric Ind Co Ltd Bonding method for electronic component

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0476987A (en) * 1990-07-19 1992-03-11 Matsushita Electric Ind Co Ltd Bonding method for electronic component

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