JPS59109961U - Absolute value detection circuit - Google Patents
Absolute value detection circuitInfo
- Publication number
- JPS59109961U JPS59109961U JP439183U JP439183U JPS59109961U JP S59109961 U JPS59109961 U JP S59109961U JP 439183 U JP439183 U JP 439183U JP 439183 U JP439183 U JP 439183U JP S59109961 U JPS59109961 U JP S59109961U
- Authority
- JP
- Japan
- Prior art keywords
- operational amplifier
- input terminal
- inverting input
- resistor
- absolute value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Measurement Of Current Or Voltage (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図ないし第５図は、従来の絶対値検波回路の構成例
を示す回路図、第６図はこの考案による絶対値検波回路
の一実施例の構成を示す回路図、第７図、第８図は同実
施例の等価回路を示すもので、第７図は入力信号が正の
場合の等価回路図、第８図は入力信号が負の場合の等価
回路図である。
３０・・・・・・信号入力端子、３１・・・・・・演算
増幅器、３２・・・・・・第１の抵抗、３３・・・・・
・第１のダイオード、３４・・・・・・第２のダイオー
ド、３５・・曲第２の抵抗、３６・・・・・・第３の抵
抗、４３・・・・・・引算回路。1 to 5 are circuit diagrams showing configuration examples of conventional absolute value detection circuits, FIG. 6 is a circuit diagram showing the configuration of an embodiment of the absolute value detection circuit according to this invention, and FIGS. FIG. 8 shows an equivalent circuit of the same embodiment. FIG. 7 is an equivalent circuit diagram when the input signal is positive, and FIG. 8 is an equivalent circuit diagram when the input signal is negative. 30... Signal input terminal, 31... Operational amplifier, 32... First resistor, 33...
- First diode, 34... Second diode, 35... Second resistor, 36... Third resistor, 43... Subtraction circuit.
Claims (1)
力端子が第１の抵抗を介して接地された演算増幅器と、
アノードが前記演算増幅器の出力端子に接続されかつカ
ソードが第２の抵抗を介して 。 同演算増幅器の反転入力端子に接続された第１のダイオ
ードと、カソードが前記演算増幅器の出力端子に接続さ
れかつアノードが前記第２の抵抗の抵抗値と等しい抵抗
値を持つ第３の抵抗を介して前記演算増幅器の反転入力
端子に接続された第２のダイオードと、前記第１のダイ
オードのカソードの信号から前記第２のダイオードのア
ノードの信号を引算して出力する引算回路とを具備して
なることを特徴とする絶対値検波回路。 、[Claims for Utility Model Registration] An operational amplifier whose non-inverting input terminal is connected to a signal input terminal and whose inverting input terminal is grounded via a first resistor;
An anode is connected to the output terminal of the operational amplifier, and a cathode is connected to the output terminal of the operational amplifier via a second resistor. a first diode connected to the inverting input terminal of the operational amplifier; and a third resistor whose cathode is connected to the output terminal of the operational amplifier and whose anode has a resistance value equal to the resistance value of the second resistor. a second diode connected to the inverting input terminal of the operational amplifier via the inverting input terminal of the operational amplifier; and a subtraction circuit that subtracts the signal at the anode of the second diode from the signal at the cathode of the first diode and outputs the result. An absolute value detection circuit comprising: ,
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP439183U JPS59109961U (en) | 1983-01-17 | 1983-01-17 | Absolute value detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP439183U JPS59109961U (en) | 1983-01-17 | 1983-01-17 | Absolute value detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59109961U true JPS59109961U (en) | 1984-07-24 |
Family
ID=30135986
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP439183U Pending JPS59109961U (en) | 1983-01-17 | 1983-01-17 | Absolute value detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59109961U (en) |
-
1983
- 1983-01-17 JP JP439183U patent/JPS59109961U/en active Pending
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