JPS5882526A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5882526A
JPS5882526A JP56179789A JP17978981A JPS5882526A JP S5882526 A JPS5882526 A JP S5882526A JP 56179789 A JP56179789 A JP 56179789A JP 17978981 A JP17978981 A JP 17978981A JP S5882526 A JPS5882526 A JP S5882526A
Authority
JP
Japan
Prior art keywords
bonding
pad
bonding pad
capillary
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56179789A
Other languages
Japanese (ja)
Inventor
Akira Kuromaru
黒丸 明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56179789A priority Critical patent/JPS5882526A/en
Publication of JPS5882526A publication Critical patent/JPS5882526A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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    • H01L2224/0554External layer
    • H01L2224/0555Shape
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    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805Shape
    • H01L2224/4807Shape of bonding interfaces, e.g. interlocking features
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    • H01L2224/484Connecting portions
    • H01L2224/4845Details of ball bonds
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
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    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To contrive an increase in an area effective to the junction of a bonding pad by a method wherein a protruded section corresponding to the beveling portion at the inside of a capillary abutting to the bonding pad is formed at the bonding pad. CONSTITUTION:A bonding pad 4 is formed on a gate oxide film 3 formed on an Si substrate 4 which is of stepped constitution providing a prtruded portion to the beveling portion 7a at the inside of a capillary 7. In this way, an Al oxide layer at the edge portion on the step of the pad 4 is firstly destructed to form a junction and a junction progresses at the flat portion of the central portion of the pad 4 by its infuence. As the result, an area effective to the junction of the pad 4 increases.

Description

【発明の詳細な説明】 l〕 発明の技術分野 この発明は半導体装置に係り、特に改良された形状のポ
ンディングパッドを有する半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION l] Technical Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a bonding pad with an improved shape.

2)従来の技術 モス集積回路のポンディングパッドの構造を第1図に示
す。図において、(1)はNWまたはP型のシリコン基
板、(2)は前記基板に加熱を施して主面に形成さnた
酸化シリコン層で、この酸化シリコン層にフォトエツチ
ングによシ拡散用孔を設け、仁こから不純物の選択拡散
を施し基板と反対導電型の層(図示省略)を形成する。
2) The structure of a bonding pad of a conventional MOS integrated circuit is shown in FIG. In the figure, (1) is an NW or P-type silicon substrate, and (2) is a silicon oxide layer formed on the main surface by heating the substrate.This silicon oxide layer is used for diffusion by photoetching. A hole is provided and an impurity is selectively diffused from the hole to form a layer (not shown) having a conductivity type opposite to that of the substrate.

ついで、ゲート形成予定域の酸化シリコン層を除去し、
あらためてゲート酸化層(3+を形成したのち電極取出
しの開孔(図示省略)を設け、全面にアルミニウムを蒸
着してからパターニングを施しポンディングパッド+4
Jを形成する。次に表面保護層のP2O層(51を被着
しポンディングパッド上は除去する。つhで、ポンディ
ングパッドにボンディングワイヤ先端の金ボール部(6
)を圧着してw、1図に示される構造が得らnる。なお
、この構造の電極取出し方式は1つの表面に多数設ける
のに適するため広く用いられている。
Next, the silicon oxide layer in the area where the gate is to be formed is removed,
After forming a gate oxide layer (3+), an opening for electrode extraction (not shown) is made, aluminum is deposited on the entire surface, and patterning is performed to form a bonding pad +4.
Form J. Next, a P2O layer (51) as a surface protective layer is applied and removed on the bonding pad. At this time, the gold ball portion (6) at the tip of the bonding wire is attached to the bonding pad.
) is crimped to obtain the structure shown in Figure 1. Note that this structure of electrode extraction method is widely used because it is suitable for providing a large number of electrodes on one surface.

3)従来技術の問題点 キャピラリ(71で金ポール部(63を圧着を施した勲
品について金ポール部の端から一定の力で剥離した状態
を第2図に示す。こnから判明することはキャピラリの
内側面取シ部(7m) (InsideChamf@r
 )から内側のアルミニウムがボンディングによって塑
性変形されておらず、接合面積の少ない接合強度の低い
ものが見らnた この原因は金ボール部を形成し熱圧着
するとキャピラリは圧着圧力(8)が内@面取り部より
内側へ伝わシにくいことがあげらnる。金とアルミニウ
ムとの接合は第3図に示すような界面を形成して達成さ
nることが知らnている。すなわち、金ボール部(61
をアルミニウム膜(4)に圧接させた場合、金ボール部
の塑性変型によシ金ボール部の表面にスリップライン(
6a)による凹凸を生じ、アルミニウム表面の酸化[I
(4りが破壊さnて新生面(4b〕を露出し金・アルミ
ニウムの同相接合を生ずることが知られている(日本金
属学会誌。
3) Problems with the prior art Figure 2 shows a state in which a gold pole part (63) is crimped with a capillary (71) and is peeled off from the end of the gold pole part with a certain force. is the inner chamfered part of the capillary (7m) (InsideChamf@r
), the inner aluminum was not plastically deformed by bonding, and some bonding areas with a small bonding area and low bonding strength were observed. @The problem is that it is difficult to transmit to the inside of the chamfered part. It is known that bonding between gold and aluminum can be achieved by forming an interface as shown in FIG. That is, the gold ball part (61
When the metal ball is pressed against the aluminum film (4), a slip line (
6a), and the aluminum surface becomes oxidized [I
(It is known that the 4b is destroyed and a new surface (4b) is exposed, resulting in in-phase bonding of gold and aluminum (Journal of the Japan Institute of Metals).

(1977) 4. pH54〜)。そして、第2図に
示すように圧接が良好に達成さnた部分にはアルミニウ
ム新生面(4b)の部分に刻印されたスリップライン(
4b’)が確認され友。そして中央部(9)にはスリッ
プラインの刻印が認められないので、金ボール部に塑性
変型を生じなかったとみられボンディング強度に問題が
ある。
(1977) 4. pH54~). As shown in Fig. 2, slip lines (
4b') was confirmed. Since no slip line markings are observed in the center portion (9), it appears that no plastic deformation occurred in the gold ball portion, and there is a problem with the bonding strength.

また、近年はレット技術の進歩によシボンデインダパツ
ドも縮小の傾向にあり、現行の構造ではパッド面積が減
小する分だけ接合面積が不足し、剥離強度も低下する。
Furthermore, in recent years, due to advances in bonding technology, bond pads have also tended to be smaller, and in the current structure, the bonding area is insufficient due to the reduction in the pad area, and the peel strength is also reduced.

ま友、電極の材質もkl−81系やAj’ −81−C
m系と多くなり接合でキニ<<なっている。これに対し
てボンディング温度を上昇させるなどのボンディング条
件の見直し等を実施しているが、熱歪によって歩留が低
下する問題がある。
Mayu, the material of the electrode is kl-81 series or Aj'-81-C.
There are many m-types, and the junction becomes ``Kini''. In response to this, efforts have been made to review the bonding conditions, such as increasing the bonding temperature, but there is a problem in that the yield decreases due to thermal distortion.

4)発明の目的 ボンディングのキャピラリの構造を変えることなくボン
ディングの強度を向上するポンディングパッドの改良構
造を提供するものである。
4) Object of the Invention It is an object to provide an improved structure of a bonding pad that improves bonding strength without changing the structure of a bonding capillary.

5)発明の構成(gI約〕 ポンディングパッドにこれに対接するキャピラリの内側
面取りsK対応する凸部を備えて形成したことを4II
I!とする。
5) Structure of the invention (approximately gI) 4II indicates that the bonding pad is provided with a convex portion corresponding to the inner chamfer sK of the capillary that faces it.
I! shall be.

リ 発明の実施例(構成、作用、効果)(ml  第1
実施例 N型またはP型のシリコン基板(1)Kよって内部素子
を形成し、ゲート酸化層(3)を形成する1での工程は
従来の技術において説明したところと変らないので説明
を省略し、第4図に示すgついで蒸着により第5図に示
すアルミニウム層(14m’)を形成し、こnにノミタ
ーニングを施してキャビ2りの内側面取シ部((7m)
第1図)に対応する第1のアルミニウム層(14m)を
残し第6図に示す如くなる。次に全面に再び第2のアル
ミニウム層(14b、lを蒸着することによって前記面
取り部に対応する第1のアルミニウム層(14a)に対
し積層し、他はゲート酸化層(3i上に被着させたのち
、パターニングを施して第7図に示すポンディングパッ
ドQ4が形成される。このポンプイングツぞラドα◆は
キャピラリの内側面取り部に対応する凸部(14e)を
備える段付構造になるため、段のエツジ部の酸化アルミ
ニウム層が最初に破壊さnて接合を形成し、ポンプイン
グツミツドの中心部の平坦部もその影畳で接合が進行す
る。こnはすでに説明した金ボール部を#1離してスリ
ップラインを検する方法でボン・ディングの良否を判断
すると、第9図に示すように全面に刻印されたスリップ
フィン(4bつが11ilできた。
Examples of the invention (structure, action, effects) (ml Part 1
Example N-type or P-type silicon substrate (1) The steps in step 1 of forming internal elements using K and forming a gate oxide layer (3) are the same as those described in the prior art, so their explanation will be omitted. , as shown in FIG. 4. Next, an aluminum layer (14 m') shown in FIG.
The first aluminum layer (14 m) corresponding to FIG. 1) was left as shown in FIG. 6. Next, a second aluminum layer (14b, l) is deposited on the entire surface again to form a layer on the first aluminum layer (14a) corresponding to the chamfered portion, and the other layers are deposited on the gate oxide layer (3i). After that, patterning is performed to form the pumping pad Q4 shown in Fig. 7.Since this pumping pad α◆ has a stepped structure with a convex portion (14e) corresponding to the inner chamfered portion of the capillary, The aluminum oxide layer at the edge of the step breaks down first to form a bond, and the flat part at the center of the pumping tube also progresses in its shadow. When the quality of the bonding was determined by inspecting the slip line with a #1 distance, slip fins (4b 11 il) were formed that were engraved on the entire surface as shown in Figure 9.

叙上の構造のポンディングパッドを用いることによって
ボンディング歩留りが向上すると同時にマージンがある
ことから従来よりも縮小されたパッド(100μm以下
)Kもボンディングが可能である。また、200℃程度
の低融点のはんだを用いるマウントに対しボンディング
温度を下けても接合が達成できる利点46る。ただし、
この場合は熱音波併用のサーモソニックボンディング実
施が必要である。
By using the bonding pad having the above structure, the bonding yield is improved and at the same time, since there is a margin, bonding can be performed even with a pad K that is smaller than the conventional one (100 μm or less). Additionally, there is an advantage that bonding can be achieved even at a lower bonding temperature compared to a mount using solder with a low melting point of about 200°C. however,
In this case, it is necessary to perform thermosonic bonding using thermosonic waves.

(b)  第2実施例 第1実施例と同様にゲート酸化層(図示省略)を形成し
たのち、まず、これK /j:ターニンダを施してキャ
ピラリの内側面取シ部((7m)第8図)K対応する一
部の酸化層(3′)を残し他は除去する(第10図)。
(b) Second Embodiment After forming a gate oxide layer (not shown) in the same manner as in the first embodiment, first apply a turn-inder to the inner chamfered part of the capillary ((7m) No. 8 Figure) A part of the oxide layer (3') corresponding to K is left and the rest is removed (Figure 10).

次に、全面KCVD法等の手段で酸化シリフン層Iを被
着し、さらに積層させてアルミニウム層(図示省略)を
全面に被着し几のち /l’ターニングを施し所定のポ
ンディングパッド(2)が形成される。
Next, a silicon oxide layer I is deposited on the entire surface using a method such as KCVD, and then an aluminum layer (not shown) is deposited on the entire surface. ) is formed.

このボンディングも第1実施例と同様の効果がある。This bonding also has the same effect as the first embodiment.

7)発明の効果 この発明によれば、ポンディングパッドの接合に有効な
面積が増大するので小型化できる。
7) Effects of the Invention According to the present invention, the effective area for bonding the bonding pads increases, so that the size can be reduced.

筐た、アルミニウムへのキャピラリのくいつきも良好に
なるので歩留向上にも顕著な利点がある。
Since the capillary sticks well to the aluminum casing and aluminum, there is a significant advantage in improving yield.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はワイヤボンディングさnた状態を示す断面図、
第2図はワイヤボンディング後金ボール部を剥離した後
の状態を示す正面図、第3図は金・アルミニウムの接合
部の状態を示す断面図、第4図ないし第7図は1実施例
のポンディングパッドの製造を説明するためのいずれも
断面図、第8図は第1の実施例を第1図に準じて示す断
面図、第9図は第1の実施例を第2図に準じて示す正面
図、第10図は第2の実施例のボンディングパッドの断
面図である。 4.14.24    ボンディング/セット(アルミ
ニウム層)41s!化アルミニウム層 4b       アルミニウムの新生面6     
 金ボール部 6a       スリップライン 7      キャビツリ 7a      キャピラリの内側面取り部141  
    第1のアルミニウム層141m      第
2のアルミニウム層、14Cポンディングパッドの凸部 代理人 弁理士 井 上 −男 第  1  図 第  4  図
FIG. 1 is a cross-sectional view showing a wire bonded state;
Fig. 2 is a front view showing the state after the gold ball part has been peeled off after wire bonding, Fig. 3 is a sectional view showing the state of the gold/aluminum joint, and Figs. 4 to 7 are of one embodiment. 8 is a sectional view showing the first embodiment based on FIG. 1, and FIG. 9 is a sectional view showing the first embodiment based on FIG. 2. FIG. 10 is a sectional view of the bonding pad of the second embodiment. 4.14.24 Bonding/Set (aluminum layer) 41s! Aluminum chloride layer 4b New aluminum surface 6
Gold ball part 6a Slip line 7 Cavity 7a Inner chamfered part 141 of capillary
1st aluminum layer 141m 2nd aluminum layer, convex part of 14C bonding pad Agent Patent attorney Mr. Inoue Figure 1 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 半導体基板の主面に電気絶縁層を介して形成された金属
のポンディングパッドを有する半導体装置におい□て、
ポンディングパッドがこnに対接するキャピラリの内側
面取多部に対応する凸部を備えて形成されていることを
特徴とする半導体装置
In a semiconductor device having a metal bonding pad formed on the main surface of a semiconductor substrate via an electrically insulating layer,
A semiconductor device characterized in that a bonding pad is formed with a convex portion corresponding to an inner chamfered portion of a capillary that is in contact with the bonding pad.
JP56179789A 1981-11-11 1981-11-11 Semiconductor device Pending JPS5882526A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56179789A JPS5882526A (en) 1981-11-11 1981-11-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56179789A JPS5882526A (en) 1981-11-11 1981-11-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5882526A true JPS5882526A (en) 1983-05-18

Family

ID=16071914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56179789A Pending JPS5882526A (en) 1981-11-11 1981-11-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5882526A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4886200A (en) * 1988-02-08 1989-12-12 Mitsubishi Denki Kabushiki Kaisha Capillary tip for bonding a wire
JP2007134418A (en) * 2005-11-09 2007-05-31 Matsushita Electric Ind Co Ltd Semiconductor mounting method
WO2012005073A1 (en) * 2010-07-08 2012-01-12 三菱電機株式会社 Semiconductor device, semiconductor package, and method for producing each

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4886200A (en) * 1988-02-08 1989-12-12 Mitsubishi Denki Kabushiki Kaisha Capillary tip for bonding a wire
JP2007134418A (en) * 2005-11-09 2007-05-31 Matsushita Electric Ind Co Ltd Semiconductor mounting method
WO2012005073A1 (en) * 2010-07-08 2012-01-12 三菱電機株式会社 Semiconductor device, semiconductor package, and method for producing each
JPWO2012005073A1 (en) * 2010-07-08 2013-09-02 三菱電機株式会社 Semiconductor device, semiconductor package and manufacturing method thereof

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