JPS587853A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS587853A
JPS587853A JP56105186A JP10518681A JPS587853A JP S587853 A JPS587853 A JP S587853A JP 56105186 A JP56105186 A JP 56105186A JP 10518681 A JP10518681 A JP 10518681A JP S587853 A JPS587853 A JP S587853A
Authority
JP
Japan
Prior art keywords
circuit
gate
voltage
type
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56105186A
Other languages
Japanese (ja)
Inventor
Kazuo Yudasaka
一夫 湯田坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP56105186A priority Critical patent/JPS587853A/en
Publication of JPS587853A publication Critical patent/JPS587853A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the operating characteristics of an oscillator by respectively connecting the drain, source and gate of a depletion type N type MOS to the gate, source and drain of a depletion type P type MOS. CONSTITUTION:The drain 3, source 4 and gate 5 of a depletion type N channel MOSFET formed on an N type Si substrate 1 are respectively connected to the gate 8, source 6 and drain 7 of a depletion type P channel MOSFET, thereby forming an amplifier for an oscillator. Even if the oscillation starting voltage is thus reduced, the operating current of the oscillator can be prevented from increasing.

Description

【発明の詳細な説明】 本発明は半導体集積回路のうち、増幅回路に関する。[Detailed description of the invention] The present invention relates to an amplifier circuit among semiconductor integrated circuits.

増幅回路は、他の種々の回路と接続されて半導体集積回
路に利用されている0例えば時計用半導体集積回路では
、増幅回路は水晶発振子などと接続されて発振回路を構
成する。前記発振回路では発振開始電圧乃至発振停止電
圧が重要な回路特性項目であり、前記回路特性核発振回
路を構成する増幅器によって左右される。通常前記回路
特性はより小さい値になることが望ましい。これは電源
となる電池の電圧が低下した時、より低い電圧で動作す
ることを目的としている。しかし、発振開始電圧乃至発
振停止電圧を低くすると、正常な電池電圧の時動作電流
が大きくなり、電池寿命が短かくなってしまうと言う問
題が生じる。前記二者の特性は相反する特性であり、従
来は前記二者のどちらか一方の特性を犠牲にせざるを得
なかった。
An amplifier circuit is connected to various other circuits and used in a semiconductor integrated circuit. For example, in a semiconductor integrated circuit for a watch, an amplifier circuit is connected to a crystal oscillator to form an oscillation circuit. In the oscillation circuit, the oscillation start voltage to the oscillation stop voltage are important circuit characteristic items, and the circuit characteristics depend on the amplifier constituting the oscillation circuit. Generally, it is desirable that the circuit characteristics have a smaller value. The purpose of this is to operate at a lower voltage when the voltage of the battery that powers it drops. However, if the oscillation start voltage or oscillation stop voltage is lowered, the operating current increases when the battery voltage is normal, resulting in a problem that the battery life is shortened. The two characteristics are contradictory, and conventionally one of the two characteristics had to be sacrificed.

本発明は前記相反特性を教養し、発振開始電圧を小さく
しても、発振回路の動作電流が大きくならないような回
路を提案するものである。以下具体例に沿って説明する
The present invention studies the reciprocity characteristics and proposes a circuit in which the operating current of the oscillation circuit does not increase even if the oscillation start voltage is reduced. A specific example will be explained below.

第1図は、通常の発振回路の発振開始電圧と動作電流を
左右し、発振回路の重要なm−を構成する従来の増幅回
路な示す。通常1つのMO8IFITの電圧電流特性は
第2図に示すように、電流はほぼ電圧の自乗に比例して
増大する0通常のMO8νITの前記基本特性のため、
通常のMO8IFITを構成要素とする第1図の回路、
乃至第1図の回路を構成要素とする発振回路では、電源
電圧を上げると動作電流は電源電圧の自乗に比例して増
大することになる0図1の回路の動作開始電圧は、第1
図の回路を構成要素とする発振開始電圧に対応するので
、発振開始電圧を下げるためには、該回路の構成単位と
なるMO8FITの電流が流れはじめる電圧7丁を下げ
る必要がある。第2図においてV!をV’?に下げると
よりが増大し、第1図の回路の動作電流が増大すること
になる。
FIG. 1 shows a conventional amplifier circuit, which controls the oscillation start voltage and operating current of a typical oscillation circuit, and constitutes an important component of the oscillation circuit. Normally, the voltage-current characteristics of one MO8IFIT are as shown in Figure 2, where the current increases approximately in proportion to the square of the voltage.Due to the basic characteristics of a normal MO8νIT,
The circuit shown in Fig. 1 which has a normal MO8IFIT as a component,
In an oscillation circuit whose components include the circuit shown in FIG. 1, when the power supply voltage is increased, the operating current increases in proportion to the square of the power supply voltage.
This corresponds to the oscillation start voltage of the circuit shown in the figure, so in order to lower the oscillation start voltage, it is necessary to lower the voltage at which the current of MO8FIT, which is the structural unit of the circuit, begins to flow. In Figure 2, V! V'? If the voltage is lowered to 1, the torsion increases and the operating current of the circuit of FIG. 1 increases.

第3図は本発明による第1図と同等な機能を持つ増幅回
路である。第3図は第1図の回路にデプレッション型の
トランジスタを追加している。この追加部分の回路動作
を理解するため、模式的断面構造を第4図に示す。該回
路はデプレッション型のにチャネル及びデプレッション
型のPチャネルMOEIIFI!Tで構成される。配線
は第4図に示すようにNチャネルMO8FETのゲート
をGND側に接続し、PチャネルMO3IFΣTのゲー
トをVDD(正)に接続する。電圧V DDを上げてい
くと、2つのMO51FETが両方ともデプレッション
型のため、VDDともに工Inが増加する。
FIG. 3 shows an amplifier circuit according to the present invention having the same function as that in FIG. 1. In FIG. 3, a depression type transistor is added to the circuit in FIG. 1. In order to understand the circuit operation of this additional portion, a schematic cross-sectional structure is shown in FIG. The circuit has a depletion type channel and a depletion type P channel MOEIIFI! Consists of T. As shown in FIG. 4, the wiring connects the gate of the N-channel MO8FET to the GND side, and connects the gate of the P-channel MO3IFΣT to VDD (positive). When the voltage VDD is increased, since both of the two MO51FETs are depletion type, the In is increased for both VDD.

よりDの増加に伴い節電圧VMも上昇する。Nチャネル
MO8FETのゲート電圧はGNDに固定しであるため
、vMの上昇は等価的にNチャネルMO5IFICTの
ゲート電位が負になり、チャネルが閉じる方向に作用す
る。従って、第4図の回路の電圧−電流特性は第5図に
示すような波形となる。第5図の特性は図4に示すデプ
レッション型NチャネルMO3FICTの閾値電圧VT
IIなどによってかなり自由に制御できる。第5図の特
性を持つ回路と従来の回路特性となる第2図を直列に接
続すると、電圧の高いところで回路電流を制限すること
が可能となる。
Therefore, as D increases, the nodal voltage VM also increases. Since the gate voltage of the N-channel MO8FET is fixed to GND, an increase in vM equivalently causes the gate potential of the N-channel MO5IFICT to become negative, which acts in the direction of closing the channel. Therefore, the voltage-current characteristic of the circuit shown in FIG. 4 has a waveform as shown in FIG. The characteristics in FIG. 5 are the threshold voltage VT of the depletion type N-channel MO3FICT shown in FIG.
II, etc., it can be controlled quite freely. By connecting the circuit having the characteristics shown in FIG. 5 in series with the circuit having the conventional circuit characteristics shown in FIG. 2, it becomes possible to limit the circuit current at high voltage areas.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は発振回路などの基本構成回路となる増幅回路を
示す。 第2図は第1図の回路構成要素となる通常のエンハスメ
ント型MO8IPI[iTの単体特性を示す。 第3図は本発明による第1図に相当する増幅回路を示す
。 第4図は#!3図に示す本発明となる回路のうち、第1
図に追加となる部分を模式的断面図として示したもの。 第5図は第4図回路の一電圧一電流特性を示す。 第4図において、 1・・・・・・n型半導体基板 2・・・・・・P型ウェル領域 5.4,5・・・・・・夫々デプレンシ璽ン型Nチャネ
ルMO8F]lCTのドレイン、ソース、ゲート6.7
,8・・・・・・夫々デプレッシ目ン型PチャネルMO
8FETのソース、ドレイン、ゲートを示す。 以  上
FIG. 1 shows an amplifier circuit which is a basic constituent circuit such as an oscillation circuit. FIG. 2 shows the unit characteristics of a normal enhancement type MO8IPI [iT, which is a circuit component of FIG. 1. FIG. 3 shows an amplifier circuit corresponding to FIG. 1 according to the invention. Figure 4 is #! Among the circuits according to the present invention shown in FIG.
A schematic cross-sectional view of the additional parts shown in the figure. FIG. 5 shows the voltage-current characteristics of the circuit shown in FIG. In FIG. 4, 1...N-type semiconductor substrate 2...P-type well region 5, 4, 5...Drain of depreciation type N-channel MO8F]lCT, respectively. , source, gate 6.7
, 8... each depressive eye type P channel MO
The source, drain, and gate of 8FET are shown. that's all

Claims (2)

【特許請求の範囲】[Claims] (1)  デプレッシ璽ン171MチャネルMO81F
ICTのドレイン、ソース、ゲートを夫々デブレッシ璽
ンWirチャネルMO871CTのゲート、ソース。 ドレインに接続することを特徴とするMO811半導体
集積回路。
(1) Depressive seal 171M channel MO81F
Debres the drain, source, and gate of the ICT, respectively.The gate and source of the Wir channel MO871CT. An MO811 semiconductor integrated circuit characterized in that the MO811 semiconductor integrated circuit is connected to the drain.
(2)前記2つのデブレッシ璽ン型M O8’F IC
Tを前記接続した回路を、増幅回路と接続することを特
徴とするMO811半導体集積回路。
(2) The two deblessing type MO8'F ICs
An MO811 semiconductor integrated circuit characterized in that the circuit in which T is connected is connected to an amplifier circuit.
JP56105186A 1981-07-06 1981-07-06 Semiconductor integrated circuit Pending JPS587853A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56105186A JPS587853A (en) 1981-07-06 1981-07-06 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56105186A JPS587853A (en) 1981-07-06 1981-07-06 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS587853A true JPS587853A (en) 1983-01-17

Family

ID=14400641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56105186A Pending JPS587853A (en) 1981-07-06 1981-07-06 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS587853A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0137564A2 (en) * 1983-10-07 1985-04-17 Koninklijke Philips Electronics N.V. Integrated circuit comprising complementary field effect transistors
JPH01105641A (en) * 1987-10-19 1989-04-24 Oki Electric Ind Co Ltd Packet switching system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0137564A2 (en) * 1983-10-07 1985-04-17 Koninklijke Philips Electronics N.V. Integrated circuit comprising complementary field effect transistors
JPH01105641A (en) * 1987-10-19 1989-04-24 Oki Electric Ind Co Ltd Packet switching system

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