JPS5871771A - Solid-state image pickup device - Google Patents
Solid-state image pickup deviceInfo
- Publication number
- JPS5871771A JPS5871771A JP56170446A JP17044681A JPS5871771A JP S5871771 A JPS5871771 A JP S5871771A JP 56170446 A JP56170446 A JP 56170446A JP 17044681 A JP17044681 A JP 17044681A JP S5871771 A JPS5871771 A JP S5871771A
- Authority
- JP
- Japan
- Prior art keywords
- output
- voltage
- period
- charge
- output circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 17
- 238000003384 imaging method Methods 0.000 claims description 8
- 230000003287 optical effect Effects 0.000 abstract 3
- 230000000694 effects Effects 0.000 abstract 1
- 238000009825 accumulation Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 2
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は画像を撮像する事のできる半導体構成の固体撮
像装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device having a semiconductor structure and capable of capturing images.
この種装置としては、第1図に示す如く、複数の光電変
換素子(a)・・・を−列に配列した光電変換素子列(
1)の両辺に沿って第1、及び第2の電荷転送レジスタ
(2)、+3)が並列配置され、光電変換素子列(1)
の各光電変換素子(a)(a)・・・に生じる光電荷を
上記両電荷転送レジスタ(2)、(3)に依って振り分
は転送するデュアルチャンネル方式のものが一般的であ
る。斯る従来の固体撮像装置は、その両電荷転送レジス
タ(2)、(3)の終端部がゲートパルスdaが印加さ
れる出力ゲート電極(4)を介してモ9の蓄積頷。As shown in FIG. 1, this type of device includes a photoelectric conversion element array (
The first and second charge transfer registers (2), +3) are arranged in parallel along both sides of the photoelectric conversion element array (1).
A dual channel system is generally used in which the photoelectric charges generated in each of the photoelectric conversion elements (a), (a), . . . are distributed and transferred by the charge transfer registers (2), (3). In such a conventional solid-state imaging device, the terminal ends of both charge transfer registers (2) and (3) are charged with a charge transfer signal via an output gate electrode (4) to which a gate pulse da is applied.
[(51に連なってセリ、出力ゲート電極(4)がON
期間中、即ち光電荷出力期間中に於いてこの領域(5)
に両電荷転送レジスタ(2)、(3)から交互に転送さ
れて来る光電荷が順次蓄積される。(6)は該蓄積−域
(5)に転送されてくる光電荷量に応じた出力電圧Vo
utを得る為の出力回路である。この出力回路に於−い
て(e)は上記蓄積領域(4)にそのゲートが接続さ
。[(Sequential to 51, output gate electrode (4) is ON
During the period, that is, during the photocharge output period, this area (5)
The photocharges alternately transferred from both charge transfer registers (2) and (3) are sequentially accumulated. (6) is the output voltage Vo according to the amount of photocharge transferred to the storage area (5).
This is an output circuit for obtaining ut. In this output circuit, (e) has its gate connected to the storage region (4).
.
れたMo 8 IPKTからなる出力トランジスタであ
り、そのソースは定電圧源VDHに連なり、そのドレイ
ンは負荷抵抗Rに接続され、この負荷抵抗R間の電位が
出力電圧VOutとなる。(うは上記蓄積領域(4)K
そのドレインが接続されたMO8F]I!Tからなるリ
セットトランジスタであり、そのソースは定電圧源VD
Dに連なり、そのゲートにはリセットパルスIIIRが
印加される。The source is connected to a constant voltage source VDH, the drain is connected to a load resistor R, and the potential across the load resistor R becomes the output voltage VOut. (Uha, the above accumulation area (4) K
MO8F whose drain is connected]I! It is a reset transistor consisting of T, and its source is a constant voltage source VD.
D, and a reset pulse IIIR is applied to its gate.
第2図に上述の如き従来装置に用いるゲートパルスクG
、リセットノ)′eルスf6R,出力電圧Vout、を
示す。尚、これ等の波形は、10個の光電変換素子(a
)・・・を有する光電変換素子列(1)と各5ビツト構
成の第1及び第2の電荷転送レジスタ(2)、(3)と
を用いた場合を示している。同図に於いて、(ロ)は光
電荷出力期間であり、この期間中に、10個の光電変換
素子(a)・・・K依って得られた一次元の光電荷列が
電荷転送レジスタ(2)、(3)K依って振り分は転送
され、daに示す如く、ON状態の出力ゲート電極(4
)を介して、蓄積領域(5)に導入される。そして、こ
の蓄積領域(5)に1ビット単位の光電荷が導入される
毎に1g5xに示す如く、ON状態となるリセットパル
スf6Rが印加されるリセットトランジスタ(f)K依
って、蓄積領域(5)を定電圧VDDKi&7セツトし
、出力トランジスタ(・)に依って、1ビット単位の光
電荷量に応じた出力電圧Voutが得られる。一方、(
1)は空転送期間であり、この期間(1)は、第1及び
第2の電荷シフトレジスタ(2)、f3)が光電荷を転
送していない期間であり、即ち、光電変換素子列(1)
に光が入射される前の初期状態にある期間、及び、各光
電変換素子(a)・・・K充分な光電荷が発生する迄の
時間を得る為に光電変換素子(eL)・・・か尤両電荷
転送レジスタ(2)、(3)との結合を中断している期
間、である。Figure 2 shows a gate pulse shield G used in the conventional device as described above.
, reset pulse f6R, and output voltage Vout. Note that these waveforms are generated by 10 photoelectric conversion elements (a
), and first and second charge transfer registers (2) and (3) each having a 5-bit configuration are used. In the same figure, (b) is the photocharge output period, and during this period, the one-dimensional photocharge train obtained by the 10 photoelectric conversion elements (a)...K is transferred to the charge transfer register. (2), (3) The allocated amount is transferred depending on K, and as shown in da, the output gate electrode (4) in the ON state is transferred.
) into the storage area (5). Then, each time a 1-bit photocharge is introduced into the accumulation region (5), the reset transistor (f)K to which the reset pulse f6R that turns ON is applied, as shown in 1g5x, ) is set to a constant voltage VDDKi&7, and an output voltage Vout corresponding to the amount of photocharge in units of 1 bit is obtained by the output transistor (.). on the other hand,(
1) is an idle transfer period, and this period (1) is a period in which the first and second charge shift registers (2), f3) are not transferring photocharges, that is, the photoelectric conversion element array ( 1)
In order to obtain the period in which the photoelectric conversion elements (a) are in the initial state before light is incident on them, and the time until sufficient photoelectric charge is generated in each photoelectric conversion element (a), the photoelectric conversion elements (eL)... This is the period during which the coupling with both charge transfer registers (2) and (3) is interrupted.
ここで、第2図の出力電圧Voutに注目してみると、
光電荷量に対応する出力電圧値の基準電圧は、リセット
トランジスタ(幻のソースに印加されている定電圧VD
Dではなく、これより低い値vOとなっている。これは
、光電変換素子(IL)・・・k生じる光電荷に無関係
に、駆動されている電荷転送レジスタ(2)、(3)自
体に生じる暗電流に起因する電荷が出力回路(6)に導
入される為であり、しかもこの暗電流に依る電圧レベル
■oは、破線で示す如く、斯る装置の温度及び電荷転送
レジスタ伐)、(3)での電荷転送速度によってもかな
り変動するものである。従って、上述の如くして得られ
る出力電圧Voutをそのまま面像信号として用いてい
たのでは、正確な明度の判定ができなくなり、再生画像
のコントランスストを劣化せしめる原因となっていた。Now, if we pay attention to the output voltage Vout in Fig. 2,
The reference voltage of the output voltage value corresponding to the amount of photocharge is the reset transistor (constant voltage VD applied to the phantom source).
It is not D, but a lower value vO. This is because the dark current generated in the driven charge transfer registers (2) and (3) itself is transferred to the output circuit (6), regardless of the photoelectric charge generated by the photoelectric conversion element (IL). In addition, the voltage level caused by this dark current varies considerably depending on the temperature of the device and the charge transfer speed in (3) (3), as shown by the broken line. It is. Therefore, if the output voltage Vout obtained as described above is used as a surface image signal as it is, it becomes impossible to accurately determine the brightness, which causes the contrast of the reproduced image to deteriorate.
本発明は斯る欠点を解消する目的で為されたものであり
、暗電流による電圧レベルを相殺した画像信号を得る固
体撮像装置を提供するものである。The present invention has been made to eliminate such drawbacks, and provides a solid-state imaging device that obtains an image signal in which the voltage level due to dark current is canceled out.
第3図に本発明の固体撮像装置の一実施例を示す。同図
に於いて、(1)、伐)、(3)は夫々第1図の従来例
と同様に光電変換素子列、第1の電荷転送レジスタ、第
2の電荷転送レジスタ、を示している。FIG. 3 shows an embodiment of the solid-state imaging device of the present invention. In the figure, (1), (3) respectively indicate a photoelectric conversion element array, a first charge transfer register, and a second charge transfer register, similar to the conventional example shown in FIG. .
(9)、(転)は夫々第1及び第2の出力ゲート電極で
あり、共に上記第1及び第2の電荷転送レジスタの結合
された終端部位置に設けられている。(ロ)、(至)は
夫々第1及び第2の電荷蓄積領域であり、この第1の領
H,(財)は上記第1の出力ゲート電極1υ位置に連な
って設けられ、第2の領域@は上記第2の出力ゲート電
極圏位置に連なって設けられている。(9) and (9) are first and second output gate electrodes, respectively, and both are provided at the combined end positions of the first and second charge transfer registers. (B) and (To) are the first and second charge storage regions, respectively, and this first region H, (T) is provided in series with the first output gate electrode 1υ position, and the second The region @ is provided in succession to the second output gate electrode area position.
(2)、輸は該第1及び第2の蓄積領域(511,(至
)に夫々接続された第1及び第2の出力回路であり、こ
れ等各出力回路は、出力トランジスタ(・1)又は(8
2)とリセットトランジスタ(fl)又は(f2)と負
荷抵抗(R1)又は(R2)とを有し、両者共に第1図
の出力回路(6)と同様の構成となっている。(7)は
差動増′巾器であり、第1の出力回路(財)の出力電圧
Vout 1から第2の出力回路(弓の出力電圧Vou
t2を減じて増巾した面像信号voυ、t3が得られる
。(2) and port are the first and second output circuits connected to the first and second storage regions (511, (to), respectively), and each of these output circuits is connected to the output transistor (.1). Or (8
2), a reset transistor (fl) or (f2), and a load resistor (R1) or (R2), both of which have the same configuration as the output circuit (6) in FIG. (7) is a differential amplifier, which converts the output voltage Vout 1 of the first output circuit (product) to the output voltage Vout 1 of the second output circuit (output voltage Vout of the bow).
An amplified plane image signal voυ, t3 is obtained by subtracting t2.
第4図に、第・1及び第2の出力ゲート電極(社)、(
転)K印加する各ゲートパルスj’G 1s j’G2
と、第1及ヒ第2のリセットトランジスタ(fl)、(
f2) IIC印加する各リセットパルスlRt、lR
2と、第1及び第2の出力回路L!BJ9−ノ各出力電
正出力電圧 1、V。ut2と、差動増巾器(7)から
得られる画像信号Vout 3と、を夫々示す。FIG. 4 shows the first and second output gate electrodes (
) Each gate pulse to apply K j'G 1s j'G2
and the first and second reset transistors (fl), (
f2) Reset pulses lRt, lR applied to IIC
2, and the first and second output circuits L! BJ9-Each output voltage: 1, V. ut2 and an image signal Vout3 obtained from the differential amplifier (7).
斯る本発明の固体撮像装置は、第4図に示す空転送期間
(1)に於いて、予じめ第2の出力回路(至)のリセッ
トトランジスタ(f2)を121R2に示す如(ONし
て第2の電荷蓄積領域−を定電圧’VDDにリセットし
た後、第2の出力ゲート電極(転)をlGtに示す如く
ONして、第1及びjI2の電荷軛送レジスタ(2)、
(3)に依って転送される暗電流沈漬る電荷をこの第2
の電荷蓄積領域(至)に導入する。これに依って、第2
の出力トランジスタ(e2)のドレインとアース間に設
けられた負荷抵抗R2間に、暗電流レベルの電圧voが
得られ、これが第2の出力回路−の出力電圧vout
2となる。そして、この出力電圧Vout 2は、vO
値を保持した状態で光電荷転送期間(ロ)K移る。この
光電荷転送期間(h)では、まず、第1の出力ゲート電
極がlR1に示す如(ONとなり、各光電変換素子(a
)・・・で生じた光電荷が第1及び第2のシフトレジス
タ(2)、(3)を転送され、順次第1の電荷蓄積領域
に導入される。そして、これらの光電荷が第1図の従来
装置の出力回路(6)と同様の動作をなすリセットトラ
ンジスタ(fl)と出力トランジスタ(el)と負荷抵
抗(?1)とからなる出力回路(6υに依って、暗電流
レベルvOと光電荷量に応じた電圧とが加え合わされた
出力電圧Vout 1が得られる。そして、差動増巾器
(7)に於いて、斯る第1の出力回路−の出力電圧’V
out 1から、上述の第2の出力回路((支)の出力
電圧”Out 2を減じる事に依り、暗電流レベルvo
の影響を除去した出力電圧、即ち、照射光量に応じて発
生する光電荷量にのみ依存する電圧を示す画像信号”0
ut3が得られる。The solid-state imaging device of the present invention turns on the reset transistor (f2) of the second output circuit (to) in advance as shown in 121R2 during the idle transfer period (1) shown in FIG. After resetting the second charge storage region to a constant voltage 'VDD, the second output gate electrode (transfer) is turned on as shown at lGt, and the first and jI2 charge transfer registers (2),
(3) The dark current sinking charge transferred by this second
into the charge accumulation region (to). Based on this, the second
A dark current level voltage vo is obtained between the load resistor R2 provided between the drain of the output transistor (e2) and the ground, and this is the output voltage vout of the second output circuit.
It becomes 2. And this output voltage Vout 2 is vO
The photocharge transfer period (b) K moves while the value is held. During this photocharge transfer period (h), first, the first output gate electrode is turned ON as shown by lR1, and each photoelectric conversion element (a
)... are transferred to the first and second shift registers (2) and (3), and are sequentially introduced into the first charge storage region. These photocharges then generate an output circuit (6υ) consisting of a reset transistor (fl), an output transistor (el), and a load resistor (?1) that operates similarly to the output circuit (6) of the conventional device shown in FIG. As a result, an output voltage Vout 1 is obtained, which is the sum of the dark current level vO and a voltage corresponding to the amount of photocharge.Then, in the differential amplifier (7), the first output circuit − output voltage 'V
By subtracting the output voltage "Out 2" of the second output circuit ((sub)) from out 1, the dark current level vo
An image signal "0" that indicates an output voltage from which the influence of
ut3 is obtained.
本発明の固体撮像装置は、以上の説明から明らかな如く
、光電荷を転送する為の電荷転送レジスタの光電荷転送
期間中処於いてこのレジスタからの出力電圧を得る第1
の出力回路と、光電荷非出力期間中に於いてこのレジス
タからの出力電圧を得る第2の出力回路と、を個別に備
え、第1の出力回路の出力電圧から第2の出力回路の出
力電圧を減じた画像信号を得る構成であるので、この画
像信号は光電荷に無関係にこの電荷転送レジスタ自体で
生じる暗電流に起因した暗電流レベルの電圧が相殺され
たものとなる。As is clear from the above description, in the solid-state imaging device of the present invention, the first charge transfer register for transferring photocharges obtains the output voltage from the register during the photocharge transfer period.
and a second output circuit that obtains the output voltage from this register during the photocharge non-output period, and the output of the second output circuit is changed from the output voltage of the first output circuit. Since the configuration is such that an image signal with a reduced voltage is obtained, this image signal is obtained by canceling out the voltage at the dark current level caused by the dark current generated in the charge transfer register itself, regardless of the photocharge.
従って、温度とかの環境条件等に依存して変動する暗電
流レベルに依存しない画像信号を得る事ができ、この画
像信号を用いれば、全ゆる環境条件下に於ても正確な明
度の判定が可能となり、コントラストの良好な再生画像
が得られる。Therefore, it is possible to obtain an image signal that does not depend on the dark current level, which varies depending on environmental conditions such as temperature, etc., and by using this image signal, accurate brightness judgment can be made under all environmental conditions. This makes it possible to obtain a reproduced image with good contrast.
第1図は従来の固体撮像装置の模式回路図、第2図は従
来装置に用いられるパルスタイミング図並びに出力電圧
波形図、第3図は本発明に用いら(1)・・・光電変換
素子列、+21 (31・・・電荷転送レジスタ、[4
)(41) +42・・・出力ゲート電極、(5)6υ
@・・・電荷蓄積領域、f6) +6111e:2j・
・・出力回路、(7)・・・差動増巾器。
第1図
第2図Fig. 1 is a schematic circuit diagram of a conventional solid-state imaging device, Fig. 2 is a pulse timing diagram and output voltage waveform diagram used in the conventional device, and Fig. 3 is a photoelectric conversion element used in the present invention. column, +21 (31...charge transfer register, [4
)(41) +42...output gate electrode, (5)6υ
@...Charge accumulation region, f6) +6111e:2j・
...Output circuit, (7)...Differential amplifier. Figure 1 Figure 2
Claims (1)
光電変換素子列の各光電変換素子に依って生じる光電荷
を転送する為の電荷転送レジスタ゛と、該電荷転送レジ
スタの終端部釦設けられ、光電荷出力期間中に該レジス
タからの出力電圧を得る第1の出力回路と、該第1の出
力回路と共に上記電荷転送レジスタの終端部に設けられ
、光電荷非出力期間中に該レジスタからの出力電圧を得
る第2の出力回路と、からなり、上記第1の出力回路の
出力電圧から上記第2の出力回路の出力電圧を減じる事
に依って画像信号を得る事を特徴とした固体撮像装置。A photoelectric conversion element array in which a plurality of photoelectric conversion elements are arranged, a charge transfer register for transferring photocharges generated by each photoelectric conversion element of the photoelectric conversion element array, and a termination button of the charge transfer register. a first output circuit that receives the output voltage from the register during the photocharge output period; and a first output circuit that is provided at the terminal end of the charge transfer register together with the first output circuit, and that outputs the output voltage from the register during the photocharge non-output period. a second output circuit that obtains an output voltage from the second output circuit, and is characterized in that an image signal is obtained by subtracting the output voltage of the second output circuit from the output voltage of the first output circuit. Solid-state imaging device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56170446A JPS5871771A (en) | 1981-10-23 | 1981-10-23 | Solid-state image pickup device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56170446A JPS5871771A (en) | 1981-10-23 | 1981-10-23 | Solid-state image pickup device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5871771A true JPS5871771A (en) | 1983-04-28 |
Family
ID=15905072
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56170446A Pending JPS5871771A (en) | 1981-10-23 | 1981-10-23 | Solid-state image pickup device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5871771A (en) |
-
1981
- 1981-10-23 JP JP56170446A patent/JPS5871771A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4937380B2 (en) | CMOS image sensor | |
JP4135360B2 (en) | Solid-state imaging device | |
US4189749A (en) | Solid state image sensing device | |
JPS6343951B2 (en) | ||
US8072524B2 (en) | Solid-state image-sensing device | |
CN102196199A (en) | Solid-state image taking apparatus, method for driving solid-state image taking apparatus and electronic apparatus | |
US7116367B2 (en) | Solid-state image pickup apparatus having a reset transistor controlled by an output line | |
JPH0118629B2 (en) | ||
US4597013A (en) | Solid state image sensor | |
JPS5915370A (en) | Signal processor | |
EP0022323B1 (en) | Solid-state imaging device | |
JPH04262679A (en) | Driving method for solid-state image pickup device | |
JP2578622B2 (en) | Solid-state imaging device | |
JP2003110940A (en) | Solid-state image pickup device | |
JPS5871771A (en) | Solid-state image pickup device | |
JP2719058B2 (en) | Solid-state imaging device | |
JPS6057746B2 (en) | solid-state imaging device | |
JP3155877B2 (en) | Solid-state imaging device and charge transfer method thereof | |
JP2001346104A (en) | Solid-state image pickup device and image pickup device using it | |
JPH044682A (en) | Photoelectric converter | |
US7893980B2 (en) | CMOS image sensor having directly output transfer gate signal | |
JPH09205520A (en) | Three-line linear sensor | |
JP3367852B2 (en) | Solid-state imaging device | |
JPH0474908B2 (en) | ||
EP3445039A1 (en) | Detection circuit for photo sensor with stacked substrates |