JPS5868312A - No-break amplifying circuit - Google Patents

No-break amplifying circuit

Info

Publication number
JPS5868312A
JPS5868312A JP56166900A JP16690081A JPS5868312A JP S5868312 A JPS5868312 A JP S5868312A JP 56166900 A JP56166900 A JP 56166900A JP 16690081 A JP16690081 A JP 16690081A JP S5868312 A JPS5868312 A JP S5868312A
Authority
JP
Japan
Prior art keywords
circuit
amplifier
parallel
loss
amplification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56166900A
Other languages
Japanese (ja)
Inventor
Isao Sakuyama
功 作山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56166900A priority Critical patent/JPS5868312A/en
Publication of JPS5868312A publication Critical patent/JPS5868312A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To eliminate variation in feedback loop gain when amplifiers are independent and coupled together in parallel, by providing a loss circuit loop to each amplifier in parallel, and breaking the loss circuit loop of one amplifier when the other amplifier is disconnected. CONSTITUTION:Amplification part 3 and 3' are connected to an input coupling circuit 2 and an output coupling circuit 6, and part of the output of an output circuit 7 is fed back to an input circuit 1 through a feedback circuit 5 to constitute a no-break amplifier. Loss circuits 9 and 9' are added to amplification part units 4 and 4' to interpose the loss circuits through the other amplification part units respectively. Therefore, when only one unit is in use, neither loss circuit is inserted and when two units are connected in parallel, variation in feedback loop gain is absorbed by those amplification parts through the loss circuits by the amplification gain of the parallel amplification parts. Consequently, no influence of the variation upon the main feedback amount loop is exerted to use the amplification parts stable without reference to they are independent or in parallel.

Description

【発明の詳細な説明】 本発明は多1搬送方式に使用する基幹増幅器のgi頼性
向上を計る九めに使用する無瞬断増幅回路の放電に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to discharging of an uninterrupted amplifier circuit used to improve the GI reliability of a main amplifier used in a multi-transport system.

従来この種の無瞬断増幅回路は活性素子を有する増幅i
Bt重複回路とする回路構成、すなわち2つの増一部の
入力部及び出力部を各々トランス結合も一し(は直接結
合によ〕並列に合成し1合成した出力側よ)合成した入
力側に信号が帰還する様な負帰還ループを設けた回路構
5!を採っており。
Conventionally, this type of uninterrupted amplifier circuit has an amplifier i having an active element.
The circuit configuration is a Bt redundant circuit, that is, the input and output parts of the two augmented parts are combined in parallel (by direct coupling), and the combined output side is connected to the combined input side. Circuit structure 5 with a negative feedback loop for signal feedback! We are taking

充分な負帰還ループ利得を得ることにより、一方の増一
部が利得低下の障害が生じた場合でも他方O増幅IIO
動作により増幅器の外部利得が変動しなイllKmlE
!tL、6゜ しかし、こOsO無瞬断増幅回路は増幅部が単独の場合
、並列時の場合で帰還ループ利得が異なる帰道増幅器の
安定[會左右するものは帰還ループ特性であるため、増
幅部の単独時、並列時による利得の変動は増幅器の設計
に際し大なる考慮をはられねばならなく、時によシネ安
定1!累の原因となるおそれがある。
By obtaining sufficient negative feedback loop gain, even if one amplification section fails to reduce the gain, the other O amplification IIO
The external gain of the amplifier does not change due to operation.
! tL, 6° However, in this OsO uninterrupted amplifier circuit, the feedback loop gain differs depending on whether the amplifier section is alone or in parallel. Changes in gain due to whether the parts are used alone or in parallel must be taken into consideration when designing an amplifier, and sometimes it is difficult to maintain cine stability. It may cause a build-up.

第1図は従来よりgl用されている無瞬断増幅器〇−例
でTol)%3及び8′の増幅部が入力@は2の入力結
合回路に出力側は6の出力結合回路にそれぞれIl絖さ
れ、その結合回路は1の入力回路及び70出カー路に接
IRされ、7の出力回路の一部分を帰還回路5により1
の入力回路に帰還する様に回路構成がなされている。又
、増幅部は任意に着脱が可能な嫌にそれぞれ単独のユ=
y)に1にりてお9、増幅部以外の回路は共通部二二、
ト8として一体化されている。この様な回路においては
帰還ループ利得が充分大なる場合、増輪器利得は帰還回
路5によυ決足されるため、増幅s3及び3′による単
独接続、並列接続による利@j変化は外部利得の変化と
して現われない、しかし、増幅部3及び3′における単
独接続、並列接続による利得変化は帰還ループ内で吸収
されるため、そのt〜帰還ループの変化量として現われ
、回路設計充分な考慮がされない場合、増幅器の不安定
要素になる恐れがある。又、増幅部3及び3′の単独時
、並列時の両方について完全性を考慮することは回路技
術上問題があり、どちらか一方を完全なものとし、他方
は若干の儀性を払わざるtえない。
Figure 1 shows an uninterrupted amplifier conventionally used for GL (Tol)%3 and 8' amplification sections are connected to input coupling circuits of 2 and output coupling circuits of 6, respectively. The coupling circuit is connected to the input circuit 1 and the output circuit 70, and a part of the output circuit 7 is connected to the input circuit 1 by the feedback circuit 5.
The circuit configuration is such that the signal is fed back to the input circuit. In addition, each amplifying section is a separate unit that can be attached or detached at will.
y) in 1 and 9, the circuits other than the amplifier section are common parts 22,
It is integrated as part 8. In such a circuit, if the feedback loop gain is sufficiently large, the intensifier gain is determined by the feedback circuit 5, so the gain @j change due to the individual connection or parallel connection of the amplifiers s3 and 3' is caused by the external However, since the gain change due to single connection or parallel connection in the amplifier sections 3 and 3' is absorbed in the feedback loop, it appears as the amount of change in the feedback loop, which should be taken into consideration in circuit design. If this is not done, it may become an unstable element of the amplifier. Also, considering the completeness of both the individual and parallel amplifier sections 3 and 3' is problematic in terms of circuit technology, and it is necessary to make one of them perfect while the other requires some formality. No.

本発明の目的は、比較的簡単な構成で増幅部の単独時並
列時の帰還ループ利得の変化がほとんど現れない無瞬断
増幅回路を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an uninterrupted amplifier circuit that has a relatively simple configuration and exhibits almost no change in feedback loop gain when the amplifier sections are used alone or in parallel.

本発明の無瞬断増幅回路は、2台の増幅部が並列に#合
され、そO外側の人出方間で負帰還をほどこし、利得を
はは一定にする無瞬断増幅回路において、前記−幅部0
4!rk K設けた損失回路ループを並列時に構成し、
#起端幅部の一方を除去したときは前記増幅部の他方の
損失回路ループを断つようにしたことYt1%黴とする
The uninterrupted amplifier circuit of the present invention has two amplifying sections connected in parallel, negative feedback is applied to the outer side of the amplifier section, and the gain is kept constant. Above-width part 0
4! A loss circuit loop with rk K is configured in parallel,
#When one of the starting width portions is removed, the loss circuit loop of the other side of the amplifying section is cut off.Yt1% mold.

蕗2図は本発明による無瞬断増幅回路の一例を示し、第
1図と対応する部分については同一符号を付けであるが
本発明においては損失回路9及び9′を付加して増幅部
具”vト4s4’を構成し。
Fig. 2 shows an example of an uninterrupted amplifier circuit according to the present invention. Parts corresponding to those in Fig. 1 are given the same reference numerals, but in the present invention, loss circuits 9 and 9' are added to construct the amplification circuit. Configure ``vto4s4''.

たがいに他方の増幅部ユニットを通して損失回路が入る
−になりている。したがって一台のユニットOみO場合
は損失回路が挿入されなく、二台並列lll1!された
場合、並列による増幅部の増加利得分だけ損失回路を通
して各増幅部内で吸収出来る11に設定すれば主帰還ル
ープへの変化量の影I11は無く、増幅部の単独時並列
時共に安定な状態で使用することが出来る。
A loss circuit is inserted through the other amplifier unit. Therefore, in the case of one unit, no loss circuit is inserted, and two units are parallellll1! If the increase in gain of the amplifier sections caused by paralleling is set to 11, which can be absorbed in each amplifier section through the loss circuit, there will be no influence of the amount of change I11 on the main feedback loop, and the result will be stable both when the amplifier sections are in isolation and in parallel. It can be used in any condition.

以上のべたIIK本発明による無瞬断増幅回路によれば
安定な無瞬断増幅回路を得る仁とが出来る。
According to the above-described non-interruption amplifier circuit according to the present invention, it is possible to obtain a stable non-interruption amplifier circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

菖1図は従来の無瞬断増幅回路を示すブnツク図、第2
図は本発明による無瞬断増幅回路の実施例を示すプ■ツ
タ図である。 l・・・入力回路%2・・・入力結合回路58−3’・
・・増幅部、4.4’・・・増幅部ユニット、5は帰還
回路、6・・・出力結合回路、7・・・出力回路、8・
・・共通部ユニット、9.9’−・・損失回路。
Diagram 1 is a book diagram showing a conventional uninterrupted amplifier circuit;
The figure is a printer diagram showing an embodiment of the uninterrupted amplifier circuit according to the present invention. l...Input circuit %2...Input coupling circuit 58-3'.
...Amplification section, 4.4'...Amplification section unit, 5 is a feedback circuit, 6... Output coupling circuit, 7... Output circuit, 8.
...Common unit, 9.9'--Loss circuit.

Claims (1)

【特許請求の範囲】[Claims] 2台の増幅器が並列に結合され、その外側の入出力間で
負”帰還をほどこし、利得をほぼ一定にする無瞬断増幅
回路において、前記増幅部の各々に設けた損失回路ルー
プを並列時に構成し、前記増幅部の一方を除去したとき
は前記増幅部の他方の損失回路ループを断つようにした
こと管特徴とする無瞬断増幅回路。
In an uninterrupted amplifier circuit in which two amplifiers are connected in parallel and negative feedback is applied between the outer input and output to keep the gain almost constant, the loss circuit loop provided in each of the amplifier sections is connected in parallel. 1. A non-interruption amplifier circuit characterized in that the loss circuit loop of the other amplifier section is cut off when one of the amplifier sections is removed.
JP56166900A 1981-10-19 1981-10-19 No-break amplifying circuit Pending JPS5868312A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56166900A JPS5868312A (en) 1981-10-19 1981-10-19 No-break amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56166900A JPS5868312A (en) 1981-10-19 1981-10-19 No-break amplifying circuit

Publications (1)

Publication Number Publication Date
JPS5868312A true JPS5868312A (en) 1983-04-23

Family

ID=15839707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56166900A Pending JPS5868312A (en) 1981-10-19 1981-10-19 No-break amplifying circuit

Country Status (1)

Country Link
JP (1) JPS5868312A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6853244B2 (en) * 2003-06-24 2005-02-08 Northrop Grumman Corproation Multi-mode multi-amplifier architecture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6853244B2 (en) * 2003-06-24 2005-02-08 Northrop Grumman Corproation Multi-mode multi-amplifier architecture

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