JPS5866472A - Semiconductor image pickup device - Google Patents
Semiconductor image pickup deviceInfo
- Publication number
- JPS5866472A JPS5866472A JP56165523A JP16552381A JPS5866472A JP S5866472 A JPS5866472 A JP S5866472A JP 56165523 A JP56165523 A JP 56165523A JP 16552381 A JP16552381 A JP 16552381A JP S5866472 A JPS5866472 A JP S5866472A
- Authority
- JP
- Japan
- Prior art keywords
- junction
- layer
- substrate
- semiconductor
- photosensitive element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 230000035945 sensitivity Effects 0.000 claims abstract description 5
- 238000003384 imaging method Methods 0.000 claims description 15
- 235000014676 Phragmites communis Nutrition 0.000 claims 1
- 230000003287 optical effect Effects 0.000 abstract 3
- 206010034972 Photosensitivity reaction Diseases 0.000 description 8
- 230000036211 photosensitivity Effects 0.000 description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 239000011521 glass Substances 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000013585 weight reducing agent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、犬感度％ａｔ−外部から任意に制御しうる
ようにした半導体撮像装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor imaging device in which dog sensitivity %at can be arbitrarily controlled from the outside.
従来、撮像管において絋、ターゲット電圧を変えること
によって光電流の大きさを変える（光感度管変える）方
法が用いられており、これにより被零体の明・暗によら
ず鮮明な画像を得ることができた。しかしながら、半導
体撮像装置では、感光素子の光感度特性を変えることが
できず、鮮明な画像を得るに絋専ら絞りにたよって入射
光量を調節する方法がとられていた。このため、広い入
射党量範凹での撮像を可能にするには大型且つ高価な絞
りが必要であり、このことが半導体撮像装置の小皺化、
軽量化及びコストダウンを妨けていた。実際、この種の
撮像装置において、実質的な撮像部の大きさは絞り及び
レンズで占められていた。Conventionally, a method has been used in which the magnitude of the photocurrent is changed by changing the target voltage in the image pickup tube (changing the photosensitive tube), thereby obtaining a clear image regardless of the brightness or darkness of the subject. I was able to do that. However, in semiconductor imaging devices, it is not possible to change the photosensitivity characteristics of the photosensitive element, and in order to obtain clear images, the amount of incident light has been adjusted solely by relying on the aperture. For this reason, a large and expensive diaphragm is required to enable imaging with a wide range of incident particles.
This hindered weight reduction and cost reduction. In fact, in this type of imaging device, the substantial size of the imaging section is occupied by the aperture and lens.
この発明の目的は、光感度特性を適宜可変制御すること
のできる新規な半導体撮像装置を提供することにある。An object of the present invention is to provide a novel semiconductor imaging device whose photosensitivity characteristics can be variably controlled.
この発明による半導体撮像装置は、感光素子の近傍Ｋ
Ｐ Ｉ ９合を形成すると共に、このＰＮ接合の空乏層
広がりを電気的に制御して感光素子の光感度特性を変え
るようにしたことを特徴とするもので、以下、添付図面
に示す実施例について詳述する。In the semiconductor imaging device according to the present invention, the vicinity of the photosensitive element K
It is characterized by forming a P I 9 junction and electrically controlling the expansion of the depletion layer of this PN junction to change the photosensitivity characteristics of the photosensitive element. I will explain in detail.
第１図は、この発明の一実施例による半導体撮像装置の
回路構成を示すもので、半導体基板上にはホトダイオー
ドＤ及びＭＯ日形垂直スイッチトランジスタＱを含む絵
素ＰＪｅが多数マトリクス状に形成される。そして、同
じ半導体基板上に［ＭＯ日形水平スイッチトランジスタ
ＳＬ％ Ｓ１％’１・・・・・・と、水平信号線Ｈ１３
と、垂直佑号線ＶＳ、、ｖ ｓ！、ｖ ｓ、−・−・ト
、垂直ゲート線ＶＧ１、Ｖ Ｇ ２ 、Ｖ Ｇ ｓ −
＝ ト’ｌ）１形ｔｌ、サレル。FIG. 1 shows the circuit configuration of a semiconductor imaging device according to an embodiment of the present invention, in which a large number of picture elements PJe including photodiodes D and MO vertical switch transistors Q are formed in a matrix on a semiconductor substrate. Ru. Then, on the same semiconductor substrate, [MO Nikata horizontal switch transistor SL% S1%'1...] and horizontal signal line H13
And, vertical line VS,, vs! , vs, ---, vertical gate lines VG1, V G 2 , V G s -
= t'l) 1 form tl, Sarel.
垂直ゲート線ＶＧ、 、ＶＧ、 、ＶＧｓ−一−には垂
直走査回路１０から垂直走査信号が供給され、水平スイ
ッチトランジスタ日１ ％ Ｓ２．８Ｍ −””のゲー
トには水平走量回路稔から水平走査個号が供−給される
。A vertical scanning signal is supplied from the vertical scanning circuit 10 to the vertical gate lines VG, , VG, , VGs-1-, and a horizontal scanning signal is supplied from the horizontal scanning circuit to the gate of the horizontal switch transistor 1%S2.8M-. A scan number is provided.
水平信号線Ｈ８には抵抗Ｒ・を介してビデオバイアス＊
６＠ Ｖ ｏが接続されており、水平信号線Ｈ８に接
続された出力端子１４からは走査に伴ってビ第２図は、
上記装置の１絵素ＰＥに対応する部分の構成を示したも
ので、シリコンからなるＮ型半導体基板９上には、基板
加より抵抗率が高い（キャリヤ濃度が低い）Ｐ型子導体
層ｎが形成され、それによって半導体基板上と半導体層
ｎとの関１ｃ杜ＰＩＩ接合１１が定められてい、る。A video bias* is applied to the horizontal signal line H8 via a resistor R.
6@V o is connected, and from the output terminal 14 connected to the horizontal signal line H8, as the scanning occurs, the signal in Fig. 2 is shown.
This figure shows the configuration of a portion corresponding to one picture element PE of the above device. On an N-type semiconductor substrate 9 made of silicon, there is a P-type conductor layer n having a higher resistivity (lower carrier concentration) than that of the substrate. is formed, thereby defining a junction 1c between the semiconductor substrate and the semiconductor layer n.
中溝体層：００＠面には、この層ｎより抵抗率が低い（
キャリヤｓｎが高い）Ｍ＋型領域冴及び加が拡散法等に
より形成されており、’＋臘領域スはホトダイオードｐ
のカソードとトランジスタＱのソースとに兼用の領域と
して作用し、Ｎ”壁領域２６Ｆｉ）ランジスタＱのドレ
イン領域として作用するようになっている。Ｎ＋型領域
冴と半導体層４との間にはＰＭ接合Ｊ３が定められ、こ
の接合Ｊ！がホトダイオードＤのＰＮ接合を構成する。Nakazo body layer: On the 00@ plane, the resistivity is lower than that of this layer n (
The M+ type regions (with high carrier sn) are formed by a diffusion method, etc., and the '+ type regions are formed by a photodiode p.
The N'' wall region 26Fi acts as a region that also serves as the cathode of the transistor Q and the source of the transistor Q, and serves as the drain region of the transistor Q. Between the N+ type region 26Fi and the semiconductor layer 4, there is a PM. A junction J3 is defined, and this junction J! constitutes the PN junction of the photodiode D.
半導体層ｎの上面に鉱薄いシリコンオキサイド（’ｉｏ
ｓ ） ｌ１ｆ２８ｔ−介してゲート用ポリシリコン
層（９）がＮ＋型領域ス及び２６を橋絡するように形成
されている。半導体層ｎ上で感光部周辺には比較的厚い
フィールドオキサイド（Ｓｉｎ、）膜冨が形成されてい
る。そして、オキサイド膜部及び４上にはリンケイ酸ガ
ラス（ＰＥＧ）膜Ｕがパッシベイション膜として被着さ
れている。On the top surface of the semiconductor layer n, thin silicon oxide ('io
s) A gate polysilicon layer (9) is formed to bridge the N+ type regions and 26 through the l1f28t- layer. A relatively thick field oxide (Sin) film is formed around the photosensitive portion on the semiconductor layer n. A phosphosilicate glass (PEG) film U is deposited on the oxide film portion and 4 as a passivation film.
ガラス膜Ｕ及びオキサイドＭ３２に拡コンタクト孔が設
けられておシ、このコンタクト孔を介してＰｆＪ半導半
導体層上電極層蕊がオーミック接触されている。また、
Ｎ＋型領域纂上でガラス膜Ｕ及びオキサイド膜あにはコ
ンタクト孔が設けられており、このコンタクト孔を介し
てＮ” Ｉｔ領域謳には電極層おがオーミック接触され
ている。An enlarged contact hole is provided in the glass film U and the oxide M32, and the electrode layer on the PfJ semiconductor layer is in ohmic contact through this contact hole. Also,
A contact hole is provided in the glass film U and the oxide film A on the N+ type region, and the electrode layer is in ohmic contact with the N'' It region through this contact hole.
ゲート用ポリシリコン層Ｉは垂直グー）ｉ５１ＶＧ。The polysilicon layer I for the gate is vertical (glue) i51VG.
に接続され、電極層あけ垂直信号！ＶＥｌｔＫ接続され
る。Connected to the electrode layer and vertical signal! VEltK is connected.
半導体基板上の裏面には電極層槌が形成されており、こ
の電極層切と前述の電極層あとの間には可変バイアスを
源４２がＰＮ接合Ｊｓ ’ｌｒ逆バイアスするように接
続される。An electrode layer hammer is formed on the back surface of the semiconductor substrate, and a variable bias source 42 is connected between this electrode layer cut and the above-mentioned electrode layer so as to apply a reverse bias to the PN junction Js'lr.
第２図の装置の動作において、トランジスタ８１及びＱ
が共にオンのときＰＭ接合Ｊ、は電源Ｖ・により逆方向
にバイアスされ、電荷が蓄積される。In operation of the device of FIG. 2, transistors 81 and Q
When both are on, the PM junction J, is biased in the opposite direction by the power supply V, and charge is accumulated.
この蓄積電荷はトランジスタ８１又／ｆｉ、ｑのいずれ
かがオフするとそのまま保存される。このような状態に
おいて、光４４がホトダイオード部に照射されると、そ
の入射光量に応じて電子−正孔対が生成され、その生成
量に対応して前述の蓄積電荷の一部が放電される。そし
て、次の走査周期においてトランジスタＢ、及びＱが共
にオンすると、ＰＭ接合Ｊｘ （ホトダイオードＤ）Ｔ
ｈ介して上記放電分の電荷を補うように補充電痺が流れ
る。このときの補充電流鉱入射光量に対応したものであ
シ、この補充電流に対応した電圧をビデオ信号として出
力端子１４から取出すことかで゛きる。This accumulated charge is stored as is when either transistor 81 or /fi, q is turned off. In such a state, when the photodiode section is irradiated with light 44, electron-hole pairs are generated according to the amount of incident light, and a portion of the aforementioned accumulated charge is discharged according to the amount of generation. . Then, when transistors B and Q are both turned on in the next scanning period, PM junction Jx (photodiode D) T
Supplementary charge flow flows through h to compensate for the charge for the above-mentioned discharge. The supplementary current corresponds to the amount of incident light at this time, and the voltage corresponding to this supplementary current can be taken out from the output terminal 14 as a video signal.
上記動作において、ホトダイオード部の光感度特性は、
ｋＮｍ合Ｊ！からのびる空乏層の前向ＦｌとＰｌｉ接合
Ｊりからのびる空乏層の前面ＩＦ、とに祉さまれたＰ型
領域２２ａの厚さに主に依存する。In the above operation, the photosensitivity characteristics of the photodiode section are as follows:
kNm combined J! It mainly depends on the thickness of the P-type region 22a, which is supported by the forward direction Fl of the depletion layer extending from the Pli junction J and the front IF of the depletion layer extending from the Pli junction J.
これは、Ｐ型領域２２Ｌにて光によって生成されたキャ
リヤの量が前述の放電電荷量又は補充電流の大きさを左
右するからである。従って、可変バイアス電源社の電圧
を適宜調整してＰＮ接合Ｊ１の空乏層前面Ｆ１の位置を
変えると、これに応じてホトダイオード部の光感度特性
を変化させることができる。例えは、ＰＮ＆合Ｊ凰の逆
バイアス量を大きくして空乏層前面７１ ’ｆｃ空乏層
前而１面に近つけると、光感度が低下し、この反対にす
れば光感度が上昇する。This is because the amount of carriers generated by light in the P-type region 22L influences the amount of discharged charge or the magnitude of the replenishment current described above. Therefore, by appropriately adjusting the voltage of the variable bias power supply and changing the position of the depletion layer front surface F1 of the PN junction J1, the photosensitivity characteristics of the photodiode section can be changed accordingly. For example, if the amount of reverse bias of the PN & combined J is increased to bring it closer to the front surface of the depletion layer 71' fc depletion layer front surface, the photosensitivity will decrease, and if this is reversed, the photosensitivity will increase.
なお、この発８Ａは半導体に十分深く侵入する光によっ
て撮像する場合に効果が大きく、例えばシリコンを用い
た撮像装置では波長６ｓｏｏｆ以上の光で撮像するとき
に効果が大きい。すなわち、この発明を効果的に実施す
るには、ＰＭ領域２２ａのような光電変換寄与領域が入
射光の到達範囲内で空乏層の制御作用を受けるように感
光素子及び制御用ＰＮ接合の形成位置を定めてやればよ
い。Note that this emission 8A is highly effective when imaging is performed using light that penetrates sufficiently deeply into a semiconductor; for example, in an imaging device using silicon, it is effective when imaging is performed using light with a wavelength of 6soof or more. That is, in order to effectively carry out the present invention, the formation positions of the photosensitive element and the control PN junction must be adjusted so that the photoelectric conversion contributing region such as the PM region 22a receives the control action of the depletion layer within the reachable range of the incident light. All you have to do is set it.
以上のように、この発明によれば、電気的に簡単に半導
体撮像装置の光感度特性を変えることができるので、次
のような優れた作用効果が得られる。As described above, according to the present invention, it is possible to electrically and easily change the photosensitivity characteristics of a semiconductor imaging device, so that the following excellent effects can be obtained.
（１）絞りなしでも広い範囲の入射光量に対して鮮明な
ｉ！１ｉｆＩＩを得ることができる。(1) Clear i! for a wide range of incident light levels even without an aperture! 1ifII can be obtained.
（２）絞りを用いるとしても小型で安価な絞シと組み合
せることによって十分広い範囲の入射光量に対して鮮明
な画像を得ることができる。(2) Even if an aperture is used, a clear image can be obtained over a sufficiently wide range of incident light amounts by combining it with a small and inexpensive aperture.
（３）絞シを用いないか又は用いても小型且つ安価なも
ので足）るので、撮像装置の／ｊ％型化、軽量化及びコ
ストダウンを効果的に達成することができる。(3) Since the diaphragm is not used, or even if it is used, it is small and inexpensive, it is possible to effectively reduce the size, weight, and cost of the imaging device.
第１図ａ１この発明の一実施例による半導体撮像装置の
回路図、
ＷＩ、２図は、第１図の装置における１絵素分の構ａを
示す基板断面図である。
加・・・Ｎ型半導体基板、ｎ・・・Ｐ型半導体層、必・
・・ホトダイオード・ソース用Ｎ” Ｗ領域、が・・・
ドレイン用Ｎ＋型領域、（資）・・・ゲート用ポリシリ
コン層、３６．３８，４０・・・電極層、弦・・・可変
バイアス電源。
出願人 日本楽器製造株式会社
代理人 弁理士 伊 沢 敏 昭FIG. 1a1 is a circuit diagram of a semiconductor imaging device according to an embodiment of the present invention, WI. FIG. 2 is a cross-sectional view of a substrate showing the structure a for one picture element in the device of FIG. Add...N-type semiconductor substrate, n...P-type semiconductor layer, necessary...
... N''W region for photodiode source...
N+ type region for drain, (capital)... polysilicon layer for gate, 36, 38, 40... electrode layer, string... variable bias power supply. Applicant Nippon Musical Instruments Manufacturing Co., Ltd. Agent Patent Attorney Toshiaki Izawa
Claims (1)
の半導体基板上に形成され、該基板とは導電型が反対で
且つ該基板より抵抗率が高い半導体層と、 （Ｃ） この半導体層の表面に形成された感光素子と
、 （ｄ） 前記半導体基板及び前記半導体層の間のＰＮ
接合に葦方向バイアス電圧を供給することにより［ＰＮ
接合からの空乏層の広がりに応じてｎｉｌ記感光感光素
子感度特性を制御する手段とをそなえたことを特徴とす
る半導体撮像装置。[Claims] 1. (a) a (al-conductive type) semiconductor substrate; (b) a semiconductor layer formed on the semiconductor substrate, having a conductivity type opposite to that of the substrate and having a higher resistivity than the substrate; , (C) a photosensitive element formed on the surface of this semiconductor layer, and (d) a PN between the semiconductor substrate and the semiconductor layer.
By supplying a reed bias voltage to the junction, [PN
1. A semiconductor imaging device comprising: means for controlling sensitivity characteristics of a nil photosensitive element according to the spread of a depletion layer from a junction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56165523A JPS5866472A (en) | 1981-10-16 | 1981-10-16 | Semiconductor image pickup device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56165523A JPS5866472A (en) | 1981-10-16 | 1981-10-16 | Semiconductor image pickup device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5866472A true JPS5866472A (en) | 1983-04-20 |
Family
ID=15814001
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56165523A Pending JPS5866472A (en) | 1981-10-16 | 1981-10-16 | Semiconductor image pickup device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5866472A (en) |
-
1981
- 1981-10-16 JP JP56165523A patent/JPS5866472A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6051857A (en) | Solid-state imaging device and method of detecting optical signals using the same | |
| US4271420A (en) | Solid-state image pickup device | |
| US20050253132A1 (en) | Photodetector circuits | |
| CA2158775A1 (en) | Single-polysilicon cmos active pixel | |
| US4965212A (en) | Optical sensor | |
| JPS61120466A (en) | Semiconductor light detecting element | |
| US4686555A (en) | Solid state image sensor | |
| US7172922B2 (en) | CMOS image sensor array with black pixel using negative-tone resist support layer | |
| US5591963A (en) | Photoelectric conversion device with dual insulating layer | |
| CN113421942B (en) | Photodetection transistor, method for manufacturing the same, and photodetection method using the same | |
| JPH0414543B2 (en) | ||
| FR2844398A1 (en) | Monolithic photodetector for image sensor for devices, e.g. cameras, comprises first active area of doped single-crystal silicon corresponding to first and second photodiodes | |
| JPS6386973A (en) | Light sensitive pickcell with exposure blocking device | |
| JPH0334667B2 (en) | ||
| US6252215B1 (en) | Hybrid sensor pixel architecture with gate line and drive line synchronization | |
| US6031248A (en) | Hybrid sensor pixel architecture | |
| US6005238A (en) | Hybrid sensor pixel architecture with linearization circuit | |
| WO2023116035A1 (en) | Photosensitive circuit structure and optical device | |
| JPS5866472A (en) | Semiconductor image pickup device | |
| US6051827A (en) | Hybrid sensor pixel architecture with threshold response | |
| JP2509592B2 (en) | Stacked solid-state imaging device | |
| JPH0964332A (en) | Mos amplification type image sensing device | |
| JP3246062B2 (en) | Photo sensor system | |
| JP2004303968A (en) | Solid-state imaging device and its control method | |
| Suzuki et al. | High speed and high resolution contact-type image sensor using an amorphous silicon photodetector array |