JPS583665U - RF envelope signal monitor circuit - Google Patents

RF envelope signal monitor circuit

Info

Publication number
JPS583665U
JPS583665U JP9672281U JP9672281U JPS583665U JP S583665 U JPS583665 U JP S583665U JP 9672281 U JP9672281 U JP 9672281U JP 9672281 U JP9672281 U JP 9672281U JP S583665 U JPS583665 U JP S583665U
Authority
JP
Japan
Prior art keywords
switch
envelope signal
signal monitor
monitor circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9672281U
Other languages
Japanese (ja)
Inventor
夏樹 中村
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP9672281U priority Critical patent/JPS583665U/en
Publication of JPS583665U publication Critical patent/JPS583665U/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の実施例を示すＲＦエンベロープ信号の
モニタ回路、第２図はモニタ信号の波形を示し、ＡはＲ
Ｆエンベロープ信号、Ｂはドロン、　プアウト発生信号
、Ｃは本考案の実施例によるモニタ信号である。　−Fig. 1 shows an RF envelope signal monitor circuit showing an embodiment of the present invention, Fig. 2 shows the waveform of the monitor signal, and A indicates R
F is an envelope signal, B is a drone, a pullout generation signal, and C is a monitor signal according to an embodiment of the present invention. −

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 検波ダイオードと積分回路とバッファアンプとで構成し
た再生ＲＦエンベロープ信号のモニタ回路において、前
記バッファアンプの出力端とモニ゛　　タ信号の出力端
との間に第１のスイッチを付加し、この第１のスイッチ
の出力端と接地回路との間に第２のスイッチを付加し、
かつドロップアウト検出パルスによって前記第１のスイ
ッチをオフ制御し、同時に前記第２のスイッチをオン制
御するスイッチ駆動回路を付加したことを特徴とするＲ
Ｆエンベロープ信号のモニタ回路。In a reproduction RF envelope signal monitor circuit composed of a detection diode, an integrating circuit, and a buffer amplifier, a first switch is added between the output terminal of the buffer amplifier and the output terminal of the monitor signal, and A second switch is added between the output end of the switch and the ground circuit,
R characterized in that a switch drive circuit is added that controls the first switch to turn off and simultaneously controls the second switch to turn on using a dropout detection pulse.
F envelope signal monitor circuit.
JP9672281U 1981-07-01 1981-07-01 RF envelope signal monitor circuit Pending JPS583665U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9672281U JPS583665U (en) 1981-07-01 1981-07-01 RF envelope signal monitor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9672281U JPS583665U (en) 1981-07-01 1981-07-01 RF envelope signal monitor circuit

Publications (1)

Publication Number Publication Date
JPS583665U true JPS583665U (en) 1983-01-11

Family

ID=29891560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9672281U Pending JPS583665U (en) 1981-07-01 1981-07-01 RF envelope signal monitor circuit

Country Status (1)

Country Link
JP (1) JPS583665U (en)

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