JPS5824521Y2 - FM receiver IF circuit - Google Patents
FM receiver IF circuitInfo
- Publication number
- JPS5824521Y2 JPS5824521Y2 JP13992676U JP13992676U JPS5824521Y2 JP S5824521 Y2 JPS5824521 Y2 JP S5824521Y2 JP 13992676 U JP13992676 U JP 13992676U JP 13992676 U JP13992676 U JP 13992676U JP S5824521 Y2 JPS5824521 Y2 JP S5824521Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- filter
- resistor
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Circuits Of Receivers In General (AREA)
Description
【考案の詳細な説明】
この考案は、FM受信器のIF回路に関し、とくに選択
度指示あるいはマルチパス指示用の受信状態指示信号を
取出す部分を改良したIF回路に関する。DETAILED DESCRIPTION OF THE INVENTION This invention relates to an IF circuit for an FM receiver, and more particularly to an IF circuit that has an improved portion for extracting a reception state indication signal for selectivity indication or multipath indication.
従来のIP回路の一部を第1図に示す。A part of a conventional IP circuit is shown in FIG.
コレクタに抵抗R1を介して直流電源電圧子Bが印加さ
れているトランジスタTr1で増幅された中間周波信号
(以下rIF信号」という)は、抵抗R2を経てフィル
タ1に供給され、ここで波形整形を受けたのち、抵抗R
3を経てトランジスタTr2のベースに供給されるよう
になっている。The intermediate frequency signal (hereinafter referred to as "rIF signal") amplified by the transistor Tr1, to which the DC power supply voltage element B is applied to the collector via the resistor R1, is supplied to the filter 1 via the resistor R2, where the waveform is shaped. After receiving, resistance R
3 and is supplied to the base of the transistor Tr2.
そしてトランジスタTr2の出力は、ディスクリミネー
タで検波され1次段の回路、たとえばFM複調器に導か
れる。The output of the transistor Tr2 is then detected by a discriminator and guided to a primary stage circuit, such as an FM demodulator.
一方、トランジスタTriのコレクタ側に現われた信号
は、コンデンサC1を経て。On the other hand, the signal appearing on the collector side of the transistor Tri passes through the capacitor C1.
ダイオードDI、D2およびコンデンサC2からなる整
流回路2で整流され、得られた整流出力が。The resulting rectified output is rectified by a rectifier circuit 2 consisting of diodes DI and D2 and a capacitor C2.
選択度指示あるいはマルチパス指示などの指示信号とし
て使用される。It is used as an instruction signal such as selectivity instruction or multipath instruction.
しかしながら指示信号が取出されるトランジスタTri
のコレクタvA!l (a点)は、比較的小さい抵抗R
2Y介してフィルタ10入力端に接続されているために
、フィルタ1の動作の影響を受けて。However, the transistor Tri from which the instruction signal is taken out
Collector vA! l (point a) has a relatively small resistance R
Because it is connected to the filter 10 input terminal through 2Y, it is affected by the operation of filter 1.
周波数によって振幅特性が変化する傾向な示し。Indicates the tendency of amplitude characteristics to change depending on frequency.
したがってIF信号と指示信号とのレベルが対応しなく
なるという欠点を生じる。Therefore, a disadvantage arises that the levels of the IF signal and the instruction signal do not correspond to each other.
抵抗R2の値を大きくすれば、フィルタ1の影響を軽減
することはできるが、これによってフィルタ1に対する
入力信号レベルの低下と、フィルタ1の伝送特性の劣化
を招く。Although the influence of the filter 1 can be reduced by increasing the value of the resistor R2, this causes a decrease in the input signal level to the filter 1 and a deterioration of the transmission characteristics of the filter 1.
この考案は、波形整形用のフィルタの動作に悪影響を与
えることなく、IP信号レベルに正確に対応したレベル
の指示信号が得られるように改&したIF回路を提供し
ようとするものである。This invention aims to provide an IF circuit that is modified so that an instruction signal having a level that accurately corresponds to the IP signal level can be obtained without adversely affecting the operation of a waveform shaping filter.
この考案の一実施例によるIF回路の構成を第2図に示
す。FIG. 2 shows the configuration of an IF circuit according to an embodiment of this invention.
第2図の回路は、電源電圧子Bが抵抗R1’aj介して
フィルタ10入力端に接続されていること、およびトラ
ンジスタTr1のコレクタ剛のa点とフィルタ10入力
端とを接続している抵抗R2と並列にコンデンサC3が
接続されていること、02点で第1図の回路と異なる。The circuit of FIG. 2 has the following features: a power supply voltage element B is connected to the input terminal of the filter 10 via a resistor R1'aj, and a resistor is connected between the point a of the collector rigidity of the transistor Tr1 and the input terminal of the filter 10. This circuit differs from the circuit shown in FIG. 1 in two points: capacitor C3 is connected in parallel with R2.
なお第2図において、第1図に示したものと同等の部分
は同一の符号で示し、その説明を省略する。In FIG. 2, parts equivalent to those shown in FIG. 1 are designated by the same reference numerals, and their explanations will be omitted.
第2図の回路では、+B定電源、抵抗R1を介してフィ
ルタ10入力端に直接に供給されるので。In the circuit shown in FIG. 2, the +B constant power supply is directly supplied to the input terminal of the filter 10 via the resistor R1.
フィルタ1の動作がa点のIF信号レベルに及ぼす影響
は大幅に軽減され、この効果は、抵抗R2の値な大きく
するほど顕著になるが、一方で、2信号選択度およびキ
ャプチャ・レシオが劣化してくる。The influence of the operation of filter 1 on the IF signal level at point a is significantly reduced, and this effect becomes more pronounced as the value of resistor R2 increases, but on the other hand, the selectivity of the two signals and the capture ratio deteriorate. I'll come.
しかし抵抗R2と並列に接続されたコンデンサC3は、
この特性劣化を有効に阻止する機能を有する。However, the capacitor C3 connected in parallel with the resistor R2 is
It has a function of effectively preventing this characteristic deterioration.
すなわちコンデンサC3は、a点からフィルタ1に供給
されろ信号に対してはインピーダンスケ低くするように
働くので、抵抗R2をある程度まで大きくしても、2信
号選択度あるいはキャプチャ・レシオが劣化することは
ない。In other words, capacitor C3 works to lower the impedance for the signal supplied to filter 1 from point a, so even if resistor R2 is increased to a certain extent, the two-signal selectivity or capture ratio will deteriorate. There isn't.
第2図に示した回路の2信号選択度特性な第3図に、ま
たキャプチャ・レシオ特性を第4図にそれぞれ符号Aで
示す。The two-signal selectivity characteristic of the circuit shown in FIG. 2 is shown in FIG. 3, and the capture ratio characteristic is shown in FIG. 4 with the symbol A.
なお符号Bで示すカーブは。コンデンサC3を有さない
回路の特性を示す。The curve indicated by the symbol B is. The characteristics of a circuit without capacitor C3 are shown.
以上のようにこの考案によれば、IF信号レベルに対す
る指示信号レベルの対応関係を正確に保持すること、お
よび2信号選択度特性およびキャプチャ・レシオを劣化
させないこと、の相反する2つの条件をともに満足させ
ることができ、FMチューナの受信状態の改善に与える
効果はきわめて著るしい。As described above, according to this invention, the two conflicting conditions of accurately maintaining the correspondence relationship between the instruction signal level and the IF signal level and not deteriorating the two-signal selectivity characteristic and capture ratio can be met. The effect on improving the reception condition of the FM tuner is extremely significant.
第1図は従来のIF回路の一部な示す回路図、第2図は
この考案の一実施例によるIF回路の一部を示す回路図
、第3図は第2図の回路で得られた2信号選択度特性を
、また第4図はキャプチャ。
レシオ特性をそれぞれ示すグラフである。
1・・・・・・フィルタ、2・・・・・・整流回路。Fig. 1 is a circuit diagram showing a part of a conventional IF circuit, Fig. 2 is a circuit diagram showing a part of an IF circuit according to an embodiment of this invention, and Fig. 3 is a circuit diagram showing a part of an IF circuit according to an embodiment of this invention. Figure 4 also captures the two-signal selectivity characteristics. 3 is a graph showing each ratio characteristic. 1... Filter, 2... Rectifier circuit.
Claims (1)
たIF信号を波形整形用フィルタの入力端に供給する抵
抗と、上記IF信号の一部を整流して指示信号を発生す
る整流回路とを備えたものにおいて、上記フィルタの入
力端を直流電源に接続するとともに、上記抵抗と並列に
コンデンサな接続したことを特徴とするFM受信器のI
F回路。A resistor that supplies the IF signal appearing on the collector side of a transistor that amplifies the input signal to the input terminal of a waveform shaping filter, and a rectifier circuit that rectifies a part of the IF signal to generate an instruction signal. In the FM receiver, the input end of the filter is connected to a DC power source, and a capacitor is connected in parallel with the resistor.
F circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13992676U JPS5824521Y2 (en) | 1976-10-18 | 1976-10-18 | FM receiver IF circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13992676U JPS5824521Y2 (en) | 1976-10-18 | 1976-10-18 | FM receiver IF circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5357730U JPS5357730U (en) | 1978-05-17 |
JPS5824521Y2 true JPS5824521Y2 (en) | 1983-05-26 |
Family
ID=28748688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13992676U Expired JPS5824521Y2 (en) | 1976-10-18 | 1976-10-18 | FM receiver IF circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5824521Y2 (en) |
-
1976
- 1976-10-18 JP JP13992676U patent/JPS5824521Y2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5357730U (en) | 1978-05-17 |
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