JPS58218180A - Semiconductor light-emitting element and manufacture thereof - Google Patents
Semiconductor light-emitting element and manufacture thereofInfo
- Publication number
- JPS58218180A JPS58218180A JP57100309A JP10030982A JPS58218180A JP S58218180 A JPS58218180 A JP S58218180A JP 57100309 A JP57100309 A JP 57100309A JP 10030982 A JP10030982 A JP 10030982A JP S58218180 A JPS58218180 A JP S58218180A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- layer
- crystal layer
- insulating layer
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 72
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 239000013078 crystal Substances 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims abstract 2
- 238000000151 deposition Methods 0.000 claims 3
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 239000006185 dispersion Substances 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 150000001875 compounds Chemical class 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/0004—Devices characterised by their operation
- H01L33/0037—Devices characterised by their operation having a MIS barrier layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0083—Processes for devices with an active region comprising only II-VI compounds
- H01L33/0087—Processes for devices with an active region comprising only II-VI compounds with a substrate not being a II-VI compound
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、金属−絶縁物一半導体からなるＭＩＳ型構造
の半導体発光素子およびその製造方法の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to improvements in a semiconductor light emitting device having an MIS type structure consisting of a metal-insulator-semiconductor and a method for manufacturing the same.
〔発明の技術的背景とその問題点〕 ゛近時、化合物
半導体を材料とする金属−絶縁物−半導体ＭＩＳ型発光
素子について、多くの研究実験が行なわれているが、こ
の種の発光素子は発光効率が低い上に素子形状の問題点
かあシ、高輝度になシにくくその再現性に乏しい。[Technical background of the invention and its problems] [Recently, many research experiments have been conducted on metal-insulator-semiconductor MIS type light emitting devices made of compound semiconductors. In addition to low luminous efficiency, there are problems with the element shape, and it is difficult to achieve high brightness and its reproducibility is poor.
このため、未だ実用化されるには到っておらず、その改
良が必要とされている。For this reason, it has not yet been put into practical use, and improvements are needed.
第１図は従来の一般的なＭＩＳ型発光発光ダイオード子
構造を示す断面模式図である。図中１１はＮ型ＧａＰ結
晶基・、：板、１２はＮ型Ｚｎ８工ピタキシヤル層、１
シいは絶縁層、１４はショットキー電極、１５はオーム
性電極を示している。この構造の素子は雇１返安価、か
つ容易な製ゎア。ヤオ−Ｃゎユうゎ鷹、□蟻、ヵ１．よ
１、ヶれたショットキー電極１４′の存在のため発光が
分散し、輝度の低いものであった。FIG. 1 is a schematic cross-sectional view showing a conventional general MIS type light emitting diode structure. In the figure, 11 is an N-type GaP crystal base plate, 12 is an N-type Zn8 pitaxial layer, 1
14 is an insulating layer, 14 is a Schottky electrode, and 15 is an ohmic electrode. Elements with this structure are inexpensive and easy to manufacture. Yao-Cwayuuwahawk, □ant, ka1. First, due to the presence of the chipped Schottky electrode 14', the light emission was dispersed and the brightness was low.
本発明の目的は、ｕ’ｘｓ□型構造にも拘わらず発光の
分散を防止することができ、高輝度化をはかシ得る簡易
な構造の半導体発光素子を提供することにある。また、
本発明の他の目的は、上記半導体発光素子を容易なプロ
セスで製造することができ、製造歩留シ向上におよび製
造コストの低減化をはかり得る半導体発光素子の製造方
法を提供することにある。An object of the present invention is to provide a semiconductor light-emitting device with a simple structure that can prevent dispersion of light emission and achieve high brightness despite the u'xs□ type structure. Also,
Another object of the present invention is to provide a method for manufacturing a semiconductor light emitting device, which allows the semiconductor light emitting device described above to be manufactured by an easy process, improves manufacturing yield, and reduces manufacturing costs. .
本発明の骨子は、素子内部に高抵抗半導体結晶層を選択
的に設け、この半導体結晶層により電流狭窄を行ない、
前述したショットキ電極による発光の分、散を防止する
ことにある。The gist of the present invention is to selectively provide a high-resistance semiconductor crystal layer inside an element, perform current confinement using this semiconductor crystal layer,
The object is to prevent the light emission from being dispersed due to the Schottky electrode described above.
すなわち本発明は、金属−絶縁物一半導体からなるＭＩ
Ｓ□型半導体発光素子において、半導０ゎよ、、５．わ
、よう□７□。□わ
、、門。That is, the present invention provides an MI consisting of a metal-insulator-semiconductor.
In the S□ type semiconductor light emitting device, the semiconductor is 0ゎ.5. Wow □7□. □Wow, the gate.
た高抵抗の第「・１．、半導体結晶層と、この第１半導
体結晶層および上記半導体基板上に成長形成さ、１れた
上記半導体基板と同一導電型の第２半導体結晶層と、こ
の第２半導体結晶層上に成長形成或いは被着された絶縁
層と、この絶縁層上に該絶縁層の中央部を除いて被着さ
れたショットキー電極と、前記半導体基板の裏面側に被
着されたオーム性電極とを具備するようにしたものであ
る。a high resistance semiconductor crystal layer; a second semiconductor crystal layer grown on the first semiconductor crystal layer and the semiconductor substrate; and a second semiconductor crystal layer of the same conductivity type as the semiconductor substrate; an insulating layer grown or deposited on the second semiconductor crystal layer; a Schottky electrode deposited on the insulating layer except for the central portion of the insulating layer; and a Schottky electrode deposited on the back side of the semiconductor substrate. ohmic electrode.
また、本発明は上記構造のＭＩＳ型半榔体発光素子を製
造するに際し、半導体基板上に高抵抗の第１半導体結晶
層をエピタキシャル成長したのち、この第１半導体結晶
層の中央部を選択エツチングし、次いで上記第１半導体
結晶層および半導体基板上に上記半導体基板と同−導電
型の第２半導体結晶層をエピタキシャル成長し、次いで
この第２半導体結晶層上に絶縁層をエピタキシャル成長
し、しかるのちこの絶縁層上に該絶縁層の中央部を除い
てショットキー電極を被着し、かつ前記半導体基板の下
面側にオーム性電極を被着するようにした方法である。Furthermore, in manufacturing the MIS type semiconductor light emitting device having the above structure, the present invention epitaxially grows a high-resistance first semiconductor crystal layer on a semiconductor substrate, and then selectively etches the central portion of the first semiconductor crystal layer. Next, a second semiconductor crystal layer having the same conductivity type as the semiconductor substrate is epitaxially grown on the first semiconductor crystal layer and the semiconductor substrate, and then an insulating layer is epitaxially grown on the second semiconductor crystal layer, and then this insulating layer is grown epitaxially on the second semiconductor crystal layer. In this method, a Schottky electrode is deposited on the insulating layer except for the central portion thereof, and an ohmic electrode is deposited on the lower surface side of the semiconductor substrate.
本発明によれば、高抵抗の第１半導体結晶層によυ電流
狭窄を行ない発光領域を狭めることができるので、絶縁
層上面の中央部よシ発光領域からの光を指向性良く取シ
出すことが可能である。このため、従来素子に比して大
幅な高輝度化をはかることができる。しかも、複雑なプ
ロセスを要することなく、電流狭窄に必要な第１半導体
結晶層を選択エツチング除去するのみでよく、素子の歩
留シ低下および製造コストの増大等を招くこともない。According to the present invention, the light emitting region can be narrowed by confining the υ current using the high-resistance first semiconductor crystal layer, so that light from the light emitting region can be extracted with good directionality from the center of the upper surface of the insulating layer. Is possible. Therefore, it is possible to significantly increase the brightness compared to conventional elements. Moreover, it is sufficient to selectively remove the first semiconductor crystal layer necessary for current confinement without requiring a complicated process, and there is no reduction in device yield or increase in manufacturing cost.
第２ｒは本発明の一実施例に係わるＭＩＳ型発光発光ダ
イオード子構造を示す断面模式図である。図中２１はＮ
型Ｇ’ａＰ結晶基板（半導体基板）であり、この基板２
１上には同基板２１の中央部を除いて高抵抗Ｚｎ８エピ
タキシヤルｆｆ１（第１半導体結晶層）２２が形成され
ている。2r is a schematic cross-sectional view showing a MIS type light emitting diode structure according to an embodiment of the present invention. 21 in the figure is N
It is a type G'aP crystal substrate (semiconductor substrate), and this substrate 2
A high-resistance Zn8 epitaxial layer ff1 (first semiconductor crystal layer) 22 is formed on the substrate 21 except for the central portion thereof.
これら基板２１の中央部および高抵抗Ｚｎ８エピタキシ
ャル１−２２の上面には、Ａ／を添加した低抵抗Ｎ型Ｚ
ｎ８エピタキシヤル層（第２半導体結晶層）２３および
絶縁層２４が順次形成されている。そして、絶縁層２４
の上面周辺部には円環状のショットキー電極２５が被着
され、また前記基板２１の下面全体にはオーム性電極２
６が被着されている。At the center of these substrates 21 and on the upper surface of the high resistance Zn8 epitaxial layer 1-22, a low resistance N-type Z layer doped with A/
An n8 epitaxial layer (second semiconductor crystal layer) 23 and an insulating layer 24 are sequentially formed. Then, the insulating layer 24
An annular Schottky electrode 25 is attached to the periphery of the upper surface, and an ohmic electrode 25 is attached to the entire lower surface of the substrate 21.
6 is coated.
このような構造であれば、前記高抵抗Ｚ ｎ ８工ピタ
キシヤル層２２により電流狭窄かたされ発光領域２７を
狭めふことができ、指向性良く上方向、つまシ基板結晶
２ノと反対側に光を取）出すことができる。このため、
発光の高輝度化をはかり得る。With such a structure, the current can be constricted by the high-resistance Z n 8-layer pitaxial layer 22 and the light emitting region 27 can be narrowed, and the light emitting region 27 can be narrowed upward with good directivity, on the side opposite to the base substrate crystal 2. can emit light. For this reason,
It is possible to increase the brightness of light emission.
次に、上記構造のＭＩＳ型発光発光ダイオード造工程に
ついて説明する。まず、第３図（ａ）に示す如くＮ型Ｇ
ａＰ結晶基板２１上に高抵抗Ｚｎ８エピタキシヤル層２
２を成長させ、この高抵抗ＺｎＳエピタキシャル層２２
の中央部を同図（ｂ）に示す如く選択的にエツチング除
去する。Next, the manufacturing process of the MIS type light emitting diode having the above structure will be explained. First, as shown in Figure 3(a), N-type G
High resistance Zn8 epitaxial layer 2 on aP crystal substrate 21
2, and this high resistance ZnS epitaxial layer 22
The central part of the wafer is selectively etched away as shown in FIG. 2(b).
次いで、これらの上面に第３□：：・ＩＩ （Ｃ）に示
す如くＮ型低抵抗Ｚｎ８エビタキシヤｌ１１１一層２３
を成長させたのち、このＺｎ８工ピタキシヤル層２３上
に同図（ｄｌに示す如く絶縁層２４を被着形成する。Next, on the upper surface of these, a third □::・II (C) shows an N-type low-resistance Zn8 epitaxy layer 111 layer 23.
After growing, an insulating layer 24 is deposited on the Zn8 pitaxial layer 23 as shown in FIG.
しかるのち、絶縁層２４の上面周辺部に円環状のショッ
トキー電極２６を被着子ると共に、Ｎ型Ｇ ｍ Ｐ結晶
基板２１の下面全体にオーム性電極２６を被着すること
によって、前記第２図に示した素子構造が形成される。Thereafter, an annular Schottky electrode 26 is deposited around the upper surface of the insulating layer 24, and an ohmic electrode 26 is deposited over the entire lower surface of the N-type GmP crystal substrate 21. The element structure shown in FIG. 2 is formed.
かくして形成された素子は、前述した如く高抵抗Ｚｎ８
エピタキシヤル層２２にょ）電流、狭窄がなされ、上方
向に光を取シ出すことができる。そしてこの場合、複雑
な工程を要することなく、極めて容易に素子形成を行な
うことかできる。The thus formed element is made of high resistance Zn8 as mentioned above.
In the epitaxial layer 22), current is constricted and light can be extracted upward. In this case, elements can be formed extremely easily without requiring complicated steps.
なお１本発明は上述した実施例に限定されるものではな
い。例えば、前記絶縁層の代りに高抵抗Ｚｎ８エピタキ
シヤル層を形成するようにしてもよい。また、前記基板
結晶はＧａＰに限るものではなく、Ｐａ Ａ ｓその他
各種の化合物半導体を用いることかできる。さらに、素
子形成部材はＺｎ８に限ｔものではなく、Ｚｎ８ｅそ′
）
の他各種の半導体を用いることができる。要す
）るに本発明は、その要旨を逸脱しない範囲で。Note that the present invention is not limited to the embodiments described above. For example, a high resistance Zn8 epitaxial layer may be formed instead of the insulating layer. Further, the substrate crystal is not limited to GaP, and various compound semiconductors such as PaAs and others can be used. Furthermore, the element forming material is not limited to Zn8, but also Zn8e and other materials.
) and various other semiconductors can be used. required
) The present invention is intended without departing from its gist.
種々変形して実施することができる。Various modifications can be made.
第１Ｍは従来の一般的なＭＩＳ型発光発光ダイオード子
構造を示す断面模式図、第２図は本発明の一実施例に係
わるＭＩＳ型発光発光ダイードの素子構造を示す断面模
式図、第３図（，１〜Ｔｄｌは上記実施例に係わる製造
工程を示す断面模式％式％（
板）、ｉｐ、ｚｓ・・・Ｎ型低抵抗Ｚｎ８工ピタキシヤ
ル層（第２半導体結晶層］、１３．２４・・・絶縁層、
１４．１！５・・・ショットキー電極、１５．２６・・
・オーム性電極、２２・・・高抵抗ＺｎＳエピタキシャ
ル層（第１半導体結晶Ｊ＠）、２１・・・発光領域。
出願人代理人 弁理士 鈴 江 武 彦４０３
第１図
第２図
第３図1M is a schematic cross-sectional view showing the structure of a conventional general MIS type light emitting diode, FIG. 2 is a schematic cross sectional view showing the element structure of a MIS type light emitting diode according to an embodiment of the present invention, and FIG. (, 1~Tdl is a cross-sectional schematic % formula % (plate) showing the manufacturing process related to the above example, ip, zs... N-type low resistance Zn8 crystal pitaxial layer (second semiconductor crystal layer), 13.24.・Insulating layer,
14.1!5... Schottky electrode, 15.26...
- Ohmic electrode, 22... High resistance ZnS epitaxial layer (first semiconductor crystal J@), 21... Light emitting region. Applicant's agent Patent attorney Takehiko Suzue 403 Figure 1 Figure 2 Figure 3
Claims (4)
光素子において、半導体基板上に該基板中央部を除いて
成長形成された高抵抗の第１半導体結晶層と、この第１
半導体結晶層および上記半導体基板上に成長形成された
上記半導体基板と同一導電型の第２半導体結晶層と、こ
の第２半導体結晶層上に成長形成或いは被着された絶縁
層と、この絶縁層上に該絶縁層の中央部を除いて被着さ
れたショットキーを極と、前記半導体基板の下面側に被
着されたオーム性電極とを具備してなることを特徴とす
る半導体発光素子。(1) In an MIS type semiconductor light emitting device composed of a metal-insulator-semiconductor, a high-resistance first semiconductor crystal layer grown on a semiconductor substrate except for the center portion of the substrate;
A semiconductor crystal layer, a second semiconductor crystal layer of the same conductivity type as the semiconductor substrate grown on the semiconductor substrate, an insulating layer grown or deposited on the second semiconductor crystal layer, and the insulating layer 1. A semiconductor light emitting device comprising: a Schottky electrode deposited on the insulating layer except for the central portion; and an ohmic electrode deposited on the lower surface of the semiconductor substrate.
れたものであることを特徴とする特許請求の範囲第１項
記載の半導体発光素子。(2) The semiconductor light emitting device according to claim 1, wherein the insulating layer is formed by an oxidation method or a deposition method.
の高抵抗半導体結晶ｌ−からなるものであることを特徴
とする特許請求の範囲第１項記載の半導体発光素子。(3) The semiconductor light emitting device according to claim 1, wherein the insulating layer is made of a high-resistance semiconductor crystal l- of the same type as the second semiconductor crystal layer.
体発光素子の製造方法において、半導体基板上に高抵抗
の第１半導体結晶層をエピタキシャル成長する工程と、
上記第１半導体結晶層の中央部を選択エツチングする工
程と、次いで上記第１半導体結晶層および半導体基板上
に上記半導体基板と同一導電型の第・２半導体結晶層を
エピタキシャル成長する工程と、上記第２半導体結晶層
上に絶縁層をエピタキシャル成長する工程と、上記絶縁
層上に該絶縁層の中央部を除いてショットキー電極を被
着する工程と、前記半導体基板の下面側にオーム性電極
を被着する工程とを具備したことを特徴とする半導体発
光素子の製造方法。(4) A method for manufacturing a MIS type semiconductor light emitting device composed of a metal-insulator-semiconductor, the step of epitaxially growing a high-resistance first semiconductor crystal layer on a semiconductor substrate;
a step of selectively etching the central portion of the first semiconductor crystal layer; a step of epitaxially growing a second semiconductor crystal layer of the same conductivity type as the semiconductor substrate on the first semiconductor crystal layer and the semiconductor substrate; 2. A step of epitaxially growing an insulating layer on the semiconductor crystal layer, a step of depositing a Schottky electrode on the insulating layer except for the central part of the insulating layer, and a step of depositing an ohmic electrode on the lower surface side of the semiconductor substrate. 1. A method for manufacturing a semiconductor light emitting device, comprising a step of attaching the semiconductor light emitting device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57100309A JPS58218180A (en) | 1982-06-11 | 1982-06-11 | Semiconductor light-emitting element and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57100309A JPS58218180A (en) | 1982-06-11 | 1982-06-11 | Semiconductor light-emitting element and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58218180A true JPS58218180A (en) | 1983-12-19 |
Family
ID=14270567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57100309A Pending JPS58218180A (en) | 1982-06-11 | 1982-06-11 | Semiconductor light-emitting element and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58218180A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0232570A (en) * | 1988-07-21 | 1990-02-02 | Sharp Corp | Compound semiconductor light emitting device |
| US5187116A (en) * | 1989-07-05 | 1993-02-16 | Sharp Kabushiki Kaisha | Process for preparing electroluminescent device of compound semiconductor |
-
1982
- 1982-06-11 JP JP57100309A patent/JPS58218180A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0232570A (en) * | 1988-07-21 | 1990-02-02 | Sharp Corp | Compound semiconductor light emitting device |
| US5187116A (en) * | 1989-07-05 | 1993-02-16 | Sharp Kabushiki Kaisha | Process for preparing electroluminescent device of compound semiconductor |
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