JPS58193278U - Radar information display device - Google Patents

Radar information display device

Info

Publication number
JPS58193278U
JPS58193278U JP9091882U JP9091882U JPS58193278U JP S58193278 U JPS58193278 U JP S58193278U JP 9091882 U JP9091882 U JP 9091882U JP 9091882 U JP9091882 U JP 9091882U JP S58193278 U JPS58193278 U JP S58193278U
Authority
JP
Japan
Prior art keywords
amplifier
vector
circuit
display device
target
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9091882U
Other languages
Japanese (ja)
Inventor
祐作 箱田
Original Assignee
日本無線株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本無線株式会社 filed Critical 日本無線株式会社
Priority to JP9091882U priority Critical patent/JPS58193278U/en
Publication of JPS58193278U publication Critical patent/JPS58193278U/en
Pending legal-status Critical Current

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  • Radar Systems Or Details Thereof (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図のaおよびbは夫々従来のPPI表示およびRH
I表示を示すCRT表示面の正面図、第2図は本考案実
施例装置によって表示されるCRT表示面の正面図、第
3図は本考案の一実施例を示すブロック回路図および第
4図は、第3図の実施例に示す偏向信号電圧を示す波形
図である。 1・・・表示・タイミング制御回路、2・・−3IN・
COS変換回路、3−MDA(Multiplying
  D/A)、4・・・サミングアンプ、5・・・フラ
ットフェース補正回路、6・・・偏向アンプ、7・・・
偏向コイル、8・・・CRT、9・・・ビデオアンプ、
10・・・ベクトル発生回路、11・・・輝度制御回路
、12・・・アンブランキングアンプ、13・・・アル
ファニューメリック発生回路、14・・・D/A変換器
、15・・・フォーカスアン  □プ、16・・・高圧
電源、17・・・S/D変換器。
a and b in Fig. 1 are the conventional PPI display and RH display, respectively.
FIG. 2 is a front view of a CRT display surface displayed by an apparatus according to an embodiment of the present invention, FIG. 3 is a block circuit diagram showing an embodiment of the present invention, and FIG. 4 is a front view of a CRT display surface showing an I display. 3 is a waveform diagram showing the deflection signal voltage shown in the embodiment of FIG. 3. FIG. 1...Display/timing control circuit, 2...-3IN-
COS conversion circuit, 3-MDA (Multiplying
D/A), 4... Summing amplifier, 5... Flat face correction circuit, 6... Deflection amplifier, 7...
Deflection coil, 8...CRT, 9...video amplifier,
DESCRIPTION OF SYMBOLS 10... Vector generation circuit, 11... Brightness control circuit, 12... Unblanking amplifier, 13... Alphanumeric generation circuit, 14... D/A converter, 15... Focus ann □ 16... High voltage power supply, 17... S/D converter.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)目標から反射される各種の目標信号を入力し、表
示に必要な各種のタイミング信号を発生する表示・タイ
ミング制御回路と、ベクトル方向を定める5IN−CO
8変換回路およびMDAと、ベクトル発生の基準となる
ランプ電圧を発生し、かつベクトル長を定めるベクトル
発生回路と、高度数値データを表示するアルファニュー
メリック発生回路と、前記目標の位置を定めるD/A変
換器と、前記SIN、CO3変換回路、MDA、ベクト
ル発生回路、アルファニューメリック発生回路およびD
/A変換器の出力信号を合成して表示器へ送給するサミ
ングアンプとを具備し、PPI表示面上に高度ベクトル
および高度数値等の前記目標の高度に関するデータをも
表示するようにしたことを特徴とするレーダ情報表示装
置。
(1) A display/timing control circuit that inputs various target signals reflected from the target and generates various timing signals necessary for display, and a 5IN-CO that determines the vector direction.
8 conversion circuit and MDA, a vector generation circuit that generates a lamp voltage as a reference for vector generation and determines the vector length, an alphanumeric generation circuit that displays altitude numerical data, and a D/A that determines the position of the target. converter, the SIN, CO3 conversion circuit, MDA, vector generation circuit, alphanumeric generation circuit and D
It is equipped with a summing amplifier that synthesizes the output signals of the /A converter and sends it to the display, and also displays data related to the altitude of the target such as an altitude vector and altitude value on the PPI display screen. A radar information display device characterized by:
(2)実用新案登録請求の範囲第1項の装置において、
前記表示器がフラットフェース補正回路、偏向アンプ、
ビデオアンプ、輝度制御回路、アンブランキングアンプ
、フォーカスアンプ、高圧電源、偏向コイル、およびC
RTから構成されることを特徴とするレーダ情報表示装
置。
(2) In the device set forth in claim 1 of the utility model registration claim,
The display device includes a flat face correction circuit, a deflection amplifier,
Video amplifier, brightness control circuit, unblanking amplifier, focus amplifier, high voltage power supply, deflection coil, and C
A radar information display device comprising an RT.
JP9091882U 1982-06-18 1982-06-18 Radar information display device Pending JPS58193278U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9091882U JPS58193278U (en) 1982-06-18 1982-06-18 Radar information display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9091882U JPS58193278U (en) 1982-06-18 1982-06-18 Radar information display device

Publications (1)

Publication Number Publication Date
JPS58193278U true JPS58193278U (en) 1983-12-22

Family

ID=30099356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9091882U Pending JPS58193278U (en) 1982-06-18 1982-06-18 Radar information display device

Country Status (1)

Country Link
JP (1) JPS58193278U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0440386A (en) * 1990-06-06 1992-02-10 Fujitsu Ltd Display system for three-dimensional radar
JP2013124911A (en) * 2011-12-14 2013-06-24 Toshiba Corp Target display device and target display program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0440386A (en) * 1990-06-06 1992-02-10 Fujitsu Ltd Display system for three-dimensional radar
JP2013124911A (en) * 2011-12-14 2013-06-24 Toshiba Corp Target display device and target display program

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