JPS5819165B2 - Double tuned circuit - Google Patents
Double tuned circuitInfo
- Publication number
- JPS5819165B2 JPS5819165B2 JP52116391A JP11639177A JPS5819165B2 JP S5819165 B2 JPS5819165 B2 JP S5819165B2 JP 52116391 A JP52116391 A JP 52116391A JP 11639177 A JP11639177 A JP 11639177A JP S5819165 B2 JPS5819165 B2 JP S5819165B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- coupling
- double
- tuned circuit
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Filters And Equalizers (AREA)
Description
【発明の詳細な説明】
本発明はテレビ受像機、ラジオ受信機等のチューナ部分
に用いられる複同調回路に関し、その目的とするところ
は該複同調回路の同調回路間に結合回路を挿入し、該結
合回路の結合度を必要に応じて変えて良好な受信を可能
にした複同調回路を提供するにある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a double-tuned circuit used in a tuner part of a television receiver, a radio receiver, etc., and its object is to insert a coupling circuit between the tuned circuits of the double-tuned circuit, It is an object of the present invention to provide a double-tuned circuit that enables good reception by changing the coupling degree of the coupling circuit as necessary.
一般にラジオ受信機のチューナ（ＦＭチューナ）は第１
図に示すようにアンテナからの入力信号を入力同調回路
１に入力し、信号選択した後高周波増幅回路２にて増幅
し、複同調回路３に入力する。Generally, the tuner (FM tuner) of a radio receiver is the first tuner.
As shown in the figure, an input signal from an antenna is input to an input tuning circuit 1, and after signal selection, it is amplified by a high frequency amplifier circuit 2 and input to a double tuning circuit 3.
該複同調回路３で不要信号を除去して混合回路４に入力
し、該混合回路４に入力される局部発振回路６からの発
振信号とで混合し、所望する中間周波フィルタ５から中
間周波信号を取出していた。The double-tuned circuit 3 removes unnecessary signals and inputs them to the mixing circuit 4, which mixes them with the oscillation signal from the local oscillation circuit 6 that is input to the mixing circuit 4, and outputs the desired intermediate frequency signal from the intermediate frequency filter 5. was taking it out.
そして、複同調回路３は通常第２図に示すようにコイル
７と可変コンデンサ８とで同調回路を成し、また、コイ
ル１０と可変コンデンサ１１とで同調回路を成し、それ
ぞれの同調回路をコンデンサ９で接続して複同調回路３
を構成していた。The double-tuned circuit 3 usually includes a coil 7 and a variable capacitor 8 as shown in FIG. 2, and a coil 10 and a variable capacitor 11 to form a tuned circuit. Connected with capacitor 9 to double tuned circuit 3
It consisted of
このような従来の複同調回路は相反する特性である選択
度と感度とをコンデンサ９で調整していたので、コンデ
ンサ９が固定であるため両特性が完全に満足されなかっ
た。In such a conventional double-tuned circuit, selectivity and sensitivity, which are contradictory characteristics, are adjusted by the capacitor 9, and since the capacitor 9 is fixed, both characteristics cannot be completely satisfied.
すなわち、結合度を強くすると感度は上がるが選択度が
下がり、結合度を弱くすると選択度が上がり感度は下が
り、ある妥協点に結合度を設定すべくコンデンサ９の容
量を設定していたので全ての地域（特に電波の過密な所
および電波の弱い所）で満足のいく受信ができない等の
欠点があった。In other words, increasing the degree of coupling increases the sensitivity but decreasing the selectivity, and weakening the degree of coupling increases the selectivity and decreases the sensitivity.The capacitance of capacitor 9 was set to set the degree of coupling at a certain compromise, so all There were drawbacks such as unsatisfactory reception in some areas (particularly in areas with congested radio waves and areas with weak radio waves).
本発明は、この欠点を解消したもので第１、第２の実施
例を第３図、第４図に示して説明する。The present invention eliminates this drawback, and the first and second embodiments will be explained with reference to FIGS. 3 and 4.
第２の実施例を示す第３図において、コイル７、可変コ
ンデンサ８およびコイル１０、可変コンデンサ１１でそ
れぞれ同調回路を成し、コンデンサ１５．１６を接続し
、コンデンサ１５，１６の接・読点にコンデンサ１７、
スイッチングダイオード１８の直列回路の１端を接続し
、他端を接地して成る結合回路を同調回路間に接続して
複同調回路を構成する。In FIG. 3 showing the second embodiment, a coil 7, a variable capacitor 8, a coil 10, and a variable capacitor 11 form a tuning circuit, and capacitors 15 and 16 are connected to the terminals and reading points of the capacitors 15 and 16. capacitor 17,
A combination circuit in which one end of a series circuit of switching diodes 18 is connected and the other end is grounded is connected between the tuned circuits to form a double tuned circuit.
端子２２からスイッチングダイオード１８に逆バイアス
電圧が供給されるとスイッチングダイオード１８がオフ
となり、同調回路間をコンデンサ１５．１６で結合し、
結合度が強く、また、スイッチングダイオード１８を順
バイアスするとコンデンサ１７の１端が接地されるので
同調回路間を・コンデンサ１５，１６，１７で結合する
こととなり、結合度が弱くなる。When a reverse bias voltage is supplied to the switching diode 18 from the terminal 22, the switching diode 18 is turned off, and the tuning circuits are coupled by capacitors 15 and 16.
The degree of coupling is strong, and since one end of the capacitor 17 is grounded when the switching diode 18 is forward biased, the tuning circuits are coupled by the capacitors 15, 16, and 17, and the degree of coupling becomes weak.
従って、必要に応じスイッチングダイオード１８をオン
・オフさせることにより受信に最適な結合度が得られる
。Therefore, by turning on and off the switching diode 18 as necessary, the optimum degree of coupling for reception can be obtained.
第３の実施例を示す第４図において、コイル７、；可変
コンデンサ８およびコイル１０、可変コンデンサ１１で
同調回路を成し、各同調回路は電磁結合しており、コイ
ルＴ、１０の接続にコンデンサ１９とスイッチングダイ
オード２０との直列回路の１端を接続し、他端を接地し
て成る結合回路を設けて複同調回路を構成する。In FIG. 4 showing the third embodiment, a tuned circuit is formed by a coil 7, a variable capacitor 8, a coil 10, and a variable capacitor 11, and each tuned circuit is electromagnetically coupled to the connection between the coils T and 10. A combination circuit is provided in which one end of a series circuit of a capacitor 19 and a switching diode 20 is connected and the other end is grounded to form a double-tuned circuit.
端子２３からスイッチングダイオード２０に逆バイアス
が供給されるとスイッチングダイオード２０がオフとな
りコンデンサ１９の１端が接地点からオープンの状態に
なってコイル７．１０の電磁結合だけとなり、結合度が
強く、また、スイッチングダイオード２０に順バイアス
が供給されるとスイッチングダイオード２０がオンにな
ってコンデンサ１９の１端が接地され、結合度が弱くな
る。When a reverse bias is supplied to the switching diode 20 from the terminal 23, the switching diode 20 is turned off, and one end of the capacitor 19 becomes open from the ground point, leaving only the electromagnetic coupling between the coils 7 and 10, and the degree of coupling is strong. Further, when a forward bias is supplied to the switching diode 20, the switching diode 20 is turned on and one end of the capacitor 19 is grounded, thereby weakening the degree of coupling.
斜上のように本発明によるとスイッチングダイオードを
設けてコンデンサの１端を接地点からオン・オフする結
合回路を設けて複同調回路を構成するので多数の放送局
が乱立する地域においてはスプリアス妨害、相互変調等
の悪影響を防止するために同調回路間の結合度を弱くし
て選択度を高くし、良好な受信を行なうことができ、ま
た、受信電波の弱い地域では結合度を強くして高感度の
状態で良好な受信を行なうことができる。As shown above, according to the present invention, a switching diode is provided and a coupling circuit is provided to turn one end of the capacitor on and off from the ground point to form a double-tuned circuit, so spurious interference can be avoided in areas where there are many broadcasting stations. In order to prevent adverse effects such as intermodulation, the degree of coupling between the tuned circuits is weakened to increase selectivity and achieve good reception.In addition, in areas where received radio waves are weak, the degree of coupling is strengthened. Good reception can be achieved in a highly sensitive state.
また、複同調回路における結合度を少ない部品で容易に
変えることが可能となりコスト的にも有利となる。Furthermore, the degree of coupling in the double-tuned circuit can be easily changed with a small number of parts, which is advantageous in terms of cost.
第１図は一般的なチューナの構成を示すブロック図、第
２図は従来の複同調回路を示す回路図、第３図、第４図
は本発明による実施例を示す回路図である。
７．１０・・・・・・コイル、８，１１・・・・・・可
変コンデンサ、１２，１３，１５，１６，１７，１９・
・・・・・コンデンサ、２２，２３・・・・・・端子、
１８，２０・・・・・・スイッチングダイオード。FIG. 1 is a block diagram showing the configuration of a general tuner, FIG. 2 is a circuit diagram showing a conventional double tuning circuit, and FIGS. 3 and 4 are circuit diagrams showing an embodiment according to the present invention. 7.10... Coil, 8, 11... Variable capacitor, 12, 13, 15, 16, 17, 19.
...Capacitor, 22, 23...Terminal,
18, 20...Switching diode.
Claims (1)
ッチングダイオードのオン・オフによりコンデンサの一
端を接地点から接離し、前記結合回路の結合度を変えら
れるようにしたことを特徴とする複同調回路。1. A double-tuned circuit characterized in that a switching diode is provided in the coupling circuit, and one end of the capacitor is connected to and separated from a ground point by turning on and off the switching diode, thereby changing the coupling degree of the coupling circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52116391A JPS5819165B2 (en) | 1977-09-28 | 1977-09-28 | Double tuned circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52116391A JPS5819165B2 (en) | 1977-09-28 | 1977-09-28 | Double tuned circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5450253A JPS5450253A (en) | 1979-04-20 |
| JPS5819165B2 true JPS5819165B2 (en) | 1983-04-16 |
Family
ID=14685856
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52116391A Expired JPS5819165B2 (en) | 1977-09-28 | 1977-09-28 | Double tuned circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5819165B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5950113U (en) * | 1982-09-24 | 1984-04-03 | 富士通株式会社 | phase modulator |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4943855U (en) * | 1972-07-21 | 1974-04-17 |
-
1977
- 1977-09-28 JP JP52116391A patent/JPS5819165B2/en not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4943855U (en) * | 1972-07-21 | 1974-04-17 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5450253A (en) | 1979-04-20 |
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