JPS58187024A - Input switching circuit - Google Patents
Input switching circuitInfo
- Publication number
- JPS58187024A JPS58187024A JP7063382A JP7063382A JPS58187024A JP S58187024 A JPS58187024 A JP S58187024A JP 7063382 A JP7063382 A JP 7063382A JP 7063382 A JP7063382 A JP 7063382A JP S58187024 A JPS58187024 A JP S58187024A
- Authority
- JP
- Japan
- Prior art keywords
- channel
- input
- series
- light emitting
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
- H03K17/795—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling bipolar transistors
- H03K17/7955—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling bipolar transistors using phototransistors
Landscapes
- Electronic Switches (AREA)
Abstract
Description
【発明の詳細な説明】
（１）発明の分野
この発明は、複数の入力信号を切換選択する入力切換回
路に関するものである。DETAILED DESCRIPTION OF THE INVENTION (1) Field of the Invention The present invention relates to an input switching circuit that switches and selects a plurality of input signals.
（２）従来技術
多数の入力信号を切換選択する入力切換回路において、
入力切換器に用いられるスイッチ素子として種々のもの
が考えられる。(2) Prior art In an input switching circuit that switches and selects a large number of input signals,
Various types of switching elements are conceivable for use in input switching devices.
近年、高速化が要望されているが、動作頻度が多くなシ
、長寿命化を図る関係上、高耐圧の半導体スイッチを使
用して無接点化が図られている。In recent years, there has been a demand for higher speeds, but in order to increase the operating frequency and extend the lifespan, high-voltage semiconductor switches are being used to eliminate contact.
しかしながら、この種のスイッチを駆動するには。However, to drive this kind of switch.
チャンネル毎に複数個のトランスを用意して絶縁駆動し
なければならず９回路が複雑、高価で、スペースも非常
に多くとるものであった。A plurality of transformers had to be prepared and driven in isolation for each channel, and the nine circuits were complex, expensive, and took up a large amount of space.
（３）発明の目的
この発明の目的は９以上の点に鑑み、無接点で省スペー
スを図った入力切換回路を提供することである。(3) Purpose of the Invention In view of the above points, the purpose of the present invention is to provide a space-saving input switching circuit with no contact points.
（４）発明の実施例
第１図は、この発明に係る抵抗−電圧変換回路の一実施
例を示す構成説明図である。(4) Embodiment of the Invention FIG. 1 is a configuration explanatory diagram showing an embodiment of a resistance-voltage conversion circuit according to the invention.
図において、几ｔは測温抵抗体で、その一端に第１の導
線ｔｌ、他端に第２．第３の導線１２ 、１３を接続し
、端子口、 ｔｚ、 ｔｓに接続されている。第１の定
電流源ＩＩは、第１の７オトカプラＰＣＩ、第１の導線
ｔ１．測温抵抗体Ｒｔ、第２の導線ｔ２と定電施工を流
し、第２の定電流源■２は、第２の７オトカプラＰＣ２
，補償抵抗Ｒｏ、第３の導線１３．第２の導線ｔ２と定
電流ｉを流し、第１の導線ｔｌと補償抵抗ｌ′ｔｏとの
間から増幅器Ａを介して出力ｅｏが取シ出せるようにな
っておシ、フォトカプラＰＣＩ、ＰＣ２０発光素子は電
流径路にあシ、受光素子は直列接続されて断線検出（パ
ーンアウト）出力ｅｂが取り出せるようになっている。In the figure, t is a resistance temperature detector, with a first conductor tl at one end and a second conductor tl at the other end. The third conductive wires 12 and 13 are connected to the terminal ports, tz and ts. The first constant current source II connects the first 7 external coupler PCI, the first conductive wire t1. Constant current is applied to the resistance temperature detector Rt, the second conductor t2, and the second constant current source 2 is connected to the second 7-way automatic coupler PC2.
, compensation resistor Ro, third conductor 13. A constant current i is passed through the second conducting wire t2, and an output eo can be taken out from between the first conducting wire tl and the compensation resistor l'to via the amplifier A. The light emitting element is placed in the current path, and the light receiving element is connected in series so that a disconnection detection (burnout) output eb can be taken out.
導線１１． Ａ２． Ａ３の抵抗をｒとすれば、抵抗−
電圧変換出力ｅｏは次式となり、導線の影響は除去され
る。Conductor 11. A2. If the resistance of A3 is r, then the resistance -
The voltage conversion output eo is expressed by the following formula, and the influence of the conductor is removed.
ｅｏ ＝ ｉ （Ｒ１＋２ｒ） ＋ （ｌもｏ＋２ｒ
）＝ ｉ （Ｒｔ−Ｒｏ ） ・・・・
・・・・・・・・・（１）なお、補償抵抗Ｒｏは、０℃
からの出力等を得るだめのもので省略することもできる
。eo = i (R1+2r) + (l is also o+2r
)=i (Rt-Ro)...
・・・・・・・・・(1) In addition, the compensation resistance Ro is 0℃
It can also be omitted as it is only used to obtain the output etc.
また、断線検出状態は次表の通りである。The disconnection detection status is shown in the table below.
つまシ、導線ｔｌが断線したときは、第１の７オトカプ
ラＰＣＩに第１の定電流源■１から電流藍が流れずオフ
となシ、導線ｔ３が断線したときは、第２の７オトカプ
ラＰＣ２に第２の定電流源Ｉ２から電流ｌが流れずオフ
となり、導線ｔ２が断線したときは。When the conductor tl is disconnected, the first constant current source ■1 does not flow to the first 7-digital coupler PCI and the current is turned off, and when the conductor t3 is disconnected, the second 7-digital coupler PCI is turned off. When the current l does not flow to the PC2 from the second constant current source I2 and the PC2 is turned off, the conductor wire t2 is disconnected.
第１．第２の７オトカプラＰｃｔ、 ＰＯ２のいずれに
も第１．第２の定電流源１１．Ｉ２から電流ｉが流れず
１両方ともオフとなり、いずれの場合も断線検出出力ｅ
ｂはオフとなり、断線を検出することができる。1st. The 1st. Second constant current source 11. Current i does not flow from I2 and both 1 become off, and in either case, disconnection detection output e
b is turned off, and a disconnection can be detected.
このように、電流経路に７オトカプラを設けることによ
多回路が簡単となシ、確実に抵抗体の断線を検出するこ
とができる。In this way, by providing the seven automatic couplers in the current path, multiple circuits can be simplified and disconnection of the resistor can be reliably detected.
第２図は、この発明に係る多点入力切換回路の一実施例
を示す構成説明図である。FIG. 2 is a configuration explanatory diagram showing an embodiment of the multi-point input switching circuit according to the present invention.
図において、１は、基準抵抗Ｒｚ、スパン抵抗Ｒｓ。In the figure, 1 is a reference resistance Rz and a span resistance Rs.
端子ｔｌｌ 、 １１２ 、 Ａ１３ 、・・・、 Ａ
４１．Ａ４２，１４ｍに接続された測温抵抗比１．几２
．Ｒ３，Ｒ４を順次切換選択する入力切換器、２は入力
切換器ｌを駆動する駆動回路、ＩはフォトカグラＰＣＩ
、ＰＣ２，補償抵抗Ｒｏ 、入力切換器１を介して基準
抵抗Ｈｚ、スパン抵抗Ｒｓ、測温抵抗Ｒ１，・・、几４
に定電流ｉを供給する定電流回路、Ａは人力切換器１の
出力を増幅する増幅器、３は増幅器Ａの出力を絶縁する
アイソ・レータ、４はアイソレータ３の出力をデジタル
信号に変換するＡ−Ｄ変換器、５はＡ−Ｄ変換器４の出
力の演算処理。Terminals tll, 112, A13,..., A
41. The resistance temperature measurement ratio connected to A42, 14m is 1.几2
．． An input switch that sequentially switches and selects R3 and R4, 2 is a drive circuit that drives input switch l, I is a photocagra PCI
, PC2, compensation resistance Ro, reference resistance Hz, span resistance Rs, temperature measuring resistance R1, . . . , 几4
, A is an amplifier that amplifies the output of the manual switching device 1, 3 is an isolator that isolates the output of the amplifier A, and 4 is A that converts the output of the isolator 3 into a digital signal. -D converter; 5 is an arithmetic processing of the output of the A-D converter 4;
駆動回路２の制御等を行うマイクロコンピュータのよう
な演算回路、６は断線検出、故障検出等を行う検出回路
である。An arithmetic circuit such as a microcomputer that controls the drive circuit 2, etc., and a detection circuit 6 that performs disconnection detection, failure detection, etc.
定電流回路Ｉは、電圧■ｌを定電圧ダイオードＺＤで定
電圧化した電圧を基準とし、２個の演算増幅器Ａｌ、Ａ
２，２個のトランジスタＴｒ、Ｔｒ’等よシなる２つの
定電流源を含んでいる。The constant current circuit I is based on a voltage obtained by making the voltage ■l constant with a constant voltage diode ZD, and includes two operational amplifiers Al and A.
It includes two constant current sources such as two transistors Tr and Tr'.
検出回路６は、フォトカブラＰＣＩ、ＰＣ２の出力に応
じて発光する発光ダイオードのような第１の表示器Ｌｌ
、断線検出出力を取り出す養出力端子６１に−Ｄ変換器
４の動作（ＢＵＳＹ）信号に応じて発光する発光ダイオ
ードのような第２の表示器Ｌ２゜Ａ −Ｄ変換器４の動
作状態を出力する出力端子６２等よりなり、第１．第２
の表示器ＬＬ、Ｌ２は近接して配置されている。The detection circuit 6 includes a first indicator Ll such as a light emitting diode that emits light according to the output of the photocoupler PCI, PC2.
, a second indicator L2° such as a light emitting diode that emits light in response to the operation (BUSY) signal of the -D converter 4 outputs the operating state of the -D converter 4 to the output terminal 61 from which the disconnection detection output is taken out. It consists of output terminals 62 and the like, and the first. Second
Display devices LL and L2 are arranged close to each other.
入力切換器１は、各チャンネル毎に、切換スイッチ素子
として３個のオプトＭＯ８−ＦＥＴのような高耐圧の光
駆動素子Ｓｏｌ 、 ８ｏ２ 、 Ｓｏ３ 、 Ｓｌｌ
、 Ｓ１２ 。The input switch 1 includes three high-voltage optical drive elements such as opto-MO8-FETs Sol, 8o2, So3, and Sll as changeover switch elements for each channel.
, S12.
Ｓ１３．・・・、 ８５１ 、８５２ 、 Ｓｓ３を有
し、これら各チャンネルに対応して駆動回路２は、直列
接続された発光素子Ｌｏｌ、Ｌｏｚ、Ｌｏｇ、Ｌｘｌ、
Ｌ１２．Ｌ１３．・、 Ｌ５１．Ｌ５２． Ｌ５３を有
し、トランジスタＴｒＯ、Ｔｒｉ 、・・・、Ｔｒ５の
いずれかを演算回路５によシ制御されるセレクタ２０の
出力によジオンとし、電圧■２を供給して発光素子３個
を同時に発光させることＫよシ、各チャンネル毎のスイ
ッチ素子をオンとすることができる。S13. ..., 851, 852, Ss3, and corresponding to each of these channels, the drive circuit 2 has light emitting elements Lol, Loz, Log, Lxl, connected in series.
L12. L13.・、L51. L52. L53, one of the transistors TrO, Tri, . In addition to emitting light, a switch element for each channel can be turned on.
なお、光駆動素子は、第３図で示すように、ＦＥＴのよ
うなスイッチング部Ｓと９発光ダイオードのような発光
素子りとが一体とされたようなものである。Note that, as shown in FIG. 3, the optically driven element is a combination of a switching section S such as an FET and a light emitting element such as a nine light emitting diode.
このようにして、駆動回路２は、直列接続された複数の
発光素子を各チャンネルに対応して設けることによシ、
きわめて簡単な回路構成によりスイッチ素子を絶縁駆動
できる。In this way, the drive circuit 2 is constructed by providing a plurality of series-connected light emitting elements corresponding to each channel.
The switch element can be driven in isolation with an extremely simple circuit configuration.
このようにして入力切換器１で切換選択された基準抵抗
几２．スパン抵抗Ｒｓ、測温抵抗Ｒ１，・・・、Ｒ４の
電圧出力ｅｉ、ｅ＠、ｅＬは、増幅器Ａ、アイソレータ
３を介してＡ−Ｄ変換器４によシデジタル信号１）ｚ。The reference resistance 2. selected by the input switch 1 in this manner. The voltage outputs ei, e@, eL of the span resistor Rs and the temperature sensing resistors R1, .
Ｄｓ、Ｄｔに変換され、演算回路５のメモリに順次格納
される。そして演算回路５は１次のような。The data are converted into Ds and Dt and sequentially stored in the memory of the arithmetic circuit 5. The arithmetic circuit 5 is of first order.
ゼロ補償、スパン補償のための演算を行い、正しい出力
信号りを常時出力する。Performs calculations for zero compensation and span compensation, and always outputs the correct output signal.
増幅罪人の正しいゲイ／をＡｏ、ゲイン誤差をΔＡ、オ
フセット誤差を△ｅ、比例定数をｋとすれば、前記ゼロ
基準抵抗ＲＺ、スパン抵抗Ｒｓ、測温抵抗Ｒ１，・・・
、Ｒ４のデータは次式となる。If the amplification sinner's correct gain is Ao, the gain error is ΔA, the offset error is Δe, and the proportionality constant is k, then the zero reference resistance RZ, span resistance Rs, temperature measuring resistance R1, . . .
, R4 is expressed by the following equation.
Ｕｚ ＝ ｋ ｅ−＝ｋ ｆ ｉ （Ｒｚ −Ｒｏ ）
＋△ｅ ） （Ａｏ＋△Ａ）−（２）Ｄｓ ＝ ｋ ｅ
ｍ ＝ｋ （ｉ （Ｒｓ −Ｒｏ ）−１−△ｅ ）
（Ａｏ＋△Ａ）−（３）Ｄｔ ＝ ｋ ｅｔ ＝ ｋ
（ｉ （Ｒｔ −Ｒｏ ）＋△ｅ ） （Ａｏ＋ΔＡ
）−・・（４）これよシゼロ点補正は２次式の演算によ
シ行う。Uz = ke-=kfi (Rz-Ro)
+△e) (Ao+△A)-(2)Ds = ke
m = k (i (Rs - Ro) - 1 - △e)
(Ao+△A)-(3)Dt = k et = k
(i (Rt-Ro)+△e) (Ao+ΔA
) - (4) The zero point correction is performed by calculating the quadratic equation.
Ｄｓ−Ｄｚ＝ｋｉ（Ｒｓ−几ｚ ） （Ａｏ ＋△Ａ
） −−−・−（５）ｌｅｔ −Ｄｚ ＝ ｋ ｉ （
Ｒｔ −Ｒｚ ） （Ａｏ −１−△Ａ ） −−−・
−（６）スパン点補正は、ゼロ、スパン誤差がない場合
の出力をＫ（標準スパンカウント数）とし。Ds-Dz=ki(Rs-几z) (Ao+△A
) −−−・−(5) let −Dz = ki (
Rt −Rz ) (Ao −1−△A ) −−−・
-(6) For span point correction, the output when there is zero or no span error is K (standard span count number).
より、正しい出力
を得る。つまシ、電圧源でない基準抵抗Ｒｚ、スノ（ン
抵抗Ｒｓを用いて、（８）式のような演算を行うことに
よシ、増幅器Ａ、アイソレータ３．補償抵抗Ｒ。Get the correct output. By using the reference resistance Rz, which is not a voltage source, and the snow resistance Rs, the amplifier A, the isolator 3, and the compensation resistance R are calculated as shown in equation (8).
等に起因するオフセット、ゲイン誤差は除去され。Offset and gain errors caused by such factors are removed.
ゼロ点、スパン点の補償済の正しい出力りが得られるこ
とになる。Correct output with zero point and span point compensation can be obtained.
つまシ、（８）式よシ精度は抵抗Ｒｓ、Ｒｚの精度のみ
で決定され、他の要素は入らないので、それだけ精度が
向上する。However, the accuracy of equation (8) is determined only by the accuracy of the resistors Rs and Rz, and other elements are not included, so the accuracy improves accordingly.
検出回路６は、フォトカプラＰＣ１，ＰＯ２のアンド出
力から断線の有無を検出して表示する第１の表示器Ｌｌ
、Ａ−Ｄ変換器４の動作状態を表示する第２の表示器Ｌ
２を含み、正常動作時は、第１．第２の表示器ＬＬ、Ｌ
２は、第４図（ａ）で示すように、チャンネル選択毎に
同期して発光１点滅をくシ返す。The detection circuit 6 includes a first indicator Ll that detects and displays the presence or absence of a disconnection from the AND outputs of the photocouplers PC1 and PO2.
, a second indicator L that displays the operating status of the A-D converter 4.
2, and during normal operation, the 1st. Second indicator LL, L
2, as shown in FIG. 4(a), repeats the flashing of one light emission in synchronization with each channel selection.
第１チヤンネルが異常で断線検出状態となると。When the first channel is abnormal and a disconnection is detected.
この第１チヤンネルが選択されたとき、第４図（ｂ）で
示すように第１の表示器Ｌｌは発光せず、容易に。When this first channel is selected, the first indicator Ll does not emit light, as shown in FIG. 4(b), and is easily activated.
入力切換器１を含む入力側の方が故障Ｃあることが分る
。It can be seen that there is a failure C on the input side including the input switch 1.
Ａ−Ｄ変換器４が故障であると、第４図（Ｃ）で。If the A-D converter 4 is out of order, it is shown in FIG. 4(C).
示すように第２の表示器Ｌ２は全く発光せず、Ａ−り変
換器４を含む測定回路側が故障であることが容易に分る
。As shown, the second indicator L2 does not emit any light, and it is easy to see that the measuring circuit including the A-reverse converter 4 is at fault.
とにより、容易に故障箇所の認識１発見、動作状態の確
認をすることができる。This makes it easy to recognize and find faulty locations and check the operating status.
なお、検出回路６の出力端子６１ 、６２の出力を演算
回路５に入力させ、断線の有無、動作状態を表示する等
して自己診断に利用するようにしてもよい。Note that the outputs of the output terminals 61 and 62 of the detection circuit 6 may be input to the arithmetic circuit 5 and used for self-diagnosis by displaying the presence or absence of wire breakage and the operating state.
（５）発明の要約
以上述べたように、この発明は、チャンネル毎に複数の
光駆動素子を設は複数の入力信号を切換える入力切換器
と、直列接続された複数の発光素子を各チャンネルに対
応して設は前記入力切換器を駆動する駆動回路を備えた
入力切換回路である。(5) Summary of the Invention As described above, the present invention provides an input switcher that includes a plurality of light-driving elements for each channel and switches a plurality of input signals, and a plurality of light-emitting elements connected in series for each channel. Correspondingly provided is an input switching circuit comprising a drive circuit for driving the input switching device.
（６）発明の効果
■各チャンネル毎に直列接続された発光素子を同時に発
光させてスイッチ素子としての光駆動素子を動作させて
いるので、トランス等も不要で。(6) Effects of the invention ■ Since the light-emitting elements connected in series for each channel simultaneously emit light to operate the light-driven element as a switch element, no transformer is required.
アイソレーション、無接点化が可能となり２回路構成が
きわめて簡単で、安価なものとなり、長寿命化、大幅な
省スペース、小型化が図れる。Isolation and non-contact are possible, making the two-circuit configuration extremely simple and inexpensive, allowing for longer life, significant space savings, and miniaturization.
■光駆動素子にオフセット電圧が発生したとしわめて大
きい。■If an offset voltage occurs in the optical drive element, it will be extremely large.
第１図、第２図、第３図は、この発明の一実施例を示す
構成説明図、第４図は動作説明用波形図である。
１・・・入力切換器、２・・・駆動回路、４・・・Ａ−
Ｄ変換器、５・・・演算回路、６・・・検出回路、 Ｒ
ｏ 、Ｒ１、Ｒｚ。
Ｒｓ 、 Ｒ１−Ｒ４・・・抵抗、 ＩＩ、Ｉ２・・・
定電流源、 ＰＣＩ、ＰＣ２・・・フォトカプラ、Ｌｌ
、Ｌ２・・・表示器、Ａ・・・増幅器特許出願人 株式
会社 千野製作所1, 2, and 3 are configuration explanatory diagrams showing one embodiment of the present invention, and FIG. 4 is a waveform diagram for explaining the operation. 1... Input switch, 2... Drive circuit, 4... A-
D converter, 5... Arithmetic circuit, 6... Detection circuit, R
o, R1, Rz. Rs, R1-R4...resistance, II, I2...
Constant current source, PCI, PC2...photocoupler, Ll
, L2...Display device, A...Amplifier Patent applicant Chino Seisakusho Co., Ltd.
Claims (1)
力信号を切換える入力切換器と、直列接続された複数の
発光素子を各チャンネルに対応して設は前記入力切換器
を駆動する駆動回路とを備えたことを特徴とする入力切
換回路。 ２ 光駆動素子として、オプ）ＭＯＳ、ＦＥＴを用いた
ことを特徴とする特許請求の範囲第１項記載の入力切換
回路。 １ 入力信号として定電流が供給される抵抗体を用いた
ことを特徴とする特許請求の範囲第１項または第２項記
載の入力切換回路。[Scope of Claims] 1. An input switch that includes a plurality of optical drive elements for each channel and switches between a plurality of input signals, and an input switch that switches a plurality of light-emitting elements connected in series for each channel. 1. An input switching circuit comprising: a drive circuit for driving a device. 2. The input switching circuit according to claim 1, wherein an op)MOS or FET is used as the optically driven element. 1. The input switching circuit according to claim 1 or 2, characterized in that a resistor to which a constant current is supplied as an input signal is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7063382A JPS58187024A (en) | 1982-04-26 | 1982-04-26 | Input switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7063382A JPS58187024A (en) | 1982-04-26 | 1982-04-26 | Input switching circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58187024A true JPS58187024A (en) | 1983-11-01 |
| JPH0315379B2 JPH0315379B2 (en) | 1991-02-28 |
Family
ID=13437234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7063382A Granted JPS58187024A (en) | 1982-04-26 | 1982-04-26 | Input switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58187024A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60171415A (en) * | 1984-02-16 | 1985-09-04 | Yokogawa Hokushin Electric Corp | Resistance type converter |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52132286A (en) * | 1976-04-28 | 1977-11-05 | Mitsubishi Electric Corp | Input device |
| JPS56152432U (en) * | 1980-04-15 | 1981-11-14 |
-
1982
- 1982-04-26 JP JP7063382A patent/JPS58187024A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52132286A (en) * | 1976-04-28 | 1977-11-05 | Mitsubishi Electric Corp | Input device |
| JPS56152432U (en) * | 1980-04-15 | 1981-11-14 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60171415A (en) * | 1984-02-16 | 1985-09-04 | Yokogawa Hokushin Electric Corp | Resistance type converter |
| JPH0476046B2 (en) * | 1984-02-16 | 1992-12-02 | Yokogawa Electric Corp |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0315379B2 (en) | 1991-02-28 |
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