JPS58172388U - Inverter destruction prevention device - Google Patents
Inverter destruction prevention deviceInfo
- Publication number
- JPS58172388U JPS58172388U JP6923882U JP6923882U JPS58172388U JP S58172388 U JPS58172388 U JP S58172388U JP 6923882 U JP6923882 U JP 6923882U JP 6923882 U JP6923882 U JP 6923882U JP S58172388 U JPS58172388 U JP S58172388U
- Authority
- JP
- Japan
- Prior art keywords
- logic
- switching elements
- main switching
- voltage
- conversion circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Conversion In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案が適用される電源装置の一実施例構成、
第2図は本考案に用いられる逆変換回路におけるメイン
・スイッチング素子の接続態様を説明する説明図、第3
図は従来の考え方を説明する説明図、第4図は本考案に
用いる論理ユニット′を説明する説明図、第5図および
第6図は夫々本考案の一実施例構成を示す。
図中、5は順変換回路、6はフィルタ、7は逆変換回路
、8はフィルタ、9は変圧器、10はマイクロ・プロセ
ッサ、11は順変換ゲート制御回路、12はトランジス
タ・ドライブ回路、16は論理回路、Q、、 Q2.
Q、、 Q4は夫々メイン・スイッチング素子を表わす
。
−才2目
−l
轟■
才4fIFIG. 1 shows the configuration of an embodiment of a power supply device to which the present invention is applied.
Figure 2 is an explanatory diagram illustrating the connection mode of the main switching elements in the inverse conversion circuit used in the present invention;
FIG. 4 is an explanatory diagram for explaining the conventional concept, FIG. 4 is an explanatory diagram for explaining the logic unit' used in the present invention, and FIGS. 5 and 6 each show the configuration of an embodiment of the present invention. In the figure, 5 is a forward conversion circuit, 6 is a filter, 7 is an inverse conversion circuit, 8 is a filter, 9 is a transformer, 10 is a microprocessor, 11 is a forward conversion gate control circuit, 12 is a transistor drive circuit, 16 is a logic circuit, Q,, Q2.
Q, , Q4 represent main switching elements, respectively. -Sai2m-l Todoroki■ Sai4fI
Claims (1)
路によって変換された直流電圧を交流電圧に変換する逆
変換回路をそなえ、該逆変換回路のメ′イン・スイッチ
ング素子がブリッジ回路を溝構成されて直列に直接接続
されていない互に斜めに対向するメイン・スイッチング
素子が一時期に同時にオンされるよう構成されてなる電
源装置において、上記ブリッジ回路を構成されているメ
イン・スイッチング素子のうち、互に直列に直接接続さ
れているメイン・スイッチング素子の両者の制御入力に
対して、両者制御入力がいずれか一方のみ論理rlJに
あるときいずれか一方のスイッチング素子に対して論理
「1」を与えるかあるいは両者スイッチング素子に対し
て共に論理「0」を与えるかするよう構成され、かつ両
者制御入力が共に論理「1」または論理「0」にあると
き両者スイッチング素子に対して共に論理「0」を与え
るかあるい゛はいずれか一方のスイッチング素子に対し
て論理「1」を与えるかするよう構成された論理回路ユ
ニットをもうけ、上記メイン・スイッチング素子に対す
る側御入力発生源と上記夫々のメイン・スイッチング素
子制御入力との間に上記論理回路ユニ ′ット
を介在せしめたことを特徴とするインバータ破壊防止装
置。It is equipped with a forward conversion circuit that converts AC voltage into DC voltage and an inverse conversion circuit that converts the DC voltage converted by the forward conversion circuit into AC voltage, and the main switching element of the inverse conversion circuit connects the bridge circuit to the groove. In a power supply device configured such that main switching elements that are diagonally opposed to each other and are not directly connected in series are turned on at the same time, among the main switching elements that make up the bridge circuit, , for the control inputs of both main switching elements directly connected to each other in series, when only one of the control inputs is at logic rlJ, logic "1" is applied to one of the switching elements. or a logic "0" to both switching elements, and when both control inputs are both at a logic "1" or a logic "0", a logic "0" is applied to both switching elements. A logic circuit unit configured to provide a logic "1" to either one of the switching elements is provided, and a side input source for the main switching element and each of the above. An inverter destruction prevention device characterized in that the above logic circuit unit is interposed between the main switching element control input and the main switching element control input.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6923882U JPS58172388U (en) | 1982-05-12 | 1982-05-12 | Inverter destruction prevention device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6923882U JPS58172388U (en) | 1982-05-12 | 1982-05-12 | Inverter destruction prevention device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58172388U true JPS58172388U (en) | 1983-11-17 |
Family
ID=30078972
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6923882U Pending JPS58172388U (en) | 1982-05-12 | 1982-05-12 | Inverter destruction prevention device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58172388U (en) |
-
1982
- 1982-05-12 JP JP6923882U patent/JPS58172388U/en active Pending
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