JPS58161443A - Communication address system - Google Patents

Communication address system

Info

Publication number
JPS58161443A
JPS58161443A JP57043125A JP4312582A JPS58161443A JP S58161443 A JPS58161443 A JP S58161443A JP 57043125 A JP57043125 A JP 57043125A JP 4312582 A JP4312582 A JP 4312582A JP S58161443 A JPS58161443 A JP S58161443A
Authority
JP
Japan
Prior art keywords
address
message
addresses
processing
processing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57043125A
Other languages
Japanese (ja)
Other versions
JPS6347303B2 (en
Inventor
Yuji Atsui
裕司 厚井
Tadanori Mizuno
忠則 水野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP57043125A priority Critical patent/JPS58161443A/en
Publication of JPS58161443A publication Critical patent/JPS58161443A/en
Publication of JPS6347303B2 publication Critical patent/JPS6347303B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multi Processors (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To cope with processing flexibly and speedily at a failure of computer network or addition of processing, by providing addresses/transmission addresses of plural processors for an address area and a transmission address area in a message and performing dynamic processings such as exchange of a content, deletion, addition and insertion. CONSTITUTION:The 1st address in an address area DAF of a message 1a transmitted from a processor of an address A is D and the 1st transmission address in a transmission address area OAF is A. After the message 1a reaches the processor of the address D and the said specific processing is executed, the address is changed as shown in a message 1b. Then, a message 1c is obtained with the same algorithm in the processor of an address F and the message is transmitted to the processors having the respective address in order as A D F G, and the said specific processing is executed in the processors.

Description

【発明の詳細な説明】 発明の属する分野 本発明は通信アドレス方式に係り、特に電子計算機、端
末などから構成される複数の処理装置が伝送路により通
信を行なうコンピュータ・ネットワークにおいて、伝達
されるメツセージの通信アドレスの指定方式に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a communication address system, and in particular, to a communication address system, in which messages are transmitted in a computer network in which a plurality of processing devices including computers, terminals, etc. communicate through transmission paths. This relates to a communication address designation method.

従来技術の構成、欠点 従来、この種の通信アドレスの指定方式には、伝送路を
通じて伝達されるメツセージ内に発信側又は宛先側の片
側のアドレスを1個所有する方式(集中アドレス管理方
式)や、上記メツセージ内に発信側と宛先側とのアドレ
スを一対所有する方式(分散アドレス管理方式)が知ら
れている。
Structure and disadvantages of conventional technology Conventionally, this type of communication address designation system includes a system in which one address for either the sender or the destination is included in a message transmitted through a transmission path (centralized address management system); A method (distributed address management method) in which a pair of addresses for a sender and a destination are owned in the message is known.

これらの方式は、発信側の処理装置と宛先側の処理装置
とが互いにメツセージを交換し、画処理装置で関連した
処理を進めるものである。このため、1個のメツセージ
を順次指定した順番で複数の処理装置に伝達し、それぞ
れの処理装置でメツセージに含まれるデータ及びアドレ
スの加工などの固有の処理を行なわせることは不可能で
あった。
In these systems, a processing device on the originating side and a processing device on the destination side exchange messages with each other, and related processing is carried out in the image processing device. For this reason, it was impossible to sequentially transmit a single message to multiple processing devices in a specified order and have each processing device perform unique processing such as processing the data and addresses included in the message. .

さらに、メツセージ内にアドレスが固定的に設定されて
いるため、コンピュータ・ネットワークの故障時、ある
いは処理の追加施行時において、柔軟に、かつ、迅速に
対処することができないという欠点があった。
Furthermore, since the address is fixedly set in the message, there is a drawback that it is not possible to respond flexibly and quickly in the event of a computer network failure or additional processing.

本発明の目的 本発明は上記のような従来のものの欠点を除去するため
になされたもので、複数の処理装置が伝送路により通信
を行なうコンピュータ・ネットワークにおいて、前記伝
送路上で伝達されるメツセージに、複数の宛先側の処理
装置のアドレスを持つ宛先アドレス領域及び複数の発信
側の処理装置のアドレスを持つ発信アドレス領域を保有
し、前記宛先アドレス領域で指定したアドレスの順番に
前記メツセージを各処理装置に伝達し、該各処理装置で
メツセージに含まれるデータ及びアドレスの加工などの
固有の処理を行なうようにしてなる構成を有し、前記宛
先側又は発信側の各処理装置にて前記固有の処理を容易
、確実に行なうことができるようにすると共に、メツセ
ージの転送効率を向上させ得るようにした通信アドレス
方式を提供することを目的としている。
OBJECTS OF THE INVENTION The present invention has been made to eliminate the drawbacks of the conventional systems as described above. , has a destination address area with addresses of a plurality of destination side processing devices and a sender address area with addresses of a plurality of sender side processing devices, and processes each message in the order of the addresses specified in the destination address area. It has a configuration in which each processing device performs unique processing such as processing data and addresses included in the message, and each processing device on the destination side or the sending side It is an object of the present invention to provide a communication address system that allows processing to be carried out easily and reliably, and that also improves message transfer efficiency.

本発明の構成 以下、本発明の一実施例を図について説明する。Configuration of the present invention Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例である通信アドレス方式に適
用されるメツセージを示す形式図である。
FIG. 1 is a format diagram showing a message applied to a communication address system which is an embodiment of the present invention.

第1図において、1は伝送路を流れるメツセージ、2は
宛先アドレス領域(DAF’)、3は発信アドレス領域
(OAF)、4はデータである。宛先アドレス領域2に
は、第1宛先アドレス、第2宛先アドレス、第3宛先ア
ドレス、−・・・・と順番にメツセージ1が送られる宛
先の処理装置のアドレスが書き込まれる。具体的な例と
して、(第1宛先アドレス、第2宛先アドレス、第3宛
先アドレス)ヲ(D、F、G)とした場合には、メツセ
ージ1は  ゛アドレスがDの処理装置、次にアドレス
がFの処理装置、そしてアドレスがGの処理装置と順次
に送信され、かつ、そ札ぞれの処理装置にて上記固有の
処理が遂行される。発信アドレス領域3には、第1発信
アドレス、第2発信アドレス、第3発信アドレス、  
・と順番にメツセージ1が経由してきた発信の処理装置
のアドレスが書き込まれる。
In FIG. 1, 1 is a message flowing through a transmission path, 2 is a destination address area (DAF'), 3 is an originating address area (OAF), and 4 is data. In the destination address area 2, the addresses of the destination processing devices to which the message 1 is sent are sequentially written as a first destination address, a second destination address, a third destination address, and so on. As a specific example, if (first destination address, second destination address, third destination address) is (D, F, G), message 1 will be sent to the processing device whose address is D, then the address The card is sequentially transmitted to the processing device with the address F, and then to the processing device with the address G, and the unique processing described above is performed in each processing device. The originating address area 3 includes a first originating address, a second originating address, a third originating address,
. . , and the address of the originating processing device through which message 1 passed is written in order.

具体的な例として、(第1発信アドレス、第2発信アド
レス、第3発信アドレス5を(A、D、F)とした場合
には、このメツセージ1がアドレスAの処理装置で最初
に発生し、次にアドレスDの処理装置を経由して、最後
にアドレスFの処理装置から発信されたことが履歴とし
て示される。
As a specific example, (if the first sending address, second sending address, and third sending address 5 are (A, D, F), this message 1 is first generated in the processing device of address A. , then via the processing device at address D, and finally from the processing device at address F, which is shown in the history.

本発明の動作 第2図は本発明の一実施例である通信アドレス方式の動
作態様を示す説明図である。第2図にはアドレスAの処
理装置がメツセージ1aを発信し、各アドレスD及びF
のそれぞれの処理装置を経由して、最終的にアドレスG
の処理装置に到達するときの宛先アドレス領域2と発信
アドレス領域3との変遷が明示されている0アドレスA
の処理装置より発信されたメツセージ1aの宛先アドレ
ス領域2における第1宛先アドレスはDになっており、
また、発信アドレス領域3における第1発信アドレスは
Aとなっている。このメツセージ1aがアドレスDの処
理装置に到着し、上記固有の処理を遂行した後、メツセ
ージ1bに示すようにアドレスが変更される。
Operation of the present invention FIG. 2 is an explanatory diagram showing the operation mode of a communication address system which is an embodiment of the present invention. In Figure 2, the processing device at address A sends message 1a, and each address D and F sends message 1a.
Finally, the address G
0 address A that clearly shows the transition between destination address area 2 and originating address area 3 when reaching the processing device of
The first destination address in the destination address area 2 of the message 1a sent from the processing device is D,
Further, the first originating address in the originating address area 3 is A. After this message 1a arrives at the processing device at address D and undergoes the above-described specific processing, the address is changed as shown in message 1b.

すなわち、メツセージ1bは、メツセージ1aにおける
第1宛先アドレスDは第2発信アドレスとなり、第2宛
先アドレスF及び第3宛先アドレスGはそれぞれ第1宛
先アドレス及び第2宛先アドレスとなる。ここで、第1
宛先アドレスAは変更されずそのままになっている。次
いで、アドレスFの処理装置においても同一のアルゴリ
ズムによってメツセージ1cとなり、このように、A→
1)→F、Gという順番にそれぞれのアドレスを持った
処理装置へ伝達され、各々において上記固有の処理がな
される。
That is, in the message 1b, the first destination address D in the message 1a becomes the second originating address, and the second destination address F and third destination address G become the first destination address and the second destination address, respectively. Here, the first
Destination address A remains unchanged. Next, the same algorithm is used in the processing device at address F to generate message 1c, and in this way, A→
1)→F and G are transmitted to the processing devices having respective addresses in this order, and the above-mentioned unique processing is performed at each processing device.

第3図は第1図のメツセージ1のデータ4を示す詳細形
式図である。第3図は、具体的にアドレスD、F’、G
の各処理装置にてどのような処理がなされているかを表
わしている。第3図に示すように、データ4aは、メモ
リ容量、実行優先度を指定する基本ジョブ制御文51ア
ドレスDの処理装置でコンパイルするためのコンパイル
制御文6゜アドレスFの処理装置で行なうためのリンク
制御文7.アドレスGの処理装置で実行するための実行
制御文8、及びソースプログラムやコンパイルに必要な
データを蓄える処理装置間受は渡しデータ9とより構成
されている。メツセージ1の巡回により、ジョブ(人間
からみた仕事の単位)はアドレスAの処理装置で入力さ
れ、アドレスDの処理装置でフンパイルされ、アドレス
Fの処理装置でリンクされ、さらに、アドレスGの処理
装置で実行される。
FIG. 3 is a detailed format diagram showing data 4 of message 1 in FIG. Figure 3 specifically shows addresses D, F', and G.
It shows what kind of processing is being done in each processing device. As shown in FIG. 3, data 4a includes a basic job control statement 51 that specifies memory capacity and execution priority, a compile control statement 6 for compiling on the processing device at address D, and a compile control statement 6 for compiling on the processing device at address F. Link control statement 7. An execution control statement 8 for execution by the processing device at address G, and transfer data 9 between processing devices for storing data necessary for source programs and compilation are comprised. Through the circulation of message 1, a job (a unit of work from a human perspective) is input to the processing device at address A, piled up at the processing device at address D, linked at the processing device at address F, and then linked to the processing device at address G. is executed.

発明の他の実施例 第4図及び第5図はそれぞれ本発明の他の実施例である
通信アドレス方式の動作態様を示す説明図である。先に
述べた第2図において、アドレスDの処理装置がコンパ
イル処理を依頼されたとき、この処理ができないと判断
した場合には、コンパイル処理を代行する他の処理装置
を見付ける方法と、このコンパイル処理を取り消してジ
ョブを破棄する方法とが考えられる。第4図では、アド
レスDの処理装置が上記コンパイル処理を代行する処理
装置として、アドレスCの処理1jJe置に依頼する場
合を示している。このとき、アドレスDの処理装置では
第1宛先アドレスDのアドレスにアドレスCを挿入し、
この第1宛先アドレスDを第2−発信アドレスとして構
成したメツセージ1eを、アドレスCの処理装置に迂回
させる。アドレスCの処理装置はこのメツセージ1eを
処理後に、メツセージ1fに示すように、宛先ア・ドレ
ス領域2及び発信アドレス領域3をそれぞれ変更し、そ
の後アドレスFの処理装置に送って処理を続行させる。
Other Embodiments of the Invention FIGS. 4 and 5 are explanatory diagrams each showing the operation mode of a communication address system which is another embodiment of the invention. In FIG. 2 mentioned above, when the processing device at address D is requested to perform compiling processing, if it determines that it cannot perform this processing, there is a method for finding another processing device to perform the compiling processing on behalf of the processing device, and how to perform this compiling processing on behalf of the processing device. One possible method is to cancel the process and discard the job. FIG. 4 shows a case where the processing device at the address D requests the processing device 1jJe at the address C to perform the compiling process on its behalf. At this time, the processing device of address D inserts address C into the address of first destination address D,
The message 1e configured with the first destination address D as the second originating address is routed to the processing device at the address C. After processing this message 1e, the processing device at address C changes the destination address area 2 and originating address area 3, respectively, as shown in message 1f, and then sends it to the processing device at address F to continue processing.

また、第5図では、アドレスAの処理装置から受信した
メツセージ1dを、アドレスDの処理装置がアドレスF
の処理装置へ伝達しようとしたが、  ゛第5図の×で
示すように、伝送路の3箇所で回線断が発生しているた
め、元のアドレスAの処理装置にメツセージを送り返す
場合を示している。この場合には、アドレスDの処理装
置は、アドレスAの処理装置から受信したメツセージ1
dを送り主のアドレスAの処理装置に返送するために、
メツセージ1tに示されるように、宛先アドレス領域2
の第1宛先アドレスDにアドレスAを挿入し、この第1
宛先アドレスDを第2発信アドレスとする構成のメッセ
ニジ1fに変更を行なう〇上述のように、メツセージ1
の転送に当り、各アドレスの処理装置において宛先アド
レス幀域2と発信アドレス・p4域3の内容の交換、削
除、追加。
In addition, in FIG. 5, the message 1d received from the processing device at address A is sent to the processing device at address F.
However, as shown by the x in Figure 5, line breaks have occurred at three locations on the transmission path, so the message is sent back to the processing device at the original address A. ing. In this case, the processing device at address D receives message 1 from the processing device at address A.
In order to return d to the processing device at address A of the sender,
As shown in message 1t, destination address area 2
Insert address A into the first destination address D of
Change the message 1f that has the destination address D as the second originating address. As mentioned above, message 1
When transferring, the processing device for each address exchanges, deletes, and adds the contents of the destination address area 2 and the originating address/p4 area 3.

挿入等の動的な処理を行なうことによって、メツセージ
1に含まれる情報の分散処理、進路変更及び処理の追加
などに柔軟に、かつ、迅速に対処することが可能となる
。また、文書通信においては、複数の人に文書を回覧す
る場合に、回覧者を明確に指示することができると共に
、その履歴を残すことが容易に行なわれ得る。
By performing dynamic processing such as insertion, it becomes possible to flexibly and quickly deal with distributed processing of information included in message 1, route changes, and addition of processing. Furthermore, in document communication, when a document is circulated among multiple people, it is possible to clearly indicate the person who will circulate the document, and it is also possible to easily keep a history of the circulation.

本発明の効果 以上のように、本発明に係る通信アドレス方式によれば
、メツセージ内の宛先アドレス領域と発信アドレス領域
に複数の処理装置の宛先/発信アドレスを持たせ、上記
宛先アドレス領域と発信アドレス領域の内容の交換、削
除、追加、挿入等の動的な処理を行なうようにした構成
としたので、次のような各種の特長を有する〇 (1)メツセージで伝達されるジョブを複数の処理装置
で分散処理したり、複数のジョブをまとめて1つのメツ
セージで伝達できるため、メツセージの転送効率が非常
に優れている。
Effects of the present invention As described above, according to the communication address system according to the present invention, the destination/originating addresses of a plurality of processing devices are provided in the destination address area and the originating address area in a message, and the destination address area and the originating address are Since the configuration is configured to perform dynamic processing such as exchanging, deleting, adding, and inserting the contents of the address area, it has the following various features. Message transfer efficiency is extremely high because the processing devices can perform distributed processing and multiple jobs can be sent together in one message.

(2)メツセージの伝達途中で、このメツセージを予定
しない処理装置に迂回できるため、追加作業の処理が容
易となる。
(2) During the transmission of a message, the message can be bypassed to an unplanned processing device, making it easier to process additional work.

(3)宛先アドレス領域に同一のアドレスを複数個含め
ることができるため、繰り返し処理が可能である。
(3) Since a plurality of identical addresses can be included in the destination address area, repeated processing is possible.

(4)メツセージが経由してきた処理装置のアドレスの
軌跡が残されているため、処理結果の状況を把握するこ
とが容易である。
(4) Since a trace of the address of the processing device through which the message passed is left, it is easy to grasp the status of the processing result.

(5)伝送路0回線断や計算機故障等のネットワーり異
常時に、メツセージの進路変更をなし、最悪の場合には
メツセージを起点に戻すことが可能であるため、信頼性
の向上及び保守が容易である。
(5) In the event of a network abnormality such as a transmission line disconnection or a computer failure, the route of the message can be changed, and in the worst case, the message can be returned to the starting point, improving reliability and facilitating maintenance. It's easy.

(6)アドレス領域に単一のアドレスのみしか保有でき
ないようにすることにより、従来のアドレス管理方式に
縮退できる。
(6) By allowing only a single address to be held in the address area, it is possible to degenerate to the conventional address management system.

したがって、摺数の処理装置によってそれぞれ処理され
るメツセージを、伝送路により伝達させて通信を行なう
コンピュータ・ネットワークについて、そのメツセージ
の転送効率を著しく高めることができ、また、信頼性を
一層向上させ得るという優れた効果を奏するものである
Therefore, in a computer network that communicates by transmitting messages processed by each processing device through a transmission path, the message transfer efficiency can be significantly increased, and the reliability can be further improved. This has an excellent effect.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例である通信アドレス方式に適
用されるメツセージを示す形式図、第2図は本発明の一
実施例である通信アドレス方式の動作態様を示す説明図
、第3図は第1図のメツセージのデータを示す詳細形式
図1、第4図及び第5図はそれぞれ本発明の他の実施例
である通信アドレス方式の動作助様を示す説明図である
〇1.1a〜1f・・・・・・・・・メツセージ、2・
・・・・・・・・宛先アドレス領域、3・・・・−・・
・・発信アドレス領域、4,4a・・・・・・・・・デ
ータ、A、O,D、B、F、G・・・・・・・・・アド
レスO Q’お、図中、同一符号は同一、又は相当部分を示す。
FIG. 1 is a format diagram showing a message applied to the communication address system which is an embodiment of the present invention, FIG. 2 is an explanatory diagram showing the operation mode of the communication address system which is an embodiment of the present invention, and FIG. The figure is a detailed format showing the data of the message shown in Fig. 1. Figs. 1, 4 and 5 are explanatory diagrams each showing the operation mode of the communication address system which is another embodiment of the present invention.〇1. 1a-1f...Message, 2.
・・・・・・Destination address area, 3・・・・−・・
...Outgoing address area, 4, 4a... Data, A, O, D, B, F, G... Address O Q' Oh, same in the diagram Codes indicate the same or corresponding parts.

Claims (2)

【特許請求の範囲】[Claims] (1)複数の処理装置が伝送路により通信を行なうコン
ピュータ・ネットワークにおいて、前記伝送路上で伝達
されるメツセージに、複数の宛先側の処理装置のアドレ
スを持つ宛先アドレス領域、及び複数の発信側の処理装
置のアドレスを持つ発信アドレス領域を保有し、前記宛
先アドレス領域で指定したアドレスの順番に前記メツセ
ージを各処理装置に伝達し、該各処理装置でメツセージ
に含まれるデータ及びアドレスの加工などの固有の処理
を行なうようにしてなる構成としたことを特徴とする通
信アドレス方式。
(1) In a computer network in which multiple processing devices communicate via a transmission path, a message transmitted on the transmission path includes a destination address field containing the addresses of multiple destination processing devices, and a plurality of sender addresses. It has a sender address field containing the addresses of the processing devices, transmits the message to each processing device in the order of the addresses specified in the destination address field, and processes the data and addresses contained in the message in each processing device. A communication address system characterized by having a configuration in which specific processing is performed.
(2)  前記宛先アドレス領域で指定きれた処理装置
では、宛先アドレス領域のアドレ4スと発信アドレス領
域のアドレスとのアドレス交換、宛先又は発信の各々の
アドレス領域におけるアドレスの新規挿入及びアドレス
の削除を行なうことを特徴とする特許請求の範囲第1項
記載の通信アドレス方式。
(2) For processing devices that have been specified in the destination address area, addresses are exchanged between addresses in the destination address area and addresses in the originating address area, new addresses are inserted in each of the destination and originating address areas, and addresses are deleted. A communication address system according to claim 1, characterized in that the communication address system performs the following.
JP57043125A 1982-03-18 1982-03-18 Communication address system Granted JPS58161443A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57043125A JPS58161443A (en) 1982-03-18 1982-03-18 Communication address system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57043125A JPS58161443A (en) 1982-03-18 1982-03-18 Communication address system

Publications (2)

Publication Number Publication Date
JPS58161443A true JPS58161443A (en) 1983-09-26
JPS6347303B2 JPS6347303B2 (en) 1988-09-21

Family

ID=12655118

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57043125A Granted JPS58161443A (en) 1982-03-18 1982-03-18 Communication address system

Country Status (1)

Country Link
JP (1) JPS58161443A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5961251A (en) * 1982-09-29 1984-04-07 Sharp Corp Data transmission system
JPS62212763A (en) * 1986-03-13 1987-09-18 Fujitsu Ltd Job executing system for computer network
JPS62253246A (en) * 1986-04-25 1987-11-05 Nissin Electric Co Ltd Station abnormality informing system for data transmitting system
JPS62253244A (en) * 1986-04-25 1987-11-05 Nissin Electric Co Ltd Data transmission system
JPH02501019A (en) * 1986-11-17 1990-04-05 エイ・ティ・アンド・ティ・コーポレーション Equipment for testing packet-switched networks
WO2006051674A1 (en) * 2004-11-11 2006-05-18 Canon Kabushiki Kaisha Information acquisition method, information addition device, information acquisition device, and program

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
COMPUTER NETWORKS=S56 *

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5961251A (en) * 1982-09-29 1984-04-07 Sharp Corp Data transmission system
JPH0225579B2 (en) * 1982-09-29 1990-06-04 Sharp Kk
JPS62212763A (en) * 1986-03-13 1987-09-18 Fujitsu Ltd Job executing system for computer network
JPS62253246A (en) * 1986-04-25 1987-11-05 Nissin Electric Co Ltd Station abnormality informing system for data transmitting system
JPS62253244A (en) * 1986-04-25 1987-11-05 Nissin Electric Co Ltd Data transmission system
JPH02501019A (en) * 1986-11-17 1990-04-05 エイ・ティ・アンド・ティ・コーポレーション Equipment for testing packet-switched networks
WO2006051674A1 (en) * 2004-11-11 2006-05-18 Canon Kabushiki Kaisha Information acquisition method, information addition device, information acquisition device, and program
US7839528B2 (en) 2004-11-11 2010-11-23 Canon Kabushiki Kaisha Information acquiring method, information appending apparatus, information acquiring apparatus, and program

Also Published As

Publication number Publication date
JPS6347303B2 (en) 1988-09-21

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