JPS58122759A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS58122759A JPS58122759A JP442282A JP442282A JPS58122759A JP S58122759 A JPS58122759 A JP S58122759A JP 442282 A JP442282 A JP 442282A JP 442282 A JP442282 A JP 442282A JP S58122759 A JPS58122759 A JP S58122759A
- Authority
- JP
- Japan
- Prior art keywords
- package
- cap
- ground terminal
- high frequency
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
【発明の詳細な説明】
（１）発明の技術分野
本発明は半導体装り詳しくは半導体パッケージに内装さ
れた半導体チップから発生する高周波電波を遮断する手
段を設けた、すなわちシールド用金属でパッケージ表面
を覆うことによって高周波電波を遮断したパッケージに
関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a semiconductor device, in particular, a semiconductor package that is provided with a means for blocking high frequency radio waves generated from a semiconductor chip housed inside the package. This relates to a package that blocks high frequency radio waves by covering it.
（２）技術の背景
最近の集積技術の進歩に伴い、集積回路はますます高密
度化すると共に大電力消費の形態をもつようになり、こ
のような集積回路は使用時の頻繁なスイッチング動作に
よる大電流の通電と遮断（１）
に伴い、高周波電波を発生する。(2) Background of the technology With recent advances in integrated technology, integrated circuits have become increasingly dense and consume large amounts of power. High-frequency radio waves are generated when large currents are turned on and off (1).
（３１従来技術と問題点
本願の発明者は、前記高周波電波が集積回路の周囲に置
かれた電気機器（例えばテレビや無線装置）に悪影響を
与え、−画の乱れや信号へのノイズ混入などをもたらす
ことを一部した。(31 Prior Art and Problems) The inventor of the present application believes that the high-frequency radio waves have an adverse effect on electrical equipment (e.g., televisions and wireless devices) placed around integrated circuits, causing disturbances in the image, noise mixing in signals, etc. Part of it was to bring about that.
ところで、現在の集積回路を内装するパッケージでは、
上述した集積回路の発生する高周波雑音の他の電気機器
への悪影響を防止する対策が全く施されていないため、
早急な雑音遮断方法の開発が要望されるものである。By the way, in the current package that houses the integrated circuit,
No measures have been taken to prevent the high frequency noise generated by the integrated circuits mentioned above from adversely affecting other electrical equipment.
There is an urgent need to develop a noise blocking method.
（４）発明の目的
本発明は集積回路の発生する高周波電波を遮断し、他の
電気機器に雑音による悪影響を与えない半導体パッケー
ジの提供を目的とする。(4) Purpose of the Invention The object of the present invention is to provide a semiconductor package which blocks high frequency radio waves generated by an integrated circuit and which does not adversely affect other electrical equipment due to noise.
（６）発明の構成
そしてこの目的は本発明によれば、完成したパッケージ
の周囲にシールド用金属部材を配設し、このシールド用
金属部材の一部をパッケージの接地端子に接続すること
によって達成される。(6) Structure of the Invention According to the present invention, this object is achieved by disposing a shielding metal member around the completed package and connecting a part of this shielding metal member to the ground terminal of the package. be done.
（２） （６１発明の実施例 以下、本発明の実施例を図面により詳細に説明する。(2) (Examples of 61 inventions Embodiments of the present invention will be described in detail below with reference to the drawings.
第１図および第２図は本発明の一実施例を示す斜視図と
側面図で、これらの図において、１はセラミックパッケ
ージ、２は接続端子、３は接地端子を示す。1 and 2 are a perspective view and a side view showing one embodiment of the present invention, and in these figures, 1 indicates a ceramic package, 2 a connecting terminal, and 3 a ground terminal.
この実施例においては、シールド用金属キャップ４をパ
ッケージ１に付着することによって半導体チップが発生
する高周波電波を遮断する。In this embodiment, a shielding metal cap 4 is attached to the package 1 to block high frequency radio waves generated by the semiconductor chip.
第１図はシールド用金属キャップ４を装着した状態にあ
るセラミックパッケージ１の斜視図で、キャンプ４は例
えば鉄、ステンレススチール、アルミニウムまたは燐青
銅によって単一体として容易に形成され得る。FIG. 1 is a perspective view of a ceramic package 1 fitted with a shielding metal cap 4, which can easily be formed as a single piece of iron, stainless steel, aluminum or phosphor bronze, for example.
第２図は第１図に示されるパッケージの矢印方向から見
た側面図で、同図において第１図と同じ部分は同じ符号
を付して示す。FIG. 2 is a side view of the package shown in FIG. 1, viewed from the direction of the arrow, and in this figure, the same parts as in FIG. 1 are designated by the same reference numerals.
第２図を参照すると、シールド用金属キャップ４は凹形
状またはコの字形に形成されていて、れ、パッケージ１
の上面Ａ１下面Ｂおよび側面Ｃを覆う、またキャップ４
の一端に形成された突出部５は接地端子３と接続し、キ
ャップ４を接地電位に保ち、キャンプズレ防止ガイド７
は突出し部５と接地端子３の接触を持続させる働きをす
る。Referring to FIG. 2, the shielding metal cap 4 is formed in a concave or U-shape.
The cap 4 covers the top surface A1, bottom surface B and side surface C of the
The protruding part 5 formed at one end is connected to the grounding terminal 3 to keep the cap 4 at ground potential, and the camp displacement prevention guide 7
serves to maintain the contact between the protrusion 5 and the ground terminal 3.
かかる接地電位保持によって、キャップ４は静電遮蔽に
より半導体チップの発生する高周波電波を完全に遮断す
る。By maintaining this ground potential, the cap 4 completely blocks high frequency radio waves generated by the semiconductor chip by electrostatic shielding.
キャップ４の突出部５は、パッケージ１の接地端子３と
大きな接触面を保って接続し、キャップ４の多少のずれ
があっても接地端子３と接触してキャップが接地電位を
保てるようばね性をもたせである。キャップ４と接地端
子３との接続は図示されている方法以外でも可能であり
、キャップ４の多少のずれに対しても接続が保てるもの
であればよい、尚、８はパッケージの方向を示す為のイ
ンデックスである。The protruding part 5 of the cap 4 is connected to the grounding terminal 3 of the package 1 while maintaining a large contact surface, and has a spring property so that even if the cap 4 is slightly displaced, it comes into contact with the grounding terminal 3 and the cap maintains the grounding potential. It's a good thing. The cap 4 and the grounding terminal 3 can be connected by a method other than the one shown, as long as the connection can be maintained even if the cap 4 is slightly displaced. Note that 8 indicates the direction of the package. is the index of
第３図は本発明の他の実施例を説明するための図で、同
図において第１図および第２図に示したものと同じ部分
は同じ符号を付して示す。FIG. 3 is a diagram for explaining another embodiment of the present invention, in which the same parts as those shown in FIGS. 1 and 2 are designated by the same reference numerals.
本°実施例は前記実施例の金属キャップの代りに、導電
性粉末を混入した塗料をパッケージ表面に塗布し、かか
る塗料の一部をパッケージの接地端子上にも塗布するこ
とによって高周波電波を遮断する。In this example, instead of the metal cap of the previous example, a paint mixed with conductive powder is applied to the package surface, and a portion of the paint is also applied to the ground terminal of the package to block high frequency radio waves. do.
第３図を参照すると、塗料６はパッケージ１の上面Ａお
よび下面Ｂに塗布され、それぞれ塗料の一部はパッケー
ジ１の接地端子（図示せず）にも塗布されている。塗料
は、例えば第ｉｍｌのキャップに対応する如く塗布して
もよく、要は高周波電波遮断用の塗料がパッケージの外
側に塗布され、その一部が必ず接地端子上に延びている
ことである。Referring to FIG. 3, paint 6 is applied to the top surface A and bottom surface B of the package 1, and a portion of each paint is also applied to a ground terminal (not shown) of the package 1. The paint may be applied, for example, so as to correspond to the cap of IML No. 1, and the important thing is that the paint for blocking high frequency radio waves is applied to the outside of the package, and a part of it necessarily extends over the ground terminal.
かかる塗料の厚さは遮蔽効果に合せて雑音遮断に十分な
効果を得るよう適宜１整する。導電性塗料６のパッケー
ジ表面への塗布はスプレーガンを用いるような従来技術
により容易に行うことができる。The thickness of the paint is adjusted as appropriate to obtain a sufficient noise shielding effect in accordance with the shielding effect. The conductive paint 6 can be easily applied to the package surface by conventional techniques such as using a spray gun.
（７）発明の詳細
な説明した如く、本発明によれば、パンケージ内に装着
されている半導体チップが出す高周波電波を効率良く遮
断することができるため、周辺電気機器への悪影響を除
去することができ、半導体装置およびその近くに配置さ
れた装置の円滑な運用に効果大である。(7) As described in detail, according to the present invention, it is possible to efficiently block high-frequency radio waves emitted by the semiconductor chip mounted in the pancage, thereby eliminating adverse effects on peripheral electrical equipment. This is highly effective for smooth operation of semiconductor devices and equipment placed near them.
第１図および第２図は本発明の第１の実施例を説明する
ためのパッケージの斜視図および側面図、第３図は本発
明の他の実施例を説明するためのパッケージの側面図で
ある。
１−・パッケージ、２−・接続端子、３−・−接地端子
、４・−シールド用金属キャップ、５−・−接地端子接
続用突出部、６・・・導電性塗料７−・−キャップズレ
防止ガイド、８・−パッケージインデックス
特 許 出−人 富士通株式会社
第１図
第３図
ら1 and 2 are a perspective view and a side view of a package for explaining a first embodiment of the present invention, and FIG. 3 is a side view of a package for explaining another embodiment of the present invention. be. 1- Package, 2- Connection terminal, 3- Ground terminal, 4 Shield metal cap, 5- Ground terminal connection protrusion, 6 Conductive paint 7- Cap misalignment. Prevention Guide, 8-Package Index Patent Author: Fujitsu Limited Figure 1 Figure 3 et al.
Claims (1)
表面にシールド用金属を該パフケージの接地端子に接続
した状態で設けたことを特徴とする半導体＊Ｗ。A semiconductor*W package for a semiconductor integrated circuit, characterized in that a shielding metal is provided on the surface of the package in a state connected to a ground terminal of the puff cage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP442282A JPS58122759A (en) | 1982-01-14 | 1982-01-14 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP442282A JPS58122759A (en) | 1982-01-14 | 1982-01-14 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58122759A true JPS58122759A (en) | 1983-07-21 |
| JPH044753B2 JPH044753B2 (en) | 1992-01-29 |
Family
ID=11583827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP442282A Granted JPS58122759A (en) | 1982-01-14 | 1982-01-14 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58122759A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60121653U (en) * | 1984-01-27 | 1985-08-16 | 株式会社東芝 | Semiconductor device envelope |
| JPS60180852A (en) * | 1984-02-28 | 1985-09-14 | Kyocera Corp | Thermal printer |
| JPS60163751U (en) * | 1984-04-04 | 1985-10-30 | スタンレー電気株式会社 | semiconductor equipment |
| JPS61114564A (en) * | 1984-11-09 | 1986-06-02 | Nec Corp | Ic package with electrostatic breakdown prevention mechanism |
| JPS61195067U (en) * | 1985-05-24 | 1986-12-04 | ||
| JPS6230356U (en) * | 1985-08-07 | 1987-02-24 | ||
| FR2774810A1 (en) * | 1998-02-10 | 1999-08-13 | St Microelectronics Sa | Screened integrated circuit packaging and method for the fabrication |
| US9070793B2 (en) | 2010-08-02 | 2015-06-30 | Advanced Semiconductor Engineering, Inc. | Semiconductor device packages having electromagnetic interference shielding and related methods |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4863657U (en) * | 1971-11-22 | 1973-08-13 | ||
| JPS51138165A (en) * | 1975-05-23 | 1976-11-29 | Mitsubishi Electric Corp | Package stracture for thermal resistance and shield |
-
1982
- 1982-01-14 JP JP442282A patent/JPS58122759A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4863657U (en) * | 1971-11-22 | 1973-08-13 | ||
| JPS51138165A (en) * | 1975-05-23 | 1976-11-29 | Mitsubishi Electric Corp | Package stracture for thermal resistance and shield |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60121653U (en) * | 1984-01-27 | 1985-08-16 | 株式会社東芝 | Semiconductor device envelope |
| JPS60180852A (en) * | 1984-02-28 | 1985-09-14 | Kyocera Corp | Thermal printer |
| JPH0582306B2 (en) * | 1984-02-28 | 1993-11-18 | Kyocera Corp | |
| JPS60163751U (en) * | 1984-04-04 | 1985-10-30 | スタンレー電気株式会社 | semiconductor equipment |
| JPS61114564A (en) * | 1984-11-09 | 1986-06-02 | Nec Corp | Ic package with electrostatic breakdown prevention mechanism |
| JPS61195067U (en) * | 1985-05-24 | 1986-12-04 | ||
| JPS6230356U (en) * | 1985-08-07 | 1987-02-24 | ||
| FR2774810A1 (en) * | 1998-02-10 | 1999-08-13 | St Microelectronics Sa | Screened integrated circuit packaging and method for the fabrication |
| US6312975B1 (en) | 1998-02-10 | 2001-11-06 | Stmicroelectronics S.A. | Semiconductor package and method of manufacturing the same |
| US9070793B2 (en) | 2010-08-02 | 2015-06-30 | Advanced Semiconductor Engineering, Inc. | Semiconductor device packages having electromagnetic interference shielding and related methods |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH044753B2 (en) | 1992-01-29 |
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